diff options
| author | 2016-12-22 11:47:44 -0500 | |
|---|---|---|
| committer | 2016-12-22 11:47:44 -0500 | |
| commit | aa47af7fb6efd0bda54cca2373ed978e538f6d61 (patch) | |
| tree | 93d96872603f64925cd632f27bb5c7046cadeedf /src/core/arm | |
| parent | Merge pull request #2285 from mailwl/csnd-format (diff) | |
| parent | ThreadContext: Move from "core" to "arm_interface". (diff) | |
| download | yuzu-aa47af7fb6efd0bda54cca2373ed978e538f6d61.tar.gz yuzu-aa47af7fb6efd0bda54cca2373ed978e538f6d61.tar.xz yuzu-aa47af7fb6efd0bda54cca2373ed978e538f6d61.zip | |
Merge pull request #2343 from bunnei/core-cleanup
Core: Top-level consolidate & misc cleanup
Diffstat (limited to 'src/core/arm')
| -rw-r--r-- | src/core/arm/arm_interface.h | 19 | ||||
| -rw-r--r-- | src/core/arm/dynarmic/arm_dynarmic.cpp | 4 | ||||
| -rw-r--r-- | src/core/arm/dynarmic/arm_dynarmic.h | 8 | ||||
| -rw-r--r-- | src/core/arm/dyncom/arm_dyncom.cpp | 4 | ||||
| -rw-r--r-- | src/core/arm/dyncom/arm_dyncom.h | 8 |
5 files changed, 21 insertions, 22 deletions
diff --git a/src/core/arm/arm_interface.h b/src/core/arm/arm_interface.h index e466b21b2..ccd43f431 100644 --- a/src/core/arm/arm_interface.h +++ b/src/core/arm/arm_interface.h | |||
| @@ -8,15 +8,22 @@ | |||
| 8 | #include "core/arm/skyeye_common/arm_regformat.h" | 8 | #include "core/arm/skyeye_common/arm_regformat.h" |
| 9 | #include "core/arm/skyeye_common/vfp/asm_vfp.h" | 9 | #include "core/arm/skyeye_common/vfp/asm_vfp.h" |
| 10 | 10 | ||
| 11 | namespace Core { | ||
| 12 | struct ThreadContext; | ||
| 13 | } | ||
| 14 | |||
| 15 | /// Generic ARM11 CPU interface | 11 | /// Generic ARM11 CPU interface |
| 16 | class ARM_Interface : NonCopyable { | 12 | class ARM_Interface : NonCopyable { |
| 17 | public: | 13 | public: |
| 18 | virtual ~ARM_Interface() {} | 14 | virtual ~ARM_Interface() {} |
| 19 | 15 | ||
| 16 | struct ThreadContext { | ||
| 17 | u32 cpu_registers[13]; | ||
| 18 | u32 sp; | ||
| 19 | u32 lr; | ||
| 20 | u32 pc; | ||
| 21 | u32 cpsr; | ||
| 22 | u32 fpu_registers[64]; | ||
| 23 | u32 fpscr; | ||
| 24 | u32 fpexc; | ||
| 25 | }; | ||
| 26 | |||
| 20 | /** | 27 | /** |
| 21 | * Runs the CPU for the given number of instructions | 28 | * Runs the CPU for the given number of instructions |
| 22 | * @param num_instructions Number of instructions to run | 29 | * @param num_instructions Number of instructions to run |
| @@ -124,13 +131,13 @@ public: | |||
| 124 | * Saves the current CPU context | 131 | * Saves the current CPU context |
| 125 | * @param ctx Thread context to save | 132 | * @param ctx Thread context to save |
| 126 | */ | 133 | */ |
| 127 | virtual void SaveContext(Core::ThreadContext& ctx) = 0; | 134 | virtual void SaveContext(ThreadContext& ctx) = 0; |
| 128 | 135 | ||
| 129 | /** | 136 | /** |
| 130 | * Loads a CPU context | 137 | * Loads a CPU context |
| 131 | * @param ctx Thread context to load | 138 | * @param ctx Thread context to load |
| 132 | */ | 139 | */ |
| 133 | virtual void LoadContext(const Core::ThreadContext& ctx) = 0; | 140 | virtual void LoadContext(const ThreadContext& ctx) = 0; |
| 134 | 141 | ||
| 135 | /// Prepare core for thread reschedule (if needed to correctly handle state) | 142 | /// Prepare core for thread reschedule (if needed to correctly handle state) |
| 136 | virtual void PrepareReschedule() = 0; | 143 | virtual void PrepareReschedule() = 0; |
diff --git a/src/core/arm/dynarmic/arm_dynarmic.cpp b/src/core/arm/dynarmic/arm_dynarmic.cpp index fc4254670..5290382ff 100644 --- a/src/core/arm/dynarmic/arm_dynarmic.cpp +++ b/src/core/arm/dynarmic/arm_dynarmic.cpp | |||
| @@ -137,7 +137,7 @@ void ARM_Dynarmic::ExecuteInstructions(int num_instructions) { | |||
| 137 | AddTicks(ticks_executed); | 137 | AddTicks(ticks_executed); |
| 138 | } | 138 | } |
| 139 | 139 | ||
| 140 | void ARM_Dynarmic::SaveContext(Core::ThreadContext& ctx) { | 140 | void ARM_Dynarmic::SaveContext(ARM_Interface::ThreadContext& ctx) { |
| 141 | memcpy(ctx.cpu_registers, jit->Regs().data(), sizeof(ctx.cpu_registers)); | 141 | memcpy(ctx.cpu_registers, jit->Regs().data(), sizeof(ctx.cpu_registers)); |
| 142 | memcpy(ctx.fpu_registers, jit->ExtRegs().data(), sizeof(ctx.fpu_registers)); | 142 | memcpy(ctx.fpu_registers, jit->ExtRegs().data(), sizeof(ctx.fpu_registers)); |
| 143 | 143 | ||
| @@ -150,7 +150,7 @@ void ARM_Dynarmic::SaveContext(Core::ThreadContext& ctx) { | |||
| 150 | ctx.fpexc = interpreter_state->VFP[VFP_FPEXC]; | 150 | ctx.fpexc = interpreter_state->VFP[VFP_FPEXC]; |
| 151 | } | 151 | } |
| 152 | 152 | ||
| 153 | void ARM_Dynarmic::LoadContext(const Core::ThreadContext& ctx) { | 153 | void ARM_Dynarmic::LoadContext(const ARM_Interface::ThreadContext& ctx) { |
| 154 | memcpy(jit->Regs().data(), ctx.cpu_registers, sizeof(ctx.cpu_registers)); | 154 | memcpy(jit->Regs().data(), ctx.cpu_registers, sizeof(ctx.cpu_registers)); |
| 155 | memcpy(jit->ExtRegs().data(), ctx.fpu_registers, sizeof(ctx.fpu_registers)); | 155 | memcpy(jit->ExtRegs().data(), ctx.fpu_registers, sizeof(ctx.fpu_registers)); |
| 156 | 156 | ||
diff --git a/src/core/arm/dynarmic/arm_dynarmic.h b/src/core/arm/dynarmic/arm_dynarmic.h index ced86d29b..87ab53d81 100644 --- a/src/core/arm/dynarmic/arm_dynarmic.h +++ b/src/core/arm/dynarmic/arm_dynarmic.h | |||
| @@ -10,10 +10,6 @@ | |||
| 10 | #include "core/arm/arm_interface.h" | 10 | #include "core/arm/arm_interface.h" |
| 11 | #include "core/arm/skyeye_common/armstate.h" | 11 | #include "core/arm/skyeye_common/armstate.h" |
| 12 | 12 | ||
| 13 | namespace Core { | ||
| 14 | struct ThreadContext; | ||
| 15 | } | ||
| 16 | |||
| 17 | class ARM_Dynarmic final : public ARM_Interface { | 13 | class ARM_Dynarmic final : public ARM_Interface { |
| 18 | public: | 14 | public: |
| 19 | ARM_Dynarmic(PrivilegeMode initial_mode); | 15 | ARM_Dynarmic(PrivilegeMode initial_mode); |
| @@ -33,8 +29,8 @@ public: | |||
| 33 | 29 | ||
| 34 | void AddTicks(u64 ticks) override; | 30 | void AddTicks(u64 ticks) override; |
| 35 | 31 | ||
| 36 | void SaveContext(Core::ThreadContext& ctx) override; | 32 | void SaveContext(ThreadContext& ctx) override; |
| 37 | void LoadContext(const Core::ThreadContext& ctx) override; | 33 | void LoadContext(const ThreadContext& ctx) override; |
| 38 | 34 | ||
| 39 | void PrepareReschedule() override; | 35 | void PrepareReschedule() override; |
| 40 | void ExecuteInstructions(int num_instructions) override; | 36 | void ExecuteInstructions(int num_instructions) override; |
diff --git a/src/core/arm/dyncom/arm_dyncom.cpp b/src/core/arm/dyncom/arm_dyncom.cpp index 34c7f945e..81f9bf99e 100644 --- a/src/core/arm/dyncom/arm_dyncom.cpp +++ b/src/core/arm/dyncom/arm_dyncom.cpp | |||
| @@ -89,7 +89,7 @@ void ARM_DynCom::ExecuteInstructions(int num_instructions) { | |||
| 89 | AddTicks(ticks_executed); | 89 | AddTicks(ticks_executed); |
| 90 | } | 90 | } |
| 91 | 91 | ||
| 92 | void ARM_DynCom::SaveContext(Core::ThreadContext& ctx) { | 92 | void ARM_DynCom::SaveContext(ThreadContext& ctx) { |
| 93 | memcpy(ctx.cpu_registers, state->Reg.data(), sizeof(ctx.cpu_registers)); | 93 | memcpy(ctx.cpu_registers, state->Reg.data(), sizeof(ctx.cpu_registers)); |
| 94 | memcpy(ctx.fpu_registers, state->ExtReg.data(), sizeof(ctx.fpu_registers)); | 94 | memcpy(ctx.fpu_registers, state->ExtReg.data(), sizeof(ctx.fpu_registers)); |
| 95 | 95 | ||
| @@ -102,7 +102,7 @@ void ARM_DynCom::SaveContext(Core::ThreadContext& ctx) { | |||
| 102 | ctx.fpexc = state->VFP[VFP_FPEXC]; | 102 | ctx.fpexc = state->VFP[VFP_FPEXC]; |
| 103 | } | 103 | } |
| 104 | 104 | ||
| 105 | void ARM_DynCom::LoadContext(const Core::ThreadContext& ctx) { | 105 | void ARM_DynCom::LoadContext(const ThreadContext& ctx) { |
| 106 | memcpy(state->Reg.data(), ctx.cpu_registers, sizeof(ctx.cpu_registers)); | 106 | memcpy(state->Reg.data(), ctx.cpu_registers, sizeof(ctx.cpu_registers)); |
| 107 | memcpy(state->ExtReg.data(), ctx.fpu_registers, sizeof(ctx.fpu_registers)); | 107 | memcpy(state->ExtReg.data(), ctx.fpu_registers, sizeof(ctx.fpu_registers)); |
| 108 | 108 | ||
diff --git a/src/core/arm/dyncom/arm_dyncom.h b/src/core/arm/dyncom/arm_dyncom.h index 65db1f0f9..62c174f3c 100644 --- a/src/core/arm/dyncom/arm_dyncom.h +++ b/src/core/arm/dyncom/arm_dyncom.h | |||
| @@ -10,10 +10,6 @@ | |||
| 10 | #include "core/arm/skyeye_common/arm_regformat.h" | 10 | #include "core/arm/skyeye_common/arm_regformat.h" |
| 11 | #include "core/arm/skyeye_common/armstate.h" | 11 | #include "core/arm/skyeye_common/armstate.h" |
| 12 | 12 | ||
| 13 | namespace Core { | ||
| 14 | struct ThreadContext; | ||
| 15 | } | ||
| 16 | |||
| 17 | class ARM_DynCom final : public ARM_Interface { | 13 | class ARM_DynCom final : public ARM_Interface { |
| 18 | public: | 14 | public: |
| 19 | ARM_DynCom(PrivilegeMode initial_mode); | 15 | ARM_DynCom(PrivilegeMode initial_mode); |
| @@ -36,8 +32,8 @@ public: | |||
| 36 | 32 | ||
| 37 | void AddTicks(u64 ticks) override; | 33 | void AddTicks(u64 ticks) override; |
| 38 | 34 | ||
| 39 | void SaveContext(Core::ThreadContext& ctx) override; | 35 | void SaveContext(ThreadContext& ctx) override; |
| 40 | void LoadContext(const Core::ThreadContext& ctx) override; | 36 | void LoadContext(const ThreadContext& ctx) override; |
| 41 | 37 | ||
| 42 | void PrepareReschedule() override; | 38 | void PrepareReschedule() override; |
| 43 | void ExecuteInstructions(int num_instructions) override; | 39 | void ExecuteInstructions(int num_instructions) override; |