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| author | 2015-01-09 12:59:35 -0500 | |
|---|---|---|
| committer | 2015-01-09 12:59:35 -0500 | |
| commit | 6ae12424df58f0ea171fc75ca4b700ab1fffc192 (patch) | |
| tree | 93d87f3cb19d08541c6b8f8a9e0ceb730a2b13d9 /src/core/arm | |
| parent | Merge pull request #436 from kevinhartman/system-core (diff) | |
| parent | Thread: Fix nullptr access in a logging function (diff) | |
| download | yuzu-6ae12424df58f0ea171fc75ca4b700ab1fffc192.tar.gz yuzu-6ae12424df58f0ea171fc75ca4b700ab1fffc192.tar.xz yuzu-6ae12424df58f0ea171fc75ca4b700ab1fffc192.zip | |
Merge pull request #444 from yuriks/handle-reform2
Kernel Lifetime Reform Pt. 2
Diffstat (limited to 'src/core/arm')
| -rw-r--r-- | src/core/arm/arm_interface.h | 8 | ||||
| -rw-r--r-- | src/core/arm/dyncom/arm_dyncom.cpp | 5 | ||||
| -rw-r--r-- | src/core/arm/dyncom/arm_dyncom.h | 4 | ||||
| -rw-r--r-- | src/core/arm/interpreter/arm_interpreter.cpp | 6 | ||||
| -rw-r--r-- | src/core/arm/interpreter/arm_interpreter.h | 4 |
5 files changed, 16 insertions, 11 deletions
diff --git a/src/core/arm/arm_interface.h b/src/core/arm/arm_interface.h index d3bd4a9a3..e612f7439 100644 --- a/src/core/arm/arm_interface.h +++ b/src/core/arm/arm_interface.h | |||
| @@ -7,7 +7,9 @@ | |||
| 7 | #include "common/common.h" | 7 | #include "common/common.h" |
| 8 | #include "common/common_types.h" | 8 | #include "common/common_types.h" |
| 9 | 9 | ||
| 10 | #include "core/hle/svc.h" | 10 | namespace Core { |
| 11 | struct ThreadContext; | ||
| 12 | } | ||
| 11 | 13 | ||
| 12 | /// Generic ARM11 CPU interface | 14 | /// Generic ARM11 CPU interface |
| 13 | class ARM_Interface : NonCopyable { | 15 | class ARM_Interface : NonCopyable { |
| @@ -87,13 +89,13 @@ public: | |||
| 87 | * Saves the current CPU context | 89 | * Saves the current CPU context |
| 88 | * @param ctx Thread context to save | 90 | * @param ctx Thread context to save |
| 89 | */ | 91 | */ |
| 90 | virtual void SaveContext(ThreadContext& ctx) = 0; | 92 | virtual void SaveContext(Core::ThreadContext& ctx) = 0; |
| 91 | 93 | ||
| 92 | /** | 94 | /** |
| 93 | * Loads a CPU context | 95 | * Loads a CPU context |
| 94 | * @param ctx Thread context to load | 96 | * @param ctx Thread context to load |
| 95 | */ | 97 | */ |
| 96 | virtual void LoadContext(const ThreadContext& ctx) = 0; | 98 | virtual void LoadContext(const Core::ThreadContext& ctx) = 0; |
| 97 | 99 | ||
| 98 | /// Prepare core for thread reschedule (if needed to correctly handle state) | 100 | /// Prepare core for thread reschedule (if needed to correctly handle state) |
| 99 | virtual void PrepareReschedule() = 0; | 101 | virtual void PrepareReschedule() = 0; |
diff --git a/src/core/arm/dyncom/arm_dyncom.cpp b/src/core/arm/dyncom/arm_dyncom.cpp index 31eb879a2..9c4cc90f2 100644 --- a/src/core/arm/dyncom/arm_dyncom.cpp +++ b/src/core/arm/dyncom/arm_dyncom.cpp | |||
| @@ -9,6 +9,7 @@ | |||
| 9 | #include "core/arm/dyncom/arm_dyncom.h" | 9 | #include "core/arm/dyncom/arm_dyncom.h" |
| 10 | #include "core/arm/dyncom/arm_dyncom_interpreter.h" | 10 | #include "core/arm/dyncom/arm_dyncom_interpreter.h" |
| 11 | 11 | ||
| 12 | #include "core/core.h" | ||
| 12 | #include "core/core_timing.h" | 13 | #include "core/core_timing.h" |
| 13 | 14 | ||
| 14 | const static cpu_config_t s_arm11_cpu_info = { | 15 | const static cpu_config_t s_arm11_cpu_info = { |
| @@ -94,7 +95,7 @@ void ARM_DynCom::ExecuteInstructions(int num_instructions) { | |||
| 94 | AddTicks(ticks_executed); | 95 | AddTicks(ticks_executed); |
| 95 | } | 96 | } |
| 96 | 97 | ||
| 97 | void ARM_DynCom::SaveContext(ThreadContext& ctx) { | 98 | void ARM_DynCom::SaveContext(Core::ThreadContext& ctx) { |
| 98 | memcpy(ctx.cpu_registers, state->Reg, sizeof(ctx.cpu_registers)); | 99 | memcpy(ctx.cpu_registers, state->Reg, sizeof(ctx.cpu_registers)); |
| 99 | memcpy(ctx.fpu_registers, state->ExtReg, sizeof(ctx.fpu_registers)); | 100 | memcpy(ctx.fpu_registers, state->ExtReg, sizeof(ctx.fpu_registers)); |
| 100 | 101 | ||
| @@ -110,7 +111,7 @@ void ARM_DynCom::SaveContext(ThreadContext& ctx) { | |||
| 110 | ctx.mode = state->NextInstr; | 111 | ctx.mode = state->NextInstr; |
| 111 | } | 112 | } |
| 112 | 113 | ||
| 113 | void ARM_DynCom::LoadContext(const ThreadContext& ctx) { | 114 | void ARM_DynCom::LoadContext(const Core::ThreadContext& ctx) { |
| 114 | memcpy(state->Reg, ctx.cpu_registers, sizeof(ctx.cpu_registers)); | 115 | memcpy(state->Reg, ctx.cpu_registers, sizeof(ctx.cpu_registers)); |
| 115 | memcpy(state->ExtReg, ctx.fpu_registers, sizeof(ctx.fpu_registers)); | 116 | memcpy(state->ExtReg, ctx.fpu_registers, sizeof(ctx.fpu_registers)); |
| 116 | 117 | ||
diff --git a/src/core/arm/dyncom/arm_dyncom.h b/src/core/arm/dyncom/arm_dyncom.h index 9e102a46e..f16fb070c 100644 --- a/src/core/arm/dyncom/arm_dyncom.h +++ b/src/core/arm/dyncom/arm_dyncom.h | |||
| @@ -71,13 +71,13 @@ public: | |||
| 71 | * Saves the current CPU context | 71 | * Saves the current CPU context |
| 72 | * @param ctx Thread context to save | 72 | * @param ctx Thread context to save |
| 73 | */ | 73 | */ |
| 74 | void SaveContext(ThreadContext& ctx) override; | 74 | void SaveContext(Core::ThreadContext& ctx) override; |
| 75 | 75 | ||
| 76 | /** | 76 | /** |
| 77 | * Loads a CPU context | 77 | * Loads a CPU context |
| 78 | * @param ctx Thread context to load | 78 | * @param ctx Thread context to load |
| 79 | */ | 79 | */ |
| 80 | void LoadContext(const ThreadContext& ctx) override; | 80 | void LoadContext(const Core::ThreadContext& ctx) override; |
| 81 | 81 | ||
| 82 | /// Prepare core for thread reschedule (if needed to correctly handle state) | 82 | /// Prepare core for thread reschedule (if needed to correctly handle state) |
| 83 | void PrepareReschedule() override; | 83 | void PrepareReschedule() override; |
diff --git a/src/core/arm/interpreter/arm_interpreter.cpp b/src/core/arm/interpreter/arm_interpreter.cpp index 80ebc359e..c76d371a2 100644 --- a/src/core/arm/interpreter/arm_interpreter.cpp +++ b/src/core/arm/interpreter/arm_interpreter.cpp | |||
| @@ -4,6 +4,8 @@ | |||
| 4 | 4 | ||
| 5 | #include "core/arm/interpreter/arm_interpreter.h" | 5 | #include "core/arm/interpreter/arm_interpreter.h" |
| 6 | 6 | ||
| 7 | #include "core/core.h" | ||
| 8 | |||
| 7 | const static cpu_config_t arm11_cpu_info = { | 9 | const static cpu_config_t arm11_cpu_info = { |
| 8 | "armv6", "arm11", 0x0007b000, 0x0007f000, NONCACHE | 10 | "armv6", "arm11", 0x0007b000, 0x0007f000, NONCACHE |
| 9 | }; | 11 | }; |
| @@ -75,7 +77,7 @@ void ARM_Interpreter::ExecuteInstructions(int num_instructions) { | |||
| 75 | ARMul_Emulate32(state); | 77 | ARMul_Emulate32(state); |
| 76 | } | 78 | } |
| 77 | 79 | ||
| 78 | void ARM_Interpreter::SaveContext(ThreadContext& ctx) { | 80 | void ARM_Interpreter::SaveContext(Core::ThreadContext& ctx) { |
| 79 | memcpy(ctx.cpu_registers, state->Reg, sizeof(ctx.cpu_registers)); | 81 | memcpy(ctx.cpu_registers, state->Reg, sizeof(ctx.cpu_registers)); |
| 80 | memcpy(ctx.fpu_registers, state->ExtReg, sizeof(ctx.fpu_registers)); | 82 | memcpy(ctx.fpu_registers, state->ExtReg, sizeof(ctx.fpu_registers)); |
| 81 | 83 | ||
| @@ -91,7 +93,7 @@ void ARM_Interpreter::SaveContext(ThreadContext& ctx) { | |||
| 91 | ctx.mode = state->NextInstr; | 93 | ctx.mode = state->NextInstr; |
| 92 | } | 94 | } |
| 93 | 95 | ||
| 94 | void ARM_Interpreter::LoadContext(const ThreadContext& ctx) { | 96 | void ARM_Interpreter::LoadContext(const Core::ThreadContext& ctx) { |
| 95 | memcpy(state->Reg, ctx.cpu_registers, sizeof(ctx.cpu_registers)); | 97 | memcpy(state->Reg, ctx.cpu_registers, sizeof(ctx.cpu_registers)); |
| 96 | memcpy(state->ExtReg, ctx.fpu_registers, sizeof(ctx.fpu_registers)); | 98 | memcpy(state->ExtReg, ctx.fpu_registers, sizeof(ctx.fpu_registers)); |
| 97 | 99 | ||
diff --git a/src/core/arm/interpreter/arm_interpreter.h b/src/core/arm/interpreter/arm_interpreter.h index 019dad5df..e5ecc69c2 100644 --- a/src/core/arm/interpreter/arm_interpreter.h +++ b/src/core/arm/interpreter/arm_interpreter.h | |||
| @@ -70,13 +70,13 @@ public: | |||
| 70 | * Saves the current CPU context | 70 | * Saves the current CPU context |
| 71 | * @param ctx Thread context to save | 71 | * @param ctx Thread context to save |
| 72 | */ | 72 | */ |
| 73 | void SaveContext(ThreadContext& ctx) override; | 73 | void SaveContext(Core::ThreadContext& ctx) override; |
| 74 | 74 | ||
| 75 | /** | 75 | /** |
| 76 | * Loads a CPU context | 76 | * Loads a CPU context |
| 77 | * @param ctx Thread context to load | 77 | * @param ctx Thread context to load |
| 78 | */ | 78 | */ |
| 79 | void LoadContext(const ThreadContext& ctx) override; | 79 | void LoadContext(const Core::ThreadContext& ctx) override; |
| 80 | 80 | ||
| 81 | /// Prepare core for thread reschedule (if needed to correctly handle state) | 81 | /// Prepare core for thread reschedule (if needed to correctly handle state) |
| 82 | void PrepareReschedule() override; | 82 | void PrepareReschedule() override; |