ARM_Interface: added SaveContext and LoadContext functions for HLE thread switching

3 files changed, 63 insertions, 1 deletions

diff --git a/src/core/arm/arm_interface.h b/src/core/arm/arm_interface.h
index 5c382ebbd..52bc82115 100644
--- a/src/core/arm/arm_interface.h
+++ b/src/core/arm/arm_interface.h
@@ -7,6 +7,8 @@
 #include "common/common.h"
 #include "common/common_types.h"
 
+#include "core/hle/svc.h"
+
 /// Generic ARM11 CPU interface
 class ARM_Interface : NonCopyable {
 public:
@@ -75,6 +77,18 @@ public:
      */
     virtual u64 GetTicks() const = 0;
 
+    /**
+     * Saves the current CPU context
+     * @param ctx Thread context to save
+     */
+    virtual void SaveContext(ThreadContext& ctx) = 0;
+
+    /**
+     * Loads a CPU context
+     * @param ctx Thread context to load
+     */
+    virtual void LoadContext(const ThreadContext& ctx) = 0;
+
     /// Getter for m_num_instructions
     u64 GetNumInstructions() {
         return m_num_instructions;
@@ -90,6 +104,6 @@ protected:
 
 private:
 
-    u64 m_num_instructions;                     ///< Number of instructions executed
+    u64 m_num_instructions; ///< Number of instructions executed
 
 };
diff --git a/src/core/arm/interpreter/arm_interpreter.cpp b/src/core/arm/interpreter/arm_interpreter.cpp
index c21ff0464..b8c46cdfc 100644
--- a/src/core/arm/interpreter/arm_interpreter.cpp
+++ b/src/core/arm/interpreter/arm_interpreter.cpp
@@ -101,3 +101,39 @@ void ARM_Interpreter::ExecuteInstructions(int num_instructions) {
     m_state->NumInstrsToExecute = num_instructions;
     ARMul_Emulate32(m_state);
 }
+
+/**
+ * Saves the current CPU context
+ * @param ctx Thread context to save
+ * @todo Do we need to save Reg[15] and NextInstr?
+ */
+void ARM_Interpreter::SaveContext(ThreadContext& ctx) {
+    memcpy(ctx.cpu_registers, m_state->Reg, sizeof(ctx.cpu_registers));
+    memcpy(ctx.fpu_registers, m_state->ExtReg, sizeof(ctx.fpu_registers));
+
+    ctx.sp = m_state->Reg[13];
+    ctx.lr = m_state->Reg[14];
+    ctx.pc = m_state->pc;
+    ctx.cpsr = m_state->Cpsr;
+    
+    ctx.fpscr = m_state->VFP[1];
+    ctx.fpexc = m_state->VFP[2];
+}
+
+/**
+ * Loads a CPU context
+ * @param ctx Thread context to load
+ * @param Do we need to load Reg[15] and NextInstr?
+ */
+void ARM_Interpreter::LoadContext(const ThreadContext& ctx) {
+    memcpy(m_state->Reg, ctx.cpu_registers, sizeof(ctx.cpu_registers));
+    memcpy(m_state->ExtReg, ctx.fpu_registers, sizeof(ctx.fpu_registers));
+
+    m_state->Reg[13] = ctx.sp;
+    m_state->Reg[14] = ctx.lr;
+    m_state->pc = ctx.pc;
+    m_state->Cpsr = ctx.cpsr;
+
+    m_state->VFP[1] = ctx.fpscr;
+    m_state->VFP[2] = ctx.fpexc;
+}
diff --git a/src/core/arm/interpreter/arm_interpreter.h b/src/core/arm/interpreter/arm_interpreter.h
index 474ba3e45..15240568c 100644
--- a/src/core/arm/interpreter/arm_interpreter.h
+++ b/src/core/arm/interpreter/arm_interpreter.h
@@ -60,6 +60,18 @@ public:
      */
     u64 GetTicks() const;
 
+    /**
+     * Saves the current CPU context
+     * @param ctx Thread context to save
+     */
+    void SaveContext(ThreadContext& ctx);
+
+    /**
+     * Loads a CPU context
+     * @param ctx Thread context to load
+     */
+    void LoadContext(const ThreadContext& ctx);
+
 protected:
 
     /**