Merge branch 'hle-interface-updates'

4 files changed, 11 insertions, 7 deletions

diff --git a/src/core/arm/arm_interface.h b/src/core/arm/arm_interface.h
index eee4726db..4dfe0570b 100644
--- a/src/core/arm/arm_interface.h
+++ b/src/core/arm/arm_interface.h
@@ -8,7 +8,7 @@
 #include "common/common_types.h"
 
 /// Generic ARM11 CPU interface
-class ARM_Interface {
+class ARM_Interface : NonCopyable {
 public:
     ARM_Interface() {
         m_num_instructions = 0;
@@ -75,5 +75,4 @@ private:
 
     u64 m_num_instructions;                     ///< Number of instructions executed
 
-    DISALLOW_COPY_AND_ASSIGN(ARM_Interface);
 };
diff --git a/src/core/arm/interpreter/arm_interpreter.h b/src/core/arm/interpreter/arm_interpreter.h
index f3c86f8dd..625c0c652 100644
--- a/src/core/arm/interpreter/arm_interpreter.h
+++ b/src/core/arm/interpreter/arm_interpreter.h
@@ -63,5 +63,4 @@ private:
 
     ARMul_State* m_state;
 
-    DISALLOW_COPY_AND_ASSIGN(ARM_Interpreter);
 };
diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp
index 6074ff480..a35c5c8dc 100644
--- a/src/core/arm/interpreter/armemu.cpp
+++ b/src/core/arm/interpreter/armemu.cpp
@@ -4467,7 +4467,6 @@ ARMul_Emulate26 (ARMul_State * state)
                     }
                 /* Drop through.  */
 
-            case 0xe0:
             case 0xe4:
             case 0xe6:
             case 0xe8:
@@ -4502,6 +4501,7 @@ ARMul_Emulate26 (ARMul_State * state)
 
 
                 /* Co-Processor Register Transfers (MRC) and Data Ops.  */
+            case 0xe0:
             case 0xe1:
             case 0xe3:
             case 0xe5:
diff --git a/src/core/arm/interpreter/armsupp.cpp b/src/core/arm/interpreter/armsupp.cpp
index 101b9807a..b2bbedc18 100644
--- a/src/core/arm/interpreter/armsupp.cpp
+++ b/src/core/arm/interpreter/armsupp.cpp
@@ -17,9 +17,11 @@
 
 #include "armdefs.h"
 #include "armemu.h"
+
 //#include "ansidecl.h"
 #include "skyeye_defs.h"
-#include "core/hle/hle.h"
+#include "core/hle/mrc.h"
+#include "core/arm/disassembler/arm_disasm.h"
 
 unsigned xscale_cp15_cp_access_allowed (ARMul_State * state, unsigned reg,
                                         unsigned cpnum);
@@ -736,7 +738,8 @@ ARMword
 ARMul_MRC (ARMul_State * state, ARMword instr)
 {
         unsigned cpab;
-        ARMword result = HLE::CallGetThreadCommandBuffer();
+
+        ARMword result = HLE::CallMRC((HLE::ARM11_MRC_OPERATION)BITS(20, 27));
 
         ////printf("SKYEYE ARMul_MRC, CPnum is %x, instr %x\n",CPNum, instr);
         //if (!CP_ACCESS_ALLOWED (state, CPNum)) {
@@ -846,7 +849,10 @@ ARMul_CDP (ARMul_State * state, ARMword instr)
 void
 ARMul_UndefInstr (ARMul_State * state, ARMword instr)
 {
-        ERROR_LOG(ARM11, "Undefined instruction!! Instr: 0x%x", instr);
+        char buff[512];
+        ARM_Disasm disasm = ARM_Disasm();
+        disasm.disasm(state->pc, instr, buff);
+        ERROR_LOG(ARM11, "Undefined instruction!! Disasm: %s Opcode: 0x%x", buff, instr);
         ARMul_Abort (state, ARMul_UndefinedInstrV);
 }