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authorGravatar Fernando Sahmkow2020-06-27 18:20:06 -0400
committerGravatar Fernando Sahmkow2020-06-27 18:20:06 -0400
commit2f8947583f2f0af4058600243d6c1d244e3c4890 (patch)
treea0e7a10c6131efb23d6fdb3ee7fc0de4bd4163af /src/core/arm
parentNvFlinger: Clang Format. (diff)
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Core/Common: Address Feedback.
Diffstat (limited to 'src/core/arm')
-rw-r--r--src/core/arm/arm_interface.h2
-rw-r--r--src/core/arm/cpu_interrupt_handler.h2
-rw-r--r--src/core/arm/dynarmic/arm_dynarmic_32.cpp5
-rw-r--r--src/core/arm/dynarmic/arm_dynarmic_32.h2
-rw-r--r--src/core/arm/dynarmic/arm_dynarmic_64.cpp5
-rw-r--r--src/core/arm/dynarmic/arm_dynarmic_64.h2
-rw-r--r--src/core/arm/unicorn/arm_unicorn.cpp2
-rw-r--r--src/core/arm/unicorn/arm_unicorn.h2
8 files changed, 12 insertions, 10 deletions
diff --git a/src/core/arm/arm_interface.h b/src/core/arm/arm_interface.h
index 0c1d6ac39..1f24051e4 100644
--- a/src/core/arm/arm_interface.h
+++ b/src/core/arm/arm_interface.h
@@ -148,7 +148,7 @@ public:
148 */ 148 */
149 virtual void SetTPIDR_EL0(u64 value) = 0; 149 virtual void SetTPIDR_EL0(u64 value) = 0;
150 150
151 virtual void ChangeProcessorId(std::size_t new_core_id) = 0; 151 virtual void ChangeProcessorID(std::size_t new_core_id) = 0;
152 152
153 virtual void SaveContext(ThreadContext32& ctx) = 0; 153 virtual void SaveContext(ThreadContext32& ctx) = 0;
154 virtual void SaveContext(ThreadContext64& ctx) = 0; 154 virtual void SaveContext(ThreadContext64& ctx) = 0;
diff --git a/src/core/arm/cpu_interrupt_handler.h b/src/core/arm/cpu_interrupt_handler.h
index 91c31a271..3d062d326 100644
--- a/src/core/arm/cpu_interrupt_handler.h
+++ b/src/core/arm/cpu_interrupt_handler.h
@@ -23,7 +23,7 @@ public:
23 CPUInterruptHandler(CPUInterruptHandler&&) = default; 23 CPUInterruptHandler(CPUInterruptHandler&&) = default;
24 CPUInterruptHandler& operator=(CPUInterruptHandler&&) = default; 24 CPUInterruptHandler& operator=(CPUInterruptHandler&&) = default;
25 25
26 constexpr bool IsInterrupted() const { 26 bool IsInterrupted() const {
27 return is_interrupted; 27 return is_interrupted;
28 } 28 }
29 29
diff --git a/src/core/arm/dynarmic/arm_dynarmic_32.cpp b/src/core/arm/dynarmic/arm_dynarmic_32.cpp
index cfda12098..0d4ab95b7 100644
--- a/src/core/arm/dynarmic/arm_dynarmic_32.cpp
+++ b/src/core/arm/dynarmic/arm_dynarmic_32.cpp
@@ -107,7 +107,7 @@ public:
107 u64 GetTicksRemaining() override { 107 u64 GetTicksRemaining() override {
108 if (parent.uses_wall_clock) { 108 if (parent.uses_wall_clock) {
109 if (!parent.interrupt_handlers[parent.core_index].IsInterrupted()) { 109 if (!parent.interrupt_handlers[parent.core_index].IsInterrupted()) {
110 return 1000U; 110 return minimum_run_cycles;
111 } 111 }
112 return 0U; 112 return 0U;
113 } 113 }
@@ -116,6 +116,7 @@ public:
116 116
117 ARM_Dynarmic_32& parent; 117 ARM_Dynarmic_32& parent;
118 std::size_t num_interpreted_instructions{}; 118 std::size_t num_interpreted_instructions{};
119 static constexpr u64 minimum_run_cycles = 1000U;
119}; 120};
120 121
121std::shared_ptr<Dynarmic::A32::Jit> ARM_Dynarmic_32::MakeJit(Common::PageTable& page_table, 122std::shared_ptr<Dynarmic::A32::Jit> ARM_Dynarmic_32::MakeJit(Common::PageTable& page_table,
@@ -214,7 +215,7 @@ void ARM_Dynarmic_32::SetTPIDR_EL0(u64 value) {
214 cp15->uprw = static_cast<u32>(value); 215 cp15->uprw = static_cast<u32>(value);
215} 216}
216 217
217void ARM_Dynarmic_32::ChangeProcessorId(std::size_t new_core_id) { 218void ARM_Dynarmic_32::ChangeProcessorID(std::size_t new_core_id) {
218 jit->ChangeProcessorID(new_core_id); 219 jit->ChangeProcessorID(new_core_id);
219} 220}
220 221
diff --git a/src/core/arm/dynarmic/arm_dynarmic_32.h b/src/core/arm/dynarmic/arm_dynarmic_32.h
index d9c0bfede..2bab31b92 100644
--- a/src/core/arm/dynarmic/arm_dynarmic_32.h
+++ b/src/core/arm/dynarmic/arm_dynarmic_32.h
@@ -47,7 +47,7 @@ public:
47 void SetTlsAddress(VAddr address) override; 47 void SetTlsAddress(VAddr address) override;
48 void SetTPIDR_EL0(u64 value) override; 48 void SetTPIDR_EL0(u64 value) override;
49 u64 GetTPIDR_EL0() const override; 49 u64 GetTPIDR_EL0() const override;
50 void ChangeProcessorId(std::size_t new_core_id) override; 50 void ChangeProcessorID(std::size_t new_core_id) override;
51 51
52 void SaveContext(ThreadContext32& ctx) override; 52 void SaveContext(ThreadContext32& ctx) override;
53 void SaveContext(ThreadContext64& ctx) override {} 53 void SaveContext(ThreadContext64& ctx) override {}
diff --git a/src/core/arm/dynarmic/arm_dynarmic_64.cpp b/src/core/arm/dynarmic/arm_dynarmic_64.cpp
index 35a99e28a..790981034 100644
--- a/src/core/arm/dynarmic/arm_dynarmic_64.cpp
+++ b/src/core/arm/dynarmic/arm_dynarmic_64.cpp
@@ -144,7 +144,7 @@ public:
144 u64 GetTicksRemaining() override { 144 u64 GetTicksRemaining() override {
145 if (parent.uses_wall_clock) { 145 if (parent.uses_wall_clock) {
146 if (!parent.interrupt_handlers[parent.core_index].IsInterrupted()) { 146 if (!parent.interrupt_handlers[parent.core_index].IsInterrupted()) {
147 return 1000U; 147 return minimum_run_cycles;
148 } 148 }
149 return 0U; 149 return 0U;
150 } 150 }
@@ -159,6 +159,7 @@ public:
159 std::size_t num_interpreted_instructions = 0; 159 std::size_t num_interpreted_instructions = 0;
160 u64 tpidrro_el0 = 0; 160 u64 tpidrro_el0 = 0;
161 u64 tpidr_el0 = 0; 161 u64 tpidr_el0 = 0;
162 static constexpr u64 minimum_run_cycles = 1000U;
162}; 163};
163 164
164std::shared_ptr<Dynarmic::A64::Jit> ARM_Dynarmic_64::MakeJit(Common::PageTable& page_table, 165std::shared_ptr<Dynarmic::A64::Jit> ARM_Dynarmic_64::MakeJit(Common::PageTable& page_table,
@@ -271,7 +272,7 @@ void ARM_Dynarmic_64::SetTPIDR_EL0(u64 value) {
271 cb->tpidr_el0 = value; 272 cb->tpidr_el0 = value;
272} 273}
273 274
274void ARM_Dynarmic_64::ChangeProcessorId(std::size_t new_core_id) { 275void ARM_Dynarmic_64::ChangeProcessorID(std::size_t new_core_id) {
275 jit->ChangeProcessorID(new_core_id); 276 jit->ChangeProcessorID(new_core_id);
276} 277}
277 278
diff --git a/src/core/arm/dynarmic/arm_dynarmic_64.h b/src/core/arm/dynarmic/arm_dynarmic_64.h
index c74fcbcea..403c55961 100644
--- a/src/core/arm/dynarmic/arm_dynarmic_64.h
+++ b/src/core/arm/dynarmic/arm_dynarmic_64.h
@@ -45,7 +45,7 @@ public:
45 void SetTlsAddress(VAddr address) override; 45 void SetTlsAddress(VAddr address) override;
46 void SetTPIDR_EL0(u64 value) override; 46 void SetTPIDR_EL0(u64 value) override;
47 u64 GetTPIDR_EL0() const override; 47 u64 GetTPIDR_EL0() const override;
48 void ChangeProcessorId(std::size_t new_core_id) override; 48 void ChangeProcessorID(std::size_t new_core_id) override;
49 49
50 void SaveContext(ThreadContext32& ctx) override {} 50 void SaveContext(ThreadContext32& ctx) override {}
51 void SaveContext(ThreadContext64& ctx) override; 51 void SaveContext(ThreadContext64& ctx) override;
diff --git a/src/core/arm/unicorn/arm_unicorn.cpp b/src/core/arm/unicorn/arm_unicorn.cpp
index 35e8f42e8..1df3f3ed1 100644
--- a/src/core/arm/unicorn/arm_unicorn.cpp
+++ b/src/core/arm/unicorn/arm_unicorn.cpp
@@ -159,7 +159,7 @@ void ARM_Unicorn::SetTPIDR_EL0(u64 value) {
159 CHECKED(uc_reg_write(uc, UC_ARM64_REG_TPIDR_EL0, &value)); 159 CHECKED(uc_reg_write(uc, UC_ARM64_REG_TPIDR_EL0, &value));
160} 160}
161 161
162void ARM_Unicorn::ChangeProcessorId(std::size_t new_core_id) { 162void ARM_Unicorn::ChangeProcessorID(std::size_t new_core_id) {
163 core_index = new_core_id; 163 core_index = new_core_id;
164} 164}
165 165
diff --git a/src/core/arm/unicorn/arm_unicorn.h b/src/core/arm/unicorn/arm_unicorn.h
index 8ace8b86f..810aff311 100644
--- a/src/core/arm/unicorn/arm_unicorn.h
+++ b/src/core/arm/unicorn/arm_unicorn.h
@@ -36,7 +36,7 @@ public:
36 void SetTlsAddress(VAddr address) override; 36 void SetTlsAddress(VAddr address) override;
37 void SetTPIDR_EL0(u64 value) override; 37 void SetTPIDR_EL0(u64 value) override;
38 u64 GetTPIDR_EL0() const override; 38 u64 GetTPIDR_EL0() const override;
39 void ChangeProcessorId(std::size_t new_core_id) override; 39 void ChangeProcessorID(std::size_t new_core_id) override;
40 void PrepareReschedule() override; 40 void PrepareReschedule() override;
41 void ClearExclusiveState() override; 41 void ClearExclusiveState() override;
42 void ExecuteInstructions(std::size_t num_instructions); 42 void ExecuteInstructions(std::size_t num_instructions);