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authorGravatar Lioncash2018-07-20 18:56:53 -0400
committerGravatar Lioncash2018-07-20 18:57:40 -0400
commitae09adfcb343f4ebf73a3a85a911422cbf50d6fc (patch)
tree450f06d8bd27cdce2baa290e6850acf2d903d059 /src/core/arm/unicorn
parentMerge pull request #742 from bunnei/misc-apm (diff)
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arm_interface: Remove unused tls_address member of ThreadContext
Currently, the TLS address is set within the scheduler, making this member unused.
Diffstat (limited to 'src/core/arm/unicorn')
-rw-r--r--src/core/arm/unicorn/arm_unicorn.cpp4
1 files changed, 0 insertions, 4 deletions
diff --git a/src/core/arm/unicorn/arm_unicorn.cpp b/src/core/arm/unicorn/arm_unicorn.cpp
index d2d699e9b..b7afd9ed8 100644
--- a/src/core/arm/unicorn/arm_unicorn.cpp
+++ b/src/core/arm/unicorn/arm_unicorn.cpp
@@ -220,8 +220,6 @@ void ARM_Unicorn::SaveContext(ARM_Interface::ThreadContext& ctx) {
220 220
221 CHECKED(uc_reg_read_batch(uc, uregs, tregs, 31)); 221 CHECKED(uc_reg_read_batch(uc, uregs, tregs, 31));
222 222
223 ctx.tls_address = GetTlsAddress();
224
225 for (int i = 0; i < 32; ++i) { 223 for (int i = 0; i < 32; ++i) {
226 uregs[i] = UC_ARM64_REG_Q0 + i; 224 uregs[i] = UC_ARM64_REG_Q0 + i;
227 tregs[i] = &ctx.fpu_registers[i]; 225 tregs[i] = &ctx.fpu_registers[i];
@@ -249,8 +247,6 @@ void ARM_Unicorn::LoadContext(const ARM_Interface::ThreadContext& ctx) {
249 247
250 CHECKED(uc_reg_write_batch(uc, uregs, tregs, 31)); 248 CHECKED(uc_reg_write_batch(uc, uregs, tregs, 31));
251 249
252 SetTlsAddress(ctx.tls_address);
253
254 for (auto i = 0; i < 32; ++i) { 250 for (auto i = 0; i < 32; ++i) {
255 uregs[i] = UC_ARM64_REG_Q0 + i; 251 uregs[i] = UC_ARM64_REG_Q0 + i;
256 tregs[i] = (void*)&ctx.fpu_registers[i]; 252 tregs[i] = (void*)&ctx.fpu_registers[i];