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authorGravatar bunnei2020-10-20 19:07:39 -0700
committerGravatar GitHub2020-10-20 19:07:39 -0700
commit3d592972dc3fd61cc88771b889eff237e4e03e0f (patch)
tree0dbc65ac86e609ae22087c7be9d4759ac6b73004 /src/core/arm/unicorn
parentkernel: Fix build with recent compiler flag changes (diff)
downloadyuzu-3d592972dc3fd61cc88771b889eff237e4e03e0f.tar.gz
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Revert "core: Fix clang build"
Diffstat (limited to 'src/core/arm/unicorn')
-rw-r--r--src/core/arm/unicorn/arm_unicorn.cpp42
-rw-r--r--src/core/arm/unicorn/arm_unicorn.h8
2 files changed, 25 insertions, 25 deletions
diff --git a/src/core/arm/unicorn/arm_unicorn.cpp b/src/core/arm/unicorn/arm_unicorn.cpp
index c1612d626..1df3f3ed1 100644
--- a/src/core/arm/unicorn/arm_unicorn.cpp
+++ b/src/core/arm/unicorn/arm_unicorn.cpp
@@ -96,35 +96,35 @@ u64 ARM_Unicorn::GetPC() const {
96 return val; 96 return val;
97} 97}
98 98
99u64 ARM_Unicorn::GetReg(std::size_t index) const { 99u64 ARM_Unicorn::GetReg(int regn) const {
100 u64 val{}; 100 u64 val{};
101 auto treg = UC_ARM64_REG_SP; 101 auto treg = UC_ARM64_REG_SP;
102 if (index <= 28) { 102 if (regn <= 28) {
103 treg = static_cast<uc_arm64_reg>(UC_ARM64_REG_X0 + static_cast<int>(index)); 103 treg = (uc_arm64_reg)(UC_ARM64_REG_X0 + regn);
104 } else if (index < 31) { 104 } else if (regn < 31) {
105 treg = static_cast<uc_arm64_reg>(UC_ARM64_REG_X29 + static_cast<int>(index) - 29); 105 treg = (uc_arm64_reg)(UC_ARM64_REG_X29 + regn - 29);
106 } 106 }
107 CHECKED(uc_reg_read(uc, treg, &val)); 107 CHECKED(uc_reg_read(uc, treg, &val));
108 return val; 108 return val;
109} 109}
110 110
111void ARM_Unicorn::SetReg(std::size_t index, u64 value) { 111void ARM_Unicorn::SetReg(int regn, u64 val) {
112 auto treg = UC_ARM64_REG_SP; 112 auto treg = UC_ARM64_REG_SP;
113 if (index <= 28) { 113 if (regn <= 28) {
114 treg = static_cast<uc_arm64_reg>(UC_ARM64_REG_X0 + static_cast<int>(index)); 114 treg = (uc_arm64_reg)(UC_ARM64_REG_X0 + regn);
115 } else if (index < 31) { 115 } else if (regn < 31) {
116 treg = static_cast<uc_arm64_reg>(UC_ARM64_REG_X29 + static_cast<int>(index) - 29); 116 treg = (uc_arm64_reg)(UC_ARM64_REG_X29 + regn - 29);
117 } 117 }
118 CHECKED(uc_reg_write(uc, treg, &value)); 118 CHECKED(uc_reg_write(uc, treg, &val));
119} 119}
120 120
121u128 ARM_Unicorn::GetVectorReg(std::size_t /*index*/) const { 121u128 ARM_Unicorn::GetVectorReg(int /*index*/) const {
122 UNIMPLEMENTED(); 122 UNIMPLEMENTED();
123 static constexpr u128 res{}; 123 static constexpr u128 res{};
124 return res; 124 return res;
125} 125}
126 126
127void ARM_Unicorn::SetVectorReg(std::size_t /*index*/, u128 /*value*/) { 127void ARM_Unicorn::SetVectorReg(int /*index*/, u128 /*value*/) {
128 UNIMPLEMENTED(); 128 UNIMPLEMENTED();
129} 129}
130 130
@@ -217,8 +217,8 @@ void ARM_Unicorn::SaveContext(ThreadContext64& ctx) {
217 CHECKED(uc_reg_read(uc, UC_ARM64_REG_PC, &ctx.pc)); 217 CHECKED(uc_reg_read(uc, UC_ARM64_REG_PC, &ctx.pc));
218 CHECKED(uc_reg_read(uc, UC_ARM64_REG_NZCV, &ctx.pstate)); 218 CHECKED(uc_reg_read(uc, UC_ARM64_REG_NZCV, &ctx.pstate));
219 219
220 for (std::size_t i = 0; i < 29; ++i) { 220 for (auto i = 0; i < 29; ++i) {
221 uregs[i] = UC_ARM64_REG_X0 + static_cast<int>(i); 221 uregs[i] = UC_ARM64_REG_X0 + i;
222 tregs[i] = &ctx.cpu_registers[i]; 222 tregs[i] = &ctx.cpu_registers[i];
223 } 223 }
224 uregs[29] = UC_ARM64_REG_X29; 224 uregs[29] = UC_ARM64_REG_X29;
@@ -228,8 +228,8 @@ void ARM_Unicorn::SaveContext(ThreadContext64& ctx) {
228 228
229 CHECKED(uc_reg_read_batch(uc, uregs, tregs, 31)); 229 CHECKED(uc_reg_read_batch(uc, uregs, tregs, 31));
230 230
231 for (std::size_t i = 0; i < 32; ++i) { 231 for (int i = 0; i < 32; ++i) {
232 uregs[i] = UC_ARM64_REG_Q0 + static_cast<int>(i); 232 uregs[i] = UC_ARM64_REG_Q0 + i;
233 tregs[i] = &ctx.vector_registers[i]; 233 tregs[i] = &ctx.vector_registers[i];
234 } 234 }
235 235
@@ -244,8 +244,8 @@ void ARM_Unicorn::LoadContext(const ThreadContext64& ctx) {
244 CHECKED(uc_reg_write(uc, UC_ARM64_REG_PC, &ctx.pc)); 244 CHECKED(uc_reg_write(uc, UC_ARM64_REG_PC, &ctx.pc));
245 CHECKED(uc_reg_write(uc, UC_ARM64_REG_NZCV, &ctx.pstate)); 245 CHECKED(uc_reg_write(uc, UC_ARM64_REG_NZCV, &ctx.pstate));
246 246
247 for (std::size_t i = 0; i < 29; ++i) { 247 for (int i = 0; i < 29; ++i) {
248 uregs[i] = UC_ARM64_REG_X0 + static_cast<int>(i); 248 uregs[i] = UC_ARM64_REG_X0 + i;
249 tregs[i] = (void*)&ctx.cpu_registers[i]; 249 tregs[i] = (void*)&ctx.cpu_registers[i];
250 } 250 }
251 uregs[29] = UC_ARM64_REG_X29; 251 uregs[29] = UC_ARM64_REG_X29;
@@ -255,8 +255,8 @@ void ARM_Unicorn::LoadContext(const ThreadContext64& ctx) {
255 255
256 CHECKED(uc_reg_write_batch(uc, uregs, tregs, 31)); 256 CHECKED(uc_reg_write_batch(uc, uregs, tregs, 31));
257 257
258 for (std::size_t i = 0; i < 32; ++i) { 258 for (auto i = 0; i < 32; ++i) {
259 uregs[i] = UC_ARM64_REG_Q0 + static_cast<int>(i); 259 uregs[i] = UC_ARM64_REG_Q0 + i;
260 tregs[i] = (void*)&ctx.vector_registers[i]; 260 tregs[i] = (void*)&ctx.vector_registers[i];
261 } 261 }
262 262
diff --git a/src/core/arm/unicorn/arm_unicorn.h b/src/core/arm/unicorn/arm_unicorn.h
index 1183e9541..810aff311 100644
--- a/src/core/arm/unicorn/arm_unicorn.h
+++ b/src/core/arm/unicorn/arm_unicorn.h
@@ -26,10 +26,10 @@ public:
26 26
27 void SetPC(u64 pc) override; 27 void SetPC(u64 pc) override;
28 u64 GetPC() const override; 28 u64 GetPC() const override;
29 u64 GetReg(std::size_t index) const override; 29 u64 GetReg(int index) const override;
30 void SetReg(std::size_t index, u64 value) override; 30 void SetReg(int index, u64 value) override;
31 u128 GetVectorReg(std::size_t index) const override; 31 u128 GetVectorReg(int index) const override;
32 void SetVectorReg(std::size_t index, u128 value) override; 32 void SetVectorReg(int index, u128 value) override;
33 u32 GetPSTATE() const override; 33 u32 GetPSTATE() const override;
34 void SetPSTATE(u32 pstate) override; 34 void SetPSTATE(u32 pstate) override;
35 VAddr GetTlsAddress() const override; 35 VAddr GetTlsAddress() const override;