armemu: Fix construction of the CPSR

2 files changed, 5 insertions, 4 deletions

diff --git a/src/core/arm/skyeye_common/armdefs.h b/src/core/arm/skyeye_common/armdefs.h
index 28a4a0db4..34eb5aaf7 100644
--- a/src/core/arm/skyeye_common/armdefs.h
+++ b/src/core/arm/skyeye_common/armdefs.h
@@ -198,7 +198,7 @@ struct ARMul_State
         //ARMword translate_pc;
 
     /* add armv6 flags dyf:2010-08-09 */
-    ARMword GEFlag, EFlag, AFlag, QFlags;
+    ARMword GEFlag, EFlag, AFlag, QFlag;
     //chy:2003-08-19, used in arm v5e|xscale
     ARMword SFlag;
 #ifdef MODET
diff --git a/src/core/arm/skyeye_common/armemu.h b/src/core/arm/skyeye_common/armemu.h
index 7f7c0e682..e1b286f0f 100644
--- a/src/core/arm/skyeye_common/armemu.h
+++ b/src/core/arm/skyeye_common/armemu.h
@@ -34,7 +34,7 @@
 #define ZBIT (1L << 30)
 #define CBIT (1L << 29)
 #define VBIT (1L << 28)
-#define SBIT (1L << 27)
+#define QBIT (1L << 27)
 #define IBIT (1L << 7)
 #define FBIT (1L << 6)
 #define IFBITS (3L << 6)
@@ -156,13 +156,14 @@
 #define R15PCMODE (state->Reg[15] & (R15PCBITS | R15MODEBITS))
 #define R15MODE (state->Reg[15] & R15MODEBITS)
 
-#define ECC ((NFLAG << 31) | (ZFLAG << 30) | (CFLAG << 29) | (VFLAG << 28) | (SFLAG << 27))
+#define ECC ((NFLAG << 31) | (ZFLAG << 30) | (CFLAG << 29) | (VFLAG << 28) | (QFLAG << 27))
 #define EINT (IFFLAGS << 6)
 #define ER15INT (IFFLAGS << 26)
 #define EMODE (state->Mode)
+#define EGEBITS (state->GEFlag & 0x000F0000)
 
 #ifdef MODET
-#define CPSR (ECC | EINT | EMODE | (TFLAG << 5))
+#define CPSR (ECC | EGEBITS | (EFLAG << 9) | (AFLAG << 8) | EINT | (TFLAG << 5) | EMODE)
 #else
 #define CPSR (ECC | EINT | EMODE)
 #endif