ARM Core, Video Core, CitraQt, Citrace: Use CommonTypes types instead of the standard u?int*_t types.

1 files changed, 9 insertions, 8 deletions

diff --git a/src/core/arm/skyeye_common/vfp/vfp.cpp b/src/core/arm/skyeye_common/vfp/vfp.cpp
index 26f303de4..0537135e2 100644
--- a/src/core/arm/skyeye_common/vfp/vfp.cpp
+++ b/src/core/arm/skyeye_common/vfp/vfp.cpp
@@ -21,6 +21,7 @@
 /* Note: this file handles interface with arm core and vfp registers */
 
 #include "common/common_funcs.h"
+#include "common/common_types.h"
 #include "common/logging/log.h"
 
 #include "core/arm/skyeye_common/armstate.h"
@@ -110,30 +111,30 @@ void VMOVR(ARMul_State* state, u32 single, u32 d, u32 m)
 }
 
 /* Miscellaneous functions */
-int32_t vfp_get_float(ARMul_State* state, unsigned int reg)
+s32 vfp_get_float(ARMul_State* state, unsigned int reg)
 {
     LOG_TRACE(Core_ARM11, "VFP get float: s%d=[%08x]\n", reg, state->ExtReg[reg]);
     return state->ExtReg[reg];
 }
 
-void vfp_put_float(ARMul_State* state, int32_t val, unsigned int reg)
+void vfp_put_float(ARMul_State* state, s32 val, unsigned int reg)
 {
     LOG_TRACE(Core_ARM11, "VFP put float: s%d <= [%08x]\n", reg, val);
     state->ExtReg[reg] = val;
 }
 
-uint64_t vfp_get_double(ARMul_State* state, unsigned int reg)
+u64 vfp_get_double(ARMul_State* state, unsigned int reg)
 {
-    uint64_t result = ((uint64_t) state->ExtReg[reg*2+1])<<32 | state->ExtReg[reg*2];
+    u64 result = ((u64) state->ExtReg[reg*2+1])<<32 | state->ExtReg[reg*2];
     LOG_TRACE(Core_ARM11, "VFP get double: s[%d-%d]=[%016llx]\n", reg * 2 + 1, reg * 2, result);
     return result;
 }
 
-void vfp_put_double(ARMul_State* state, uint64_t val, unsigned int reg)
+void vfp_put_double(ARMul_State* state, u64 val, unsigned int reg)
 {
-    LOG_TRACE(Core_ARM11, "VFP put double: s[%d-%d] <= [%08x-%08x]\n", reg * 2 + 1, reg * 2, (uint32_t)(val >> 32), (uint32_t)(val & 0xffffffff));
-    state->ExtReg[reg*2] = (uint32_t) (val & 0xffffffff);
-    state->ExtReg[reg*2+1] = (uint32_t) (val>>32);
+    LOG_TRACE(Core_ARM11, "VFP put double: s[%d-%d] <= [%08x-%08x]\n", reg * 2 + 1, reg * 2, (u32)(val >> 32), (u32)(val & 0xffffffff));
+    state->ExtReg[reg*2] = (u32) (val & 0xffffffff);
+    state->ExtReg[reg*2+1] = (u32) (val>>32);
 }
 
 /*