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authorGravatar bunnei2014-05-08 17:16:35 -0400
committerGravatar bunnei2014-05-08 17:16:35 -0400
commitbdc54d0d4897841a4d24aee80311bfb1f0eba884 (patch)
tree558d87c83fe8f7e8e3e57644407c872244ee5a3a /src/core/arm/interpreter
parentMerge pull request #16 from Sethpaien/master (diff)
parentremoved unknown fields from GX_CmdBufferHeader (diff)
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Merge pull request #15 from bunnei/hle-services
Various fixes/improvements to HLE of 3DS services, mostly cleans up GSP call decoding
Diffstat (limited to 'src/core/arm/interpreter')
-rw-r--r--src/core/arm/interpreter/armemu.cpp39
-rw-r--r--src/core/arm/interpreter/armsupp.cpp61
2 files changed, 53 insertions, 47 deletions
diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp
index a35c5c8dc..1af684fe3 100644
--- a/src/core/arm/interpreter/armemu.cpp
+++ b/src/core/arm/interpreter/armemu.cpp
@@ -5536,14 +5536,15 @@ Handle_Load_Double (ARMul_State * state, ARMword instr)
5536 addr = base; 5536 addr = base;
5537 5537
5538 /* The address must be aligned on a 8 byte boundary. */ 5538 /* The address must be aligned on a 8 byte boundary. */
5539 if (addr & 0x7) { 5539 // FIX(Normatt): Disable strict alignment on LDRD/STRD
5540#ifdef ABORTS 5540// if (addr & 0x7) {
5541 ARMul_DATAABORT (addr); 5541//#ifdef ABORTS
5542#else 5542// ARMul_DATAABORT (addr);
5543 ARMul_UndefInstr (state, instr); 5543//#else
5544#endif 5544// ARMul_UndefInstr (state, instr);
5545 return; 5545//#endif
5546 } 5546// return;
5547// }
5547 5548
5548 /* For pre indexed or post indexed addressing modes, 5549 /* For pre indexed or post indexed addressing modes,
5549 check that the destination registers do not overlap 5550 check that the destination registers do not overlap
@@ -5640,14 +5641,15 @@ Handle_Store_Double (ARMul_State * state, ARMword instr)
5640 addr = base; 5641 addr = base;
5641 5642
5642 /* The address must be aligned on a 8 byte boundary. */ 5643 /* The address must be aligned on a 8 byte boundary. */
5643 if (addr & 0x7) { 5644 // FIX(Normatt): Disable strict alignment on LDRD/STRD
5644#ifdef ABORTS 5645// if (addr & 0x7) {
5645 ARMul_DATAABORT (addr); 5646//#ifdef ABORTS
5646#else 5647// ARMul_DATAABORT (addr);
5647 ARMul_UndefInstr (state, instr); 5648//#else
5648#endif 5649// ARMul_UndefInstr (state, instr);
5649 return; 5650//#endif
5650 } 5651// return;
5652// }
5651 5653
5652 /* For pre indexed or post indexed addressing modes, 5654 /* For pre indexed or post indexed addressing modes,
5653 check that the destination registers do not overlap 5655 check that the destination registers do not overlap
@@ -6405,6 +6407,8 @@ handle_v6_insn (ARMul_State * state, ARMword instr)
6405 if (state->Aborted) { 6407 if (state->Aborted) {
6406 TAKEABORT; 6408 TAKEABORT;
6407 } 6409 }
6410 // FIX(Normmatt): Handle RD in STREX/STREXB
6411 state->Reg[DESTReg] = 0; //Always succeed
6408 6412
6409 return 1; 6413 return 1;
6410 } 6414 }
@@ -6432,7 +6436,8 @@ handle_v6_insn (ARMul_State * state, ARMword instr)
6432 if (state->Aborted) { 6436 if (state->Aborted) {
6433 TAKEABORT; 6437 TAKEABORT;
6434 } 6438 }
6435 6439 // FIX(Normmatt): Handle RD in STREX/STREXB
6440 state->Reg[DESTReg] = 0; //Always succeed
6436 //printf("In %s, strexb not implemented\n", __FUNCTION__); 6441 //printf("In %s, strexb not implemented\n", __FUNCTION__);
6437 UNDEF_LSRBPC; 6442 UNDEF_LSRBPC;
6438 /* WRITESDEST (dest); */ 6443 /* WRITESDEST (dest); */
diff --git a/src/core/arm/interpreter/armsupp.cpp b/src/core/arm/interpreter/armsupp.cpp
index b2bbedc18..e531dceda 100644
--- a/src/core/arm/interpreter/armsupp.cpp
+++ b/src/core/arm/interpreter/armsupp.cpp
@@ -20,7 +20,7 @@
20 20
21//#include "ansidecl.h" 21//#include "ansidecl.h"
22#include "skyeye_defs.h" 22#include "skyeye_defs.h"
23#include "core/hle/mrc.h" 23#include "core/hle/coprocessor.h"
24#include "core/arm/disassembler/arm_disasm.h" 24#include "core/arm/disassembler/arm_disasm.h"
25 25
26unsigned xscale_cp15_cp_access_allowed (ARMul_State * state, unsigned reg, 26unsigned xscale_cp15_cp_access_allowed (ARMul_State * state, unsigned reg,
@@ -661,39 +661,40 @@ ARMul_STC (ARMul_State * state, ARMword instr, ARMword address)
661void 661void
662ARMul_MCR (ARMul_State * state, ARMword instr, ARMword source) 662ARMul_MCR (ARMul_State * state, ARMword instr, ARMword source)
663{ 663{
664 unsigned cpab; 664 HLE::CallMCR(instr, source);
665 //unsigned cpab;
665 666
666 //printf("SKYEYE ARMul_MCR, CPnum is %x, source %x\n",CPNum, source); 667 ////printf("SKYEYE ARMul_MCR, CPnum is %x, source %x\n",CPNum, source);
667 if (!CP_ACCESS_ALLOWED (state, CPNum)) { 668 //if (!CP_ACCESS_ALLOWED (state, CPNum)) {
668 //chy 2004-07-19 should fix in the future ????!!!! 669 // //chy 2004-07-19 should fix in the future ????!!!!
669 //printf("SKYEYE ARMul_MCR, ACCESS_not ALLOWed, UndefinedInstr CPnum is %x, source %x\n",CPNum, source); 670 // //printf("SKYEYE ARMul_MCR, ACCESS_not ALLOWed, UndefinedInstr CPnum is %x, source %x\n",CPNum, source);
670 ARMul_UndefInstr (state, instr); 671 // ARMul_UndefInstr (state, instr);
671 return; 672 // return;
672 } 673 //}
673 674
674 cpab = (state->MCR[CPNum]) (state, ARMul_FIRST, instr, source); 675 //cpab = (state->MCR[CPNum]) (state, ARMul_FIRST, instr, source);
675 676
676 while (cpab == ARMul_BUSY) { 677 //while (cpab == ARMul_BUSY) {
677 ARMul_Icycles (state, 1, 0); 678 // ARMul_Icycles (state, 1, 0);
678 679
679 if (IntPending (state)) { 680 // if (IntPending (state)) {
680 cpab = (state->MCR[CPNum]) (state, ARMul_INTERRUPT, 681 // cpab = (state->MCR[CPNum]) (state, ARMul_INTERRUPT,
681 instr, 0); 682 // instr, 0);
682 return; 683 // return;
683 } 684 // }
684 else 685 // else
685 cpab = (state->MCR[CPNum]) (state, ARMul_BUSY, instr, 686 // cpab = (state->MCR[CPNum]) (state, ARMul_BUSY, instr,
686 source); 687 // source);
687 } 688 //}
688 689
689 if (cpab == ARMul_CANT) { 690 //if (cpab == ARMul_CANT) {
690 printf ("SKYEYE ARMul_MCR, CANT, UndefinedInstr %x CPnum is %x, source %x\n", instr, CPNum, source); 691 // printf ("SKYEYE ARMul_MCR, CANT, UndefinedInstr %x CPnum is %x, source %x\n", instr, CPNum, source);
691 ARMul_Abort (state, ARMul_UndefinedInstrV); 692 // ARMul_Abort (state, ARMul_UndefinedInstrV);
692 } 693 //}
693 else { 694 //else {
694 BUSUSEDINCPCN; 695 // BUSUSEDINCPCN;
695 ARMul_Ccycles (state, 1, 0); 696 // ARMul_Ccycles (state, 1, 0);
696 } 697 //}
697} 698}
698 699
699/* This function does the Busy-Waiting for an MCRR instruction. */ 700/* This function does the Busy-Waiting for an MCRR instruction. */
@@ -739,7 +740,7 @@ ARMul_MRC (ARMul_State * state, ARMword instr)
739{ 740{
740 unsigned cpab; 741 unsigned cpab;
741 742
742 ARMword result = HLE::CallMRC((HLE::ARM11_MRC_OPERATION)BITS(20, 27)); 743 ARMword result = HLE::CallMRC(instr);
743 744
744 ////printf("SKYEYE ARMul_MRC, CPnum is %x, instr %x\n",CPNum, instr); 745 ////printf("SKYEYE ARMul_MRC, CPnum is %x, instr %x\n",CPNum, instr);
745 //if (!CP_ACCESS_ALLOWED (state, CPNum)) { 746 //if (!CP_ACCESS_ALLOWED (state, CPNum)) {