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| author | 2014-12-23 22:45:52 -0500 | |
|---|---|---|
| committer | 2014-12-25 22:46:44 -0500 | |
| commit | 4783133bbd651590b5116be95a5deda31fe9f4dc (patch) | |
| tree | daf8cd9fd9be955d30ba217087003ed653342cb3 /src/core/arm/interpreter | |
| parent | Update README.md (fix typo) (diff) | |
| download | yuzu-4783133bbd651590b5116be95a5deda31fe9f4dc.tar.gz yuzu-4783133bbd651590b5116be95a5deda31fe9f4dc.tar.xz yuzu-4783133bbd651590b5116be95a5deda31fe9f4dc.zip | |
ARM: Add a mechanism for faking CPU time elapsed during HLE.
- Also a few cleanups.
Diffstat (limited to 'src/core/arm/interpreter')
| -rw-r--r-- | src/core/arm/interpreter/arm_interpreter.cpp | 51 | ||||
| -rw-r--r-- | src/core/arm/interpreter/arm_interpreter.h | 6 |
2 files changed, 11 insertions, 46 deletions
diff --git a/src/core/arm/interpreter/arm_interpreter.cpp b/src/core/arm/interpreter/arm_interpreter.cpp index be04fc1a1..80ebc359e 100644 --- a/src/core/arm/interpreter/arm_interpreter.cpp +++ b/src/core/arm/interpreter/arm_interpreter.cpp | |||
| @@ -38,78 +38,43 @@ ARM_Interpreter::~ARM_Interpreter() { | |||
| 38 | delete state; | 38 | delete state; |
| 39 | } | 39 | } |
| 40 | 40 | ||
| 41 | /** | ||
| 42 | * Set the Program Counter to an address | ||
| 43 | * @param addr Address to set PC to | ||
| 44 | */ | ||
| 45 | void ARM_Interpreter::SetPC(u32 pc) { | 41 | void ARM_Interpreter::SetPC(u32 pc) { |
| 46 | state->pc = state->Reg[15] = pc; | 42 | state->pc = state->Reg[15] = pc; |
| 47 | } | 43 | } |
| 48 | 44 | ||
| 49 | /* | ||
| 50 | * Get the current Program Counter | ||
| 51 | * @return Returns current PC | ||
| 52 | */ | ||
| 53 | u32 ARM_Interpreter::GetPC() const { | 45 | u32 ARM_Interpreter::GetPC() const { |
| 54 | return state->pc; | 46 | return state->pc; |
| 55 | } | 47 | } |
| 56 | 48 | ||
| 57 | /** | ||
| 58 | * Get an ARM register | ||
| 59 | * @param index Register index (0-15) | ||
| 60 | * @return Returns the value in the register | ||
| 61 | */ | ||
| 62 | u32 ARM_Interpreter::GetReg(int index) const { | 49 | u32 ARM_Interpreter::GetReg(int index) const { |
| 63 | return state->Reg[index]; | 50 | return state->Reg[index]; |
| 64 | } | 51 | } |
| 65 | 52 | ||
| 66 | /** | ||
| 67 | * Set an ARM register | ||
| 68 | * @param index Register index (0-15) | ||
| 69 | * @param value Value to set register to | ||
| 70 | */ | ||
| 71 | void ARM_Interpreter::SetReg(int index, u32 value) { | 53 | void ARM_Interpreter::SetReg(int index, u32 value) { |
| 72 | state->Reg[index] = value; | 54 | state->Reg[index] = value; |
| 73 | } | 55 | } |
| 74 | 56 | ||
| 75 | /** | ||
| 76 | * Get the current CPSR register | ||
| 77 | * @return Returns the value of the CPSR register | ||
| 78 | */ | ||
| 79 | u32 ARM_Interpreter::GetCPSR() const { | 57 | u32 ARM_Interpreter::GetCPSR() const { |
| 80 | return state->Cpsr; | 58 | return state->Cpsr; |
| 81 | } | 59 | } |
| 82 | 60 | ||
| 83 | /** | ||
| 84 | * Set the current CPSR register | ||
| 85 | * @param cpsr Value to set CPSR to | ||
| 86 | */ | ||
| 87 | void ARM_Interpreter::SetCPSR(u32 cpsr) { | 61 | void ARM_Interpreter::SetCPSR(u32 cpsr) { |
| 88 | state->Cpsr = cpsr; | 62 | state->Cpsr = cpsr; |
| 89 | } | 63 | } |
| 90 | 64 | ||
| 91 | /** | ||
| 92 | * Returns the number of clock ticks since the last reset | ||
| 93 | * @return Returns number of clock ticks | ||
| 94 | */ | ||
| 95 | u64 ARM_Interpreter::GetTicks() const { | 65 | u64 ARM_Interpreter::GetTicks() const { |
| 96 | return ARMul_Time(state); | 66 | return state->NumInstrs; |
| 67 | } | ||
| 68 | |||
| 69 | void ARM_Interpreter::AddTicks(u64 ticks) { | ||
| 70 | state->NumInstrs += ticks; | ||
| 97 | } | 71 | } |
| 98 | 72 | ||
| 99 | /** | ||
| 100 | * Executes the given number of instructions | ||
| 101 | * @param num_instructions Number of instructions to executes | ||
| 102 | */ | ||
| 103 | void ARM_Interpreter::ExecuteInstructions(int num_instructions) { | 73 | void ARM_Interpreter::ExecuteInstructions(int num_instructions) { |
| 104 | state->NumInstrsToExecute = num_instructions - 1; | 74 | state->NumInstrsToExecute = num_instructions - 1; |
| 105 | ARMul_Emulate32(state); | 75 | ARMul_Emulate32(state); |
| 106 | } | 76 | } |
| 107 | 77 | ||
| 108 | /** | ||
| 109 | * Saves the current CPU context | ||
| 110 | * @param ctx Thread context to save | ||
| 111 | * @todo Do we need to save Reg[15] and NextInstr? | ||
| 112 | */ | ||
| 113 | void ARM_Interpreter::SaveContext(ThreadContext& ctx) { | 78 | void ARM_Interpreter::SaveContext(ThreadContext& ctx) { |
| 114 | memcpy(ctx.cpu_registers, state->Reg, sizeof(ctx.cpu_registers)); | 79 | memcpy(ctx.cpu_registers, state->Reg, sizeof(ctx.cpu_registers)); |
| 115 | memcpy(ctx.fpu_registers, state->ExtReg, sizeof(ctx.fpu_registers)); | 80 | memcpy(ctx.fpu_registers, state->ExtReg, sizeof(ctx.fpu_registers)); |
| @@ -126,11 +91,6 @@ void ARM_Interpreter::SaveContext(ThreadContext& ctx) { | |||
| 126 | ctx.mode = state->NextInstr; | 91 | ctx.mode = state->NextInstr; |
| 127 | } | 92 | } |
| 128 | 93 | ||
| 129 | /** | ||
| 130 | * Loads a CPU context | ||
| 131 | * @param ctx Thread context to load | ||
| 132 | * @param Do we need to load Reg[15] and NextInstr? | ||
| 133 | */ | ||
| 134 | void ARM_Interpreter::LoadContext(const ThreadContext& ctx) { | 94 | void ARM_Interpreter::LoadContext(const ThreadContext& ctx) { |
| 135 | memcpy(state->Reg, ctx.cpu_registers, sizeof(ctx.cpu_registers)); | 95 | memcpy(state->Reg, ctx.cpu_registers, sizeof(ctx.cpu_registers)); |
| 136 | memcpy(state->ExtReg, ctx.fpu_registers, sizeof(ctx.fpu_registers)); | 96 | memcpy(state->ExtReg, ctx.fpu_registers, sizeof(ctx.fpu_registers)); |
| @@ -147,7 +107,6 @@ void ARM_Interpreter::LoadContext(const ThreadContext& ctx) { | |||
| 147 | state->NextInstr = ctx.mode; | 107 | state->NextInstr = ctx.mode; |
| 148 | } | 108 | } |
| 149 | 109 | ||
| 150 | /// Prepare core for thread reschedule (if needed to correctly handle state) | ||
| 151 | void ARM_Interpreter::PrepareReschedule() { | 110 | void ARM_Interpreter::PrepareReschedule() { |
| 152 | state->NumInstrsToExecute = 0; | 111 | state->NumInstrsToExecute = 0; |
| 153 | } | 112 | } |
diff --git a/src/core/arm/interpreter/arm_interpreter.h b/src/core/arm/interpreter/arm_interpreter.h index b685215a0..019dad5df 100644 --- a/src/core/arm/interpreter/arm_interpreter.h +++ b/src/core/arm/interpreter/arm_interpreter.h | |||
| @@ -61,6 +61,12 @@ public: | |||
| 61 | u64 GetTicks() const override; | 61 | u64 GetTicks() const override; |
| 62 | 62 | ||
| 63 | /** | 63 | /** |
| 64 | * Advance the CPU core by the specified number of ticks (e.g. to simulate CPU execution time) | ||
| 65 | * @param ticks Number of ticks to advance the CPU core | ||
| 66 | */ | ||
| 67 | void AddTicks(u64 ticks) override; | ||
| 68 | |||
| 69 | /** | ||
| 64 | * Saves the current CPU context | 70 | * Saves the current CPU context |
| 65 | * @param ctx Thread context to save | 71 | * @param ctx Thread context to save |
| 66 | */ | 72 | */ |