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authorGravatar Yuri Kunde Schlesner2015-05-29 15:09:26 -0700
committerGravatar Yuri Kunde Schlesner2015-05-29 15:09:26 -0700
commita489a846563fc64f236c7ede69ce0eb34af3521a (patch)
tree706e345043532d90cd8ca5c41af67fc31dfa7d2e /src/core/arm/interpreter/armsupp.cpp
parentMerge pull request #817 from linkmauve/citra.ico (diff)
parentTravis: Add a check for trailing whitespace before any actual compilation. (diff)
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Merge pull request #818 from linkmauve/no-trailing-whitespace
Ban trailing whitespace from the entire project, forever
Diffstat (limited to 'src/core/arm/interpreter/armsupp.cpp')
-rw-r--r--src/core/arm/interpreter/armsupp.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/core/arm/interpreter/armsupp.cpp b/src/core/arm/interpreter/armsupp.cpp
index 1b078dc71..83f7f3e2c 100644
--- a/src/core/arm/interpreter/armsupp.cpp
+++ b/src/core/arm/interpreter/armsupp.cpp
@@ -628,7 +628,7 @@ void WriteCP15Register(ARMul_State* cpu, u32 value, u32 crn, u32 opcode_1, u32 c
628 cpu->CP15[CP15_DATA_SYNC_BARRIER] = value; 628 cpu->CP15[CP15_DATA_SYNC_BARRIER] = value;
629 else if (opcode_2 == 5) 629 else if (opcode_2 == 5)
630 cpu->CP15[CP15_DATA_MEMORY_BARRIER] = value; 630 cpu->CP15[CP15_DATA_MEMORY_BARRIER] = value;
631 631
632 } 632 }
633 else if (crn == 13 && opcode_1 == 0 && crm == 0 && opcode_2 == 2) 633 else if (crn == 13 && opcode_1 == 0 && crm == 0 && opcode_2 == 2)
634 { 634 {