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| author | 2014-12-17 21:44:13 -0500 | |
|---|---|---|
| committer | 2014-12-17 21:44:13 -0500 | |
| commit | a968adf50e5aeb1f9d0be0c8fa8152aa691569aa (patch) | |
| tree | fd695c1d869e61fef65ec99d2602d4f9b1027d52 /src/core/arm/interpreter/armemu.cpp | |
| parent | Merge pull request #292 from lioncash/backports (diff) | |
| parent | armemu: Implement UMAAL (diff) | |
| download | yuzu-a968adf50e5aeb1f9d0be0c8fa8152aa691569aa.tar.gz yuzu-a968adf50e5aeb1f9d0be0c8fa8152aa691569aa.tar.xz yuzu-a968adf50e5aeb1f9d0be0c8fa8152aa691569aa.zip | |
Merge pull request #295 from lioncash/umaal
armemu: Implement UMAAL
Diffstat (limited to 'src/core/arm/interpreter/armemu.cpp')
| -rw-r--r-- | src/core/arm/interpreter/armemu.cpp | 28 |
1 files changed, 25 insertions, 3 deletions
diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp index 14330156b..a36035e96 100644 --- a/src/core/arm/interpreter/armemu.cpp +++ b/src/core/arm/interpreter/armemu.cpp | |||
| @@ -1356,7 +1356,13 @@ mainswitch: | |||
| 1356 | } | 1356 | } |
| 1357 | break; | 1357 | break; |
| 1358 | 1358 | ||
| 1359 | case 0x04: /* SUB reg */ | 1359 | case 0x04: /* SUB reg */ |
| 1360 | // Signifies UMAAL | ||
| 1361 | if (state->is_v6 && BITS(4, 7) == 0x09) { | ||
| 1362 | if (handle_v6_insn(state, instr)) | ||
| 1363 | break; | ||
| 1364 | } | ||
| 1365 | |||
| 1360 | #ifdef MODET | 1366 | #ifdef MODET |
| 1361 | if (BITS (4, 7) == 0xB) { | 1367 | if (BITS (4, 7) == 0xB) { |
| 1362 | /* STRH immediate offset, no write-back, down, post indexed. */ | 1368 | /* STRH immediate offset, no write-back, down, post indexed. */ |
| @@ -5683,8 +5689,24 @@ L_stm_s_takeabort: | |||
| 5683 | case 0x03: | 5689 | case 0x03: |
| 5684 | printf ("Unhandled v6 insn: ldr\n"); | 5690 | printf ("Unhandled v6 insn: ldr\n"); |
| 5685 | break; | 5691 | break; |
| 5686 | case 0x04: | 5692 | case 0x04: // UMAAL |
| 5687 | printf ("Unhandled v6 insn: umaal\n"); | 5693 | { |
| 5694 | const u8 rm_idx = BITS(8, 11); | ||
| 5695 | const u8 rn_idx = BITS(0, 3); | ||
| 5696 | const u8 rd_lo_idx = BITS(12, 15); | ||
| 5697 | const u8 rd_hi_idx = BITS(16, 19); | ||
| 5698 | |||
| 5699 | const u32 rm_val = state->Reg[rm_idx]; | ||
| 5700 | const u32 rn_val = state->Reg[rn_idx]; | ||
| 5701 | const u32 rd_lo_val = state->Reg[rd_lo_idx]; | ||
| 5702 | const u32 rd_hi_val = state->Reg[rd_hi_idx]; | ||
| 5703 | |||
| 5704 | const u64 result = (rn_val * rm_val) + rd_lo_val + rd_hi_val; | ||
| 5705 | |||
| 5706 | state->Reg[rd_lo_idx] = (result & 0xFFFFFFFF); | ||
| 5707 | state->Reg[rd_hi_idx] = ((result >> 32) & 0xFFFFFFFF); | ||
| 5708 | return 1; | ||
| 5709 | } | ||
| 5688 | break; | 5710 | break; |
| 5689 | case 0x06: | 5711 | case 0x06: |
| 5690 | printf ("Unhandled v6 insn: mls/str\n"); | 5712 | printf ("Unhandled v6 insn: mls/str\n"); |