summaryrefslogtreecommitdiff
path: root/src/core/arm/dyncom
diff options
context:
space:
mode:
authorGravatar Lioncash2015-01-31 20:34:26 -0500
committerGravatar Lioncash2015-01-31 20:43:03 -0500
commitf44781fd7b0c5f99573e917ccdd92716a99a9b0d (patch)
treead31575f5653316488371cd654d961ce803e2c01 /src/core/arm/dyncom
parentMerge pull request #512 from lioncash/assignment (diff)
downloadyuzu-f44781fd7b0c5f99573e917ccdd92716a99a9b0d.tar.gz
yuzu-f44781fd7b0c5f99573e917ccdd92716a99a9b0d.tar.xz
yuzu-f44781fd7b0c5f99573e917ccdd92716a99a9b0d.zip
arm: Adios armemu
Diffstat (limited to 'src/core/arm/dyncom')
-rw-r--r--src/core/arm/dyncom/arm_dyncom_interpreter.cpp4
1 files changed, 0 insertions, 4 deletions
diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp
index 4e569fd9a..96d71cd50 100644
--- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp
+++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp
@@ -34,10 +34,6 @@ enum {
34 THUMB = (1 << 7) 34 THUMB = (1 << 7)
35}; 35};
36 36
37#undef BITS
38#undef BIT
39#define BITS(s, a, b) ((s << ((sizeof(s) * 8 - 1) - b)) >> (sizeof(s) * 8 - b + a - 1))
40#define BIT(s, n) ((s >> (n)) & 1)
41#define RM BITS(sht_oper, 0, 3) 37#define RM BITS(sht_oper, 0, 3)
42#define RS BITS(sht_oper, 8, 11) 38#define RS BITS(sht_oper, 8, 11)
43 39