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authorGravatar Yuri Kunde Schlesner2016-09-15 20:14:18 -0700
committerGravatar GitHub2016-09-15 20:14:18 -0700
commitf196924dddb68f4e47ab6da36552840f82616b90 (patch)
treebb57f41d9d26c4a75059f28165acaff88cfde652 /src/core/arm/dyncom
parentMerge pull request #2064 from linkmauve/remove-readdir_r (diff)
parentarm_dynarmic: Implement GetVFPSystemReg/SetVFPSystemReg. (diff)
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Merge pull request #2042 from bunnei/dynarmic
Interface ARM CPU JIT (Dynarmic)
Diffstat (limited to 'src/core/arm/dyncom')
-rw-r--r--src/core/arm/dyncom/arm_dyncom.cpp17
-rw-r--r--src/core/arm/dyncom/arm_dyncom.h3
2 files changed, 5 insertions, 15 deletions
diff --git a/src/core/arm/dyncom/arm_dyncom.cpp b/src/core/arm/dyncom/arm_dyncom.cpp
index ab77da965..d84917529 100644
--- a/src/core/arm/dyncom/arm_dyncom.cpp
+++ b/src/core/arm/dyncom/arm_dyncom.cpp
@@ -93,15 +93,6 @@ void ARM_DynCom::ExecuteInstructions(int num_instructions) {
93 AddTicks(ticks_executed); 93 AddTicks(ticks_executed);
94} 94}
95 95
96void ARM_DynCom::ResetContext(Core::ThreadContext& context, u32 stack_top, u32 entry_point, u32 arg) {
97 memset(&context, 0, sizeof(Core::ThreadContext));
98
99 context.cpu_registers[0] = arg;
100 context.pc = entry_point;
101 context.sp = stack_top;
102 context.cpsr = USER32MODE | ((entry_point & 1) << 5); // Usermode and THUMB mode
103}
104
105void ARM_DynCom::SaveContext(Core::ThreadContext& ctx) { 96void ARM_DynCom::SaveContext(Core::ThreadContext& ctx) {
106 memcpy(ctx.cpu_registers, state->Reg.data(), sizeof(ctx.cpu_registers)); 97 memcpy(ctx.cpu_registers, state->Reg.data(), sizeof(ctx.cpu_registers));
107 memcpy(ctx.fpu_registers, state->ExtReg.data(), sizeof(ctx.fpu_registers)); 98 memcpy(ctx.fpu_registers, state->ExtReg.data(), sizeof(ctx.fpu_registers));
@@ -111,8 +102,8 @@ void ARM_DynCom::SaveContext(Core::ThreadContext& ctx) {
111 ctx.pc = state->Reg[15]; 102 ctx.pc = state->Reg[15];
112 ctx.cpsr = state->Cpsr; 103 ctx.cpsr = state->Cpsr;
113 104
114 ctx.fpscr = state->VFP[1]; 105 ctx.fpscr = state->VFP[VFP_FPSCR];
115 ctx.fpexc = state->VFP[2]; 106 ctx.fpexc = state->VFP[VFP_FPEXC];
116} 107}
117 108
118void ARM_DynCom::LoadContext(const Core::ThreadContext& ctx) { 109void ARM_DynCom::LoadContext(const Core::ThreadContext& ctx) {
@@ -124,8 +115,8 @@ void ARM_DynCom::LoadContext(const Core::ThreadContext& ctx) {
124 state->Reg[15] = ctx.pc; 115 state->Reg[15] = ctx.pc;
125 state->Cpsr = ctx.cpsr; 116 state->Cpsr = ctx.cpsr;
126 117
127 state->VFP[1] = ctx.fpscr; 118 state->VFP[VFP_FPSCR] = ctx.fpscr;
128 state->VFP[2] = ctx.fpexc; 119 state->VFP[VFP_FPEXC] = ctx.fpexc;
129} 120}
130 121
131void ARM_DynCom::PrepareReschedule() { 122void ARM_DynCom::PrepareReschedule() {
diff --git a/src/core/arm/dyncom/arm_dyncom.h b/src/core/arm/dyncom/arm_dyncom.h
index e763abc24..70f71a828 100644
--- a/src/core/arm/dyncom/arm_dyncom.h
+++ b/src/core/arm/dyncom/arm_dyncom.h
@@ -16,7 +16,7 @@ namespace Core {
16struct ThreadContext; 16struct ThreadContext;
17} 17}
18 18
19class ARM_DynCom final : virtual public ARM_Interface { 19class ARM_DynCom final : public ARM_Interface {
20public: 20public:
21 ARM_DynCom(PrivilegeMode initial_mode); 21 ARM_DynCom(PrivilegeMode initial_mode);
22 ~ARM_DynCom(); 22 ~ARM_DynCom();
@@ -38,7 +38,6 @@ public:
38 38
39 void AddTicks(u64 ticks) override; 39 void AddTicks(u64 ticks) override;
40 40
41 void ResetContext(Core::ThreadContext& context, u32 stack_top, u32 entry_point, u32 arg) override;
42 void SaveContext(Core::ThreadContext& ctx) override; 41 void SaveContext(Core::ThreadContext& ctx) override;
43 void LoadContext(const Core::ThreadContext& ctx) override; 42 void LoadContext(const Core::ThreadContext& ctx) override;
44 43