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authorGravatar bunnei2015-01-30 17:11:12 -0500
committerGravatar bunnei2015-01-30 17:11:12 -0500
commitdbff4e5e1226e16fdf5d79f2b57847bb5107149a (patch)
tree6660a9871dc598af77ec546b0aea6198a65ef29f /src/core/arm/dyncom
parentMerge pull request #513 from lioncash/cleanup (diff)
parentdyncom: clean up arm_dyncom_dec.h (diff)
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Merge pull request #516 from lioncash/cleanup
ARM: More cleanup.
Diffstat (limited to 'src/core/arm/dyncom')
-rw-r--r--src/core/arm/dyncom/arm_dyncom.cpp1
-rw-r--r--src/core/arm/dyncom/arm_dyncom_dec.h45
-rw-r--r--src/core/arm/dyncom/arm_dyncom_run.h7
-rw-r--r--src/core/arm/dyncom/arm_dyncom_thumb.h6
4 files changed, 4 insertions, 55 deletions
diff --git a/src/core/arm/dyncom/arm_dyncom.cpp b/src/core/arm/dyncom/arm_dyncom.cpp
index 9c4cc90f2..01ffbcc87 100644
--- a/src/core/arm/dyncom/arm_dyncom.cpp
+++ b/src/core/arm/dyncom/arm_dyncom.cpp
@@ -2,7 +2,6 @@
2// Licensed under GPLv2 or any later version 2// Licensed under GPLv2 or any later version
3// Refer to the license.txt file included. 3// Refer to the license.txt file included.
4 4
5#include "core/arm/skyeye_common/armcpu.h"
6#include "core/arm/skyeye_common/armemu.h" 5#include "core/arm/skyeye_common/armemu.h"
7#include "core/arm/skyeye_common/vfp/vfp.h" 6#include "core/arm/skyeye_common/vfp/vfp.h"
8 7
diff --git a/src/core/arm/dyncom/arm_dyncom_dec.h b/src/core/arm/dyncom/arm_dyncom_dec.h
index 58784aeea..ee8ff5992 100644
--- a/src/core/arm/dyncom/arm_dyncom_dec.h
+++ b/src/core/arm/dyncom/arm_dyncom_dec.h
@@ -6,14 +6,6 @@
6 6
7#define BITS(a,b) ((instr >> (a)) & ((1 << (1+(b)-(a)))-1)) 7#define BITS(a,b) ((instr >> (a)) & ((1 << (1+(b)-(a)))-1))
8#define BIT(n) ((instr >> (n)) & 1) 8#define BIT(n) ((instr >> (n)) & 1)
9#define BAD do { printf("meet BAD at %s, instr is %x\n", __FUNCTION__, instr ); } while(0);
10#define ptr_N cpu->ptr_N
11#define ptr_Z cpu->ptr_Z
12#define ptr_C cpu->ptr_C
13#define ptr_V cpu->ptr_V
14#define ptr_I cpu->ptr_I
15#define ptr_T cpu->ptr_T
16#define ptr_CPSR cpu->ptr_gpr[16]
17 9
18// For MUL instructions 10// For MUL instructions
19#define RDHi ((instr >> 16) & 0xF) 11#define RDHi ((instr >> 16) & 0xF)
@@ -49,24 +41,6 @@
49#define SBIT BIT(20) 41#define SBIT BIT(20)
50#define DESTReg (BITS (12, 15)) 42#define DESTReg (BITS (12, 15))
51 43
52// They are in unused state, give a corrent value when using
53#define IS_V5E 0
54#define IS_V5 0
55#define IS_V6 0
56#define LHSReg 0
57
58// Temp define the using the pc reg need implement a flow
59#define STORE_CHECK_RD_PC ADD(R(RD), CONST(INSTR_SIZE * 2))
60
61#define OPERAND operand(cpu,instr,bb,NULL)
62#define SCO_OPERAND(sco) operand(cpu,instr,bb,sco)
63#define BOPERAND boperand(instr)
64
65#define CHECK_RN_PC (RN == 15 ? ADD(AND(R(RN), CONST(~0x1)), CONST(INSTR_SIZE * 2)) : R(RN))
66#define CHECK_RN_PC_WA (RN == 15 ? ADD(AND(R(RN), CONST(~0x3)), CONST(INSTR_SIZE * 2)) : R(RN))
67
68#define GET_USER_MODE() (OR(ICMP_EQ(R(MODE_REG), CONST(USER32MODE)), ICMP_EQ(R(MODE_REG), CONST(SYSTEM32MODE))))
69
70int decode_arm_instr(uint32_t instr, int32_t *idx); 44int decode_arm_instr(uint32_t instr, int32_t *idx);
71 45
72enum DECODE_STATUS { 46enum DECODE_STATUS {
@@ -83,23 +57,8 @@ struct instruction_set_encoding_item {
83 57
84typedef struct instruction_set_encoding_item ISEITEM; 58typedef struct instruction_set_encoding_item ISEITEM;
85 59
86#define RECORD_WB(value, flag) { cpu->dyncom_engine->wb_value = value;cpu->dyncom_engine->wb_flag = flag; } 60// ARM versions
87#define INIT_WB(wb_value, wb_flag) RECORD_WB(wb_value, wb_flag) 61enum {
88
89#define EXECUTE_WB(base_reg) { if(cpu->dyncom_engine->wb_flag) LET(base_reg, cpu->dyncom_engine->wb_value); }
90
91inline int get_reg_count(uint32_t instr) {
92 int i = BITS(0, 15);
93 int count = 0;
94 while (i) {
95 if (i & 1)
96 count++;
97 i = i >> 1;
98 }
99 return count;
100}
101
102enum ARMVER {
103 INVALID = 0, 62 INVALID = 0,
104 ARMALL, 63 ARMALL,
105 ARMV4, 64 ARMV4,
diff --git a/src/core/arm/dyncom/arm_dyncom_run.h b/src/core/arm/dyncom/arm_dyncom_run.h
index c70522274..b1c0daaf7 100644
--- a/src/core/arm/dyncom/arm_dyncom_run.h
+++ b/src/core/arm/dyncom/arm_dyncom_run.h
@@ -16,10 +16,7 @@
16* 16*
17*/ 17*/
18 18
19#ifndef __ARM_DYNCOM_RUN__ 19#pragma once
20#define __ARM_DYNCOM_RUN__
21
22#include "core/arm/skyeye_common/skyeye_types.h"
23 20
24void switch_mode(arm_core_t *core, uint32_t mode); 21void switch_mode(arm_core_t *core, uint32_t mode);
25 22
@@ -51,5 +48,3 @@ static inline addr_t CHECK_READ_REG15_WA(arm_core_t* core, int Rn) {
51static inline u32 CHECK_READ_REG15(arm_core_t* core, int Rn) { 48static inline u32 CHECK_READ_REG15(arm_core_t* core, int Rn) {
52 return (Rn == 15)? ((core->Reg[15] & ~0x1) + GET_INST_SIZE(core) * 2) : core->Reg[Rn]; 49 return (Rn == 15)? ((core->Reg[15] & ~0x1) + GET_INST_SIZE(core) * 2) : core->Reg[Rn];
53} 50}
54
55#endif
diff --git a/src/core/arm/dyncom/arm_dyncom_thumb.h b/src/core/arm/dyncom/arm_dyncom_thumb.h
index bf69b2fd4..a1785abb8 100644
--- a/src/core/arm/dyncom/arm_dyncom_thumb.h
+++ b/src/core/arm/dyncom/arm_dyncom_thumb.h
@@ -24,11 +24,9 @@
24* @date 2011-11-07 24* @date 2011-11-07
25*/ 25*/
26 26
27#ifndef __ARM_DYNCOM_THUMB_H__ 27#pragma once
28#define __ARM_DYNCOM_THUMB_H__
29 28
30#include "core/arm/skyeye_common/armdefs.h" 29#include "core/arm/skyeye_common/armdefs.h"
31#include "core/arm/skyeye_common/skyeye_types.h"
32 30
33enum tdstate { 31enum tdstate {
34 t_undefined, // Undefined Thumb instruction 32 t_undefined, // Undefined Thumb instruction
@@ -47,5 +45,3 @@ static inline u32 get_thumb_instr(u32 instr, addr_t pc) {
47 tinstr = instr & 0xFFFF; 45 tinstr = instr & 0xFFFF;
48 return tinstr; 46 return tinstr;
49} 47}
50
51#endif