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| author | 2015-12-06 15:03:06 -0500 | |
|---|---|---|
| committer | 2015-12-06 15:03:06 -0500 | |
| commit | d03e7f08ff0f6ddbc98a92c01ad013128d9ba564 (patch) | |
| tree | 6e7a6dda60436c57042e5fab9e7ede23a1da4894 /src/core/arm/dyncom | |
| parent | Merge pull request #1252 from Subv/cam (diff) | |
| download | yuzu-d03e7f08ff0f6ddbc98a92c01ad013128d9ba564.tar.gz yuzu-d03e7f08ff0f6ddbc98a92c01ad013128d9ba564.tar.xz yuzu-d03e7f08ff0f6ddbc98a92c01ad013128d9ba564.zip | |
dyncom: const correctness changes
Diffstat (limited to 'src/core/arm/dyncom')
| -rw-r--r-- | src/core/arm/dyncom/arm_dyncom_interpreter.cpp | 2 | ||||
| -rw-r--r-- | src/core/arm/dyncom/arm_dyncom_run.h | 4 |
2 files changed, 3 insertions, 3 deletions
diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp index 96c88c83a..2cff2a26a 100644 --- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp +++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp | |||
| @@ -51,7 +51,7 @@ enum { | |||
| 51 | 51 | ||
| 52 | typedef unsigned int (*shtop_fp_t)(ARMul_State* cpu, unsigned int sht_oper); | 52 | typedef unsigned int (*shtop_fp_t)(ARMul_State* cpu, unsigned int sht_oper); |
| 53 | 53 | ||
| 54 | static bool CondPassed(ARMul_State* cpu, unsigned int cond) { | 54 | static bool CondPassed(const ARMul_State* cpu, unsigned int cond) { |
| 55 | const bool n_flag = cpu->NFlag != 0; | 55 | const bool n_flag = cpu->NFlag != 0; |
| 56 | const bool z_flag = cpu->ZFlag != 0; | 56 | const bool z_flag = cpu->ZFlag != 0; |
| 57 | const bool c_flag = cpu->CFlag != 0; | 57 | const bool c_flag = cpu->CFlag != 0; |
diff --git a/src/core/arm/dyncom/arm_dyncom_run.h b/src/core/arm/dyncom/arm_dyncom_run.h index 13bef17fc..85c8d798e 100644 --- a/src/core/arm/dyncom/arm_dyncom_run.h +++ b/src/core/arm/dyncom/arm_dyncom_run.h | |||
| @@ -30,7 +30,7 @@ | |||
| 30 | * @return If the PC is being read, then the word-aligned PC value is returned. | 30 | * @return If the PC is being read, then the word-aligned PC value is returned. |
| 31 | * If the PC is not being read, then the value stored in the register is returned. | 31 | * If the PC is not being read, then the value stored in the register is returned. |
| 32 | */ | 32 | */ |
| 33 | static inline u32 CHECK_READ_REG15_WA(ARMul_State* cpu, int Rn) { | 33 | static inline u32 CHECK_READ_REG15_WA(const ARMul_State* cpu, int Rn) { |
| 34 | return (Rn == 15) ? ((cpu->Reg[15] & ~0x3) + cpu->GetInstructionSize() * 2) : cpu->Reg[Rn]; | 34 | return (Rn == 15) ? ((cpu->Reg[15] & ~0x3) + cpu->GetInstructionSize() * 2) : cpu->Reg[Rn]; |
| 35 | } | 35 | } |
| 36 | 36 | ||
| @@ -43,6 +43,6 @@ static inline u32 CHECK_READ_REG15_WA(ARMul_State* cpu, int Rn) { | |||
| 43 | * @return If the PC is being read, then the incremented PC value is returned. | 43 | * @return If the PC is being read, then the incremented PC value is returned. |
| 44 | * If the PC is not being read, then the values stored in the register is returned. | 44 | * If the PC is not being read, then the values stored in the register is returned. |
| 45 | */ | 45 | */ |
| 46 | static inline u32 CHECK_READ_REG15(ARMul_State* cpu, int Rn) { | 46 | static inline u32 CHECK_READ_REG15(const ARMul_State* cpu, int Rn) { |
| 47 | return (Rn == 15) ? ((cpu->Reg[15] & ~0x1) + cpu->GetInstructionSize() * 2) : cpu->Reg[Rn]; | 47 | return (Rn == 15) ? ((cpu->Reg[15] & ~0x1) + cpu->GetInstructionSize() * 2) : cpu->Reg[Rn]; |
| 48 | } | 48 | } |