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authorGravatar Lioncash2015-01-31 21:44:35 -0500
committerGravatar Lioncash2015-01-31 21:55:34 -0500
commit3f00dd911780552c77575d3176860f576ebc0fdb (patch)
treec80ea3a4035a20810fb5914f3bfc99f392376939 /src/core/arm/dyncom
parentMerge pull request #522 from lioncash/adios (diff)
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arm: Clean up ARMul_State
Remove unnecessary/unused struct variables.
Diffstat (limited to 'src/core/arm/dyncom')
-rw-r--r--src/core/arm/dyncom/arm_dyncom.cpp9
1 files changed, 3 insertions, 6 deletions
diff --git a/src/core/arm/dyncom/arm_dyncom.cpp b/src/core/arm/dyncom/arm_dyncom.cpp
index 01ffbcc87..f6628ca33 100644
--- a/src/core/arm/dyncom/arm_dyncom.cpp
+++ b/src/core/arm/dyncom/arm_dyncom.cpp
@@ -36,9 +36,8 @@ ARM_DynCom::ARM_DynCom() {
36 state->NextInstr = RESUME; // NOTE: This will be overwritten by LoadContext 36 state->NextInstr = RESUME; // NOTE: This will be overwritten by LoadContext
37 state->Emulate = 3; 37 state->Emulate = 3;
38 38
39 state->pc = state->Reg[15] = 0x00000000; 39 state->Reg[15] = 0x00000000;
40 state->Reg[13] = 0x10000000; // Set stack pointer to the top of the stack 40 state->Reg[13] = 0x10000000; // Set stack pointer to the top of the stack
41 state->servaddr = 0xFFFF0000;
42 state->NirqSig = HIGH; 41 state->NirqSig = HIGH;
43 42
44 VFPInit(state.get()); // Initialize the VFP 43 VFPInit(state.get()); // Initialize the VFP
@@ -50,7 +49,7 @@ ARM_DynCom::~ARM_DynCom() {
50} 49}
51 50
52void ARM_DynCom::SetPC(u32 pc) { 51void ARM_DynCom::SetPC(u32 pc) {
53 state->pc = state->Reg[15] = pc; 52 state->Reg[15] = pc;
54} 53}
55 54
56u32 ARM_DynCom::GetPC() const { 55u32 ARM_DynCom::GetPC() const {
@@ -106,7 +105,6 @@ void ARM_DynCom::SaveContext(Core::ThreadContext& ctx) {
106 ctx.fpscr = state->VFP[1]; 105 ctx.fpscr = state->VFP[1];
107 ctx.fpexc = state->VFP[2]; 106 ctx.fpexc = state->VFP[2];
108 107
109 ctx.reg_15 = state->Reg[15];
110 ctx.mode = state->NextInstr; 108 ctx.mode = state->NextInstr;
111} 109}
112 110
@@ -116,13 +114,12 @@ void ARM_DynCom::LoadContext(const Core::ThreadContext& ctx) {
116 114
117 state->Reg[13] = ctx.sp; 115 state->Reg[13] = ctx.sp;
118 state->Reg[14] = ctx.lr; 116 state->Reg[14] = ctx.lr;
119 state->pc = ctx.pc; 117 state->Reg[15] = ctx.pc;
120 state->Cpsr = ctx.cpsr; 118 state->Cpsr = ctx.cpsr;
121 119
122 state->VFP[1] = ctx.fpscr; 120 state->VFP[1] = ctx.fpscr;
123 state->VFP[2] = ctx.fpexc; 121 state->VFP[2] = ctx.fpexc;
124 122
125 state->Reg[15] = ctx.reg_15;
126 state->NextInstr = ctx.mode; 123 state->NextInstr = ctx.mode;
127} 124}
128 125