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| author | 2015-09-02 08:56:38 -0400 | |
|---|---|---|
| committer | 2015-10-04 11:16:59 -0400 | |
| commit | 31dee93e849d79a91f280faf16941806e3cb3c6b (patch) | |
| tree | 22f64217b38dfa38b25a772f9fc5a9b025e1cbd6 /src/core/arm/dyncom | |
| parent | OS X build uploading: auto-confirm SSH host key (diff) | |
| download | yuzu-31dee93e849d79a91f280faf16941806e3cb3c6b.tar.gz yuzu-31dee93e849d79a91f280faf16941806e3cb3c6b.tar.xz yuzu-31dee93e849d79a91f280faf16941806e3cb3c6b.zip | |
Implement gdbstub
Diffstat (limited to 'src/core/arm/dyncom')
| -rw-r--r-- | src/core/arm/dyncom/arm_dyncom_interpreter.cpp | 41 |
1 files changed, 32 insertions, 9 deletions
diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp index fbd6f94f9..8293f4c60 100644 --- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp +++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp | |||
| @@ -23,6 +23,8 @@ | |||
| 23 | #include "core/arm/skyeye_common/armsupp.h" | 23 | #include "core/arm/skyeye_common/armsupp.h" |
| 24 | #include "core/arm/skyeye_common/vfp/vfp.h" | 24 | #include "core/arm/skyeye_common/vfp/vfp.h" |
| 25 | 25 | ||
| 26 | #include "core/gdbstub/gdbstub.h" | ||
| 27 | |||
| 26 | Common::Profiling::TimingCategory profile_execute("DynCom::Execute"); | 28 | Common::Profiling::TimingCategory profile_execute("DynCom::Execute"); |
| 27 | Common::Profiling::TimingCategory profile_decode("DynCom::Decode"); | 29 | Common::Profiling::TimingCategory profile_decode("DynCom::Decode"); |
| 28 | 30 | ||
| @@ -3548,6 +3550,7 @@ static int InterpreterTranslate(ARMul_State* cpu, int& bb_start, u32 addr) { | |||
| 3548 | CITRA_IGNORE_EXIT(-1); | 3550 | CITRA_IGNORE_EXIT(-1); |
| 3549 | } | 3551 | } |
| 3550 | inst_base = arm_instruction_trans[idx](inst, idx); | 3552 | inst_base = arm_instruction_trans[idx](inst, idx); |
| 3553 | |||
| 3551 | translated: | 3554 | translated: |
| 3552 | phys_addr += inst_size; | 3555 | phys_addr += inst_size; |
| 3553 | 3556 | ||
| @@ -3580,6 +3583,8 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) { | |||
| 3580 | Common::Profiling::ScopeTimer timer_execute(profile_execute); | 3583 | Common::Profiling::ScopeTimer timer_execute(profile_execute); |
| 3581 | MICROPROFILE_SCOPE(DynCom_Execute); | 3584 | MICROPROFILE_SCOPE(DynCom_Execute); |
| 3582 | 3585 | ||
| 3586 | int breakpoint_offset = -1; | ||
| 3587 | |||
| 3583 | #undef RM | 3588 | #undef RM |
| 3584 | #undef RS | 3589 | #undef RS |
| 3585 | 3590 | ||
| @@ -3604,15 +3609,27 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) { | |||
| 3604 | #define INC_PC(l) ptr += sizeof(arm_inst) + l | 3609 | #define INC_PC(l) ptr += sizeof(arm_inst) + l |
| 3605 | #define INC_PC_STUB ptr += sizeof(arm_inst) | 3610 | #define INC_PC_STUB ptr += sizeof(arm_inst) |
| 3606 | 3611 | ||
| 3612 | #define GDB_BP_CHECK \ | ||
| 3613 | cpu->Cpsr &= ~(1 << 5); \ | ||
| 3614 | cpu->Cpsr |= cpu->TFlag << 5; \ | ||
| 3615 | if (GDBStub::g_server_enabled) { \ | ||
| 3616 | if (GDBStub::IsMemoryBreak() || PC == breakpoint_offset) { \ | ||
| 3617 | GDBStub::Break(); \ | ||
| 3618 | goto END; \ | ||
| 3619 | } \ | ||
| 3620 | } | ||
| 3621 | |||
| 3607 | // GCC and Clang have a C++ extension to support a lookup table of labels. Otherwise, fallback to a | 3622 | // GCC and Clang have a C++ extension to support a lookup table of labels. Otherwise, fallback to a |
| 3608 | // clunky switch statement. | 3623 | // clunky switch statement. |
| 3609 | #if defined __GNUC__ || defined __clang__ | 3624 | #if defined __GNUC__ || defined __clang__ |
| 3610 | #define GOTO_NEXT_INST \ | 3625 | #define GOTO_NEXT_INST \ |
| 3626 | GDB_BP_CHECK; \ | ||
| 3611 | if (num_instrs >= cpu->NumInstrsToExecute) goto END; \ | 3627 | if (num_instrs >= cpu->NumInstrsToExecute) goto END; \ |
| 3612 | num_instrs++; \ | 3628 | num_instrs++; \ |
| 3613 | goto *InstLabel[inst_base->idx] | 3629 | goto *InstLabel[inst_base->idx] |
| 3614 | #else | 3630 | #else |
| 3615 | #define GOTO_NEXT_INST \ | 3631 | #define GOTO_NEXT_INST \ |
| 3632 | GDB_BP_CHECK; \ | ||
| 3616 | if (num_instrs >= cpu->NumInstrsToExecute) goto END; \ | 3633 | if (num_instrs >= cpu->NumInstrsToExecute) goto END; \ |
| 3617 | num_instrs++; \ | 3634 | num_instrs++; \ |
| 3618 | switch(inst_base->idx) { \ | 3635 | switch(inst_base->idx) { \ |
| @@ -3878,6 +3895,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) { | |||
| 3878 | unsigned int addr; | 3895 | unsigned int addr; |
| 3879 | unsigned int num_instrs = 0; | 3896 | unsigned int num_instrs = 0; |
| 3880 | 3897 | ||
| 3898 | |||
| 3881 | int ptr; | 3899 | int ptr; |
| 3882 | 3900 | ||
| 3883 | LOAD_NZCVT; | 3901 | LOAD_NZCVT; |
| @@ -3903,6 +3921,11 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) { | |||
| 3903 | goto END; | 3921 | goto END; |
| 3904 | } | 3922 | } |
| 3905 | 3923 | ||
| 3924 | // Find breakpoint if one exists within the block | ||
| 3925 | if (GDBStub::g_server_enabled && GDBStub::IsConnected()) { | ||
| 3926 | breakpoint_offset = GDBStub::GetNextBreakpointFromAddress(cpu->Reg[15], GDBStub::BreakpointType::Execute); | ||
| 3927 | } | ||
| 3928 | |||
| 3906 | inst_base = (arm_inst *)&inst_buf[ptr]; | 3929 | inst_base = (arm_inst *)&inst_buf[ptr]; |
| 3907 | GOTO_NEXT_INST; | 3930 | GOTO_NEXT_INST; |
| 3908 | } | 3931 | } |
| @@ -4454,7 +4477,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) { | |||
| 4454 | ldst_inst* inst_cream = (ldst_inst*)inst_base->component; | 4477 | ldst_inst* inst_cream = (ldst_inst*)inst_base->component; |
| 4455 | inst_cream->get_addr(cpu, inst_cream->inst, addr); | 4478 | inst_cream->get_addr(cpu, inst_cream->inst, addr); |
| 4456 | 4479 | ||
| 4457 | cpu->Reg[BITS(inst_cream->inst, 12, 15)] = Memory::Read8(addr); | 4480 | cpu->Reg[BITS(inst_cream->inst, 12, 15)] = cpu->ReadMemory8(addr); |
| 4458 | 4481 | ||
| 4459 | if (BITS(inst_cream->inst, 12, 15) == 15) { | 4482 | if (BITS(inst_cream->inst, 12, 15) == 15) { |
| 4460 | INC_PC(sizeof(ldst_inst)); | 4483 | INC_PC(sizeof(ldst_inst)); |
| @@ -4472,7 +4495,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) { | |||
| 4472 | ldst_inst* inst_cream = (ldst_inst*)inst_base->component; | 4495 | ldst_inst* inst_cream = (ldst_inst*)inst_base->component; |
| 4473 | inst_cream->get_addr(cpu, inst_cream->inst, addr); | 4496 | inst_cream->get_addr(cpu, inst_cream->inst, addr); |
| 4474 | 4497 | ||
| 4475 | cpu->Reg[BITS(inst_cream->inst, 12, 15)] = Memory::Read8(addr); | 4498 | cpu->Reg[BITS(inst_cream->inst, 12, 15)] = cpu->ReadMemory8(addr); |
| 4476 | 4499 | ||
| 4477 | if (BITS(inst_cream->inst, 12, 15) == 15) { | 4500 | if (BITS(inst_cream->inst, 12, 15) == 15) { |
| 4478 | INC_PC(sizeof(ldst_inst)); | 4501 | INC_PC(sizeof(ldst_inst)); |
| @@ -4531,7 +4554,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) { | |||
| 4531 | 4554 | ||
| 4532 | cpu->SetExclusiveMemoryAddress(read_addr); | 4555 | cpu->SetExclusiveMemoryAddress(read_addr); |
| 4533 | 4556 | ||
| 4534 | RD = Memory::Read8(read_addr); | 4557 | RD = cpu->ReadMemory8(read_addr); |
| 4535 | if (inst_cream->Rd == 15) { | 4558 | if (inst_cream->Rd == 15) { |
| 4536 | INC_PC(sizeof(generic_arm_inst)); | 4559 | INC_PC(sizeof(generic_arm_inst)); |
| 4537 | goto DISPATCH; | 4560 | goto DISPATCH; |
| @@ -4604,7 +4627,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) { | |||
| 4604 | if (inst_base->cond == ConditionCode::AL || CondPassed(cpu, inst_base->cond)) { | 4627 | if (inst_base->cond == ConditionCode::AL || CondPassed(cpu, inst_base->cond)) { |
| 4605 | ldst_inst* inst_cream = (ldst_inst*)inst_base->component; | 4628 | ldst_inst* inst_cream = (ldst_inst*)inst_base->component; |
| 4606 | inst_cream->get_addr(cpu, inst_cream->inst, addr); | 4629 | inst_cream->get_addr(cpu, inst_cream->inst, addr); |
| 4607 | unsigned int value = Memory::Read8(addr); | 4630 | unsigned int value = cpu->ReadMemory8(addr); |
| 4608 | if (BIT(value, 7)) { | 4631 | if (BIT(value, 7)) { |
| 4609 | value |= 0xffffff00; | 4632 | value |= 0xffffff00; |
| 4610 | } | 4633 | } |
| @@ -6027,7 +6050,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) { | |||
| 6027 | ldst_inst* inst_cream = (ldst_inst*)inst_base->component; | 6050 | ldst_inst* inst_cream = (ldst_inst*)inst_base->component; |
| 6028 | inst_cream->get_addr(cpu, inst_cream->inst, addr); | 6051 | inst_cream->get_addr(cpu, inst_cream->inst, addr); |
| 6029 | unsigned int value = cpu->Reg[BITS(inst_cream->inst, 12, 15)] & 0xff; | 6052 | unsigned int value = cpu->Reg[BITS(inst_cream->inst, 12, 15)] & 0xff; |
| 6030 | Memory::Write8(addr, value); | 6053 | cpu->WriteMemory8(addr, value); |
| 6031 | } | 6054 | } |
| 6032 | cpu->Reg[15] += cpu->GetInstructionSize(); | 6055 | cpu->Reg[15] += cpu->GetInstructionSize(); |
| 6033 | INC_PC(sizeof(ldst_inst)); | 6056 | INC_PC(sizeof(ldst_inst)); |
| @@ -6040,7 +6063,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) { | |||
| 6040 | ldst_inst* inst_cream = (ldst_inst*)inst_base->component; | 6063 | ldst_inst* inst_cream = (ldst_inst*)inst_base->component; |
| 6041 | inst_cream->get_addr(cpu, inst_cream->inst, addr); | 6064 | inst_cream->get_addr(cpu, inst_cream->inst, addr); |
| 6042 | unsigned int value = cpu->Reg[BITS(inst_cream->inst, 12, 15)] & 0xff; | 6065 | unsigned int value = cpu->Reg[BITS(inst_cream->inst, 12, 15)] & 0xff; |
| 6043 | Memory::Write8(addr, value); | 6066 | cpu->WriteMemory8(addr, value); |
| 6044 | } | 6067 | } |
| 6045 | cpu->Reg[15] += cpu->GetInstructionSize(); | 6068 | cpu->Reg[15] += cpu->GetInstructionSize(); |
| 6046 | INC_PC(sizeof(ldst_inst)); | 6069 | INC_PC(sizeof(ldst_inst)); |
| @@ -6091,7 +6114,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) { | |||
| 6091 | 6114 | ||
| 6092 | if (cpu->IsExclusiveMemoryAccess(write_addr)) { | 6115 | if (cpu->IsExclusiveMemoryAccess(write_addr)) { |
| 6093 | cpu->UnsetExclusiveMemoryAddress(); | 6116 | cpu->UnsetExclusiveMemoryAddress(); |
| 6094 | Memory::Write8(write_addr, cpu->Reg[inst_cream->Rm]); | 6117 | cpu->WriteMemory8(write_addr, cpu->Reg[inst_cream->Rm]); |
| 6095 | RD = 0; | 6118 | RD = 0; |
| 6096 | } else { | 6119 | } else { |
| 6097 | // Failed to write due to mutex access | 6120 | // Failed to write due to mutex access |
| @@ -6250,8 +6273,8 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) { | |||
| 6250 | if (inst_base->cond == ConditionCode::AL || CondPassed(cpu, inst_base->cond)) { | 6273 | if (inst_base->cond == ConditionCode::AL || CondPassed(cpu, inst_base->cond)) { |
| 6251 | swp_inst* inst_cream = (swp_inst*)inst_base->component; | 6274 | swp_inst* inst_cream = (swp_inst*)inst_base->component; |
| 6252 | addr = RN; | 6275 | addr = RN; |
| 6253 | unsigned int value = Memory::Read8(addr); | 6276 | unsigned int value = cpu->ReadMemory8(addr); |
| 6254 | Memory::Write8(addr, (RM & 0xFF)); | 6277 | cpu->WriteMemory8(addr, (RM & 0xFF)); |
| 6255 | RD = value; | 6278 | RD = value; |
| 6256 | } | 6279 | } |
| 6257 | cpu->Reg[15] += cpu->GetInstructionSize(); | 6280 | cpu->Reg[15] += cpu->GetInstructionSize(); |