diff options
| author | 2015-12-07 16:24:08 -0500 | |
|---|---|---|
| committer | 2015-12-07 16:24:08 -0500 | |
| commit | 2589a68c428da231ba7814437fa77cd432c8693c (patch) | |
| tree | 27fa840b335e0898bd7220638e5e6b9ffeef79f9 /src/core/arm/dyncom | |
| parent | Merge pull request #1252 from Subv/cam (diff) | |
| parent | dyncom: Remove static keyword from header functions (diff) | |
| download | yuzu-2589a68c428da231ba7814437fa77cd432c8693c.tar.gz yuzu-2589a68c428da231ba7814437fa77cd432c8693c.tar.xz yuzu-2589a68c428da231ba7814437fa77cd432c8693c.zip | |
Merge pull request #1271 from lioncash/dyncom-misc
dyncom: Miscellaneous minor changes
Diffstat (limited to 'src/core/arm/dyncom')
| -rw-r--r-- | src/core/arm/dyncom/arm_dyncom_interpreter.cpp | 2 | ||||
| -rw-r--r-- | src/core/arm/dyncom/arm_dyncom_run.h | 4 | ||||
| -rw-r--r-- | src/core/arm/dyncom/arm_dyncom_thumb.h | 2 |
3 files changed, 4 insertions, 4 deletions
diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp index 96c88c83a..2cff2a26a 100644 --- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp +++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp | |||
| @@ -51,7 +51,7 @@ enum { | |||
| 51 | 51 | ||
| 52 | typedef unsigned int (*shtop_fp_t)(ARMul_State* cpu, unsigned int sht_oper); | 52 | typedef unsigned int (*shtop_fp_t)(ARMul_State* cpu, unsigned int sht_oper); |
| 53 | 53 | ||
| 54 | static bool CondPassed(ARMul_State* cpu, unsigned int cond) { | 54 | static bool CondPassed(const ARMul_State* cpu, unsigned int cond) { |
| 55 | const bool n_flag = cpu->NFlag != 0; | 55 | const bool n_flag = cpu->NFlag != 0; |
| 56 | const bool z_flag = cpu->ZFlag != 0; | 56 | const bool z_flag = cpu->ZFlag != 0; |
| 57 | const bool c_flag = cpu->CFlag != 0; | 57 | const bool c_flag = cpu->CFlag != 0; |
diff --git a/src/core/arm/dyncom/arm_dyncom_run.h b/src/core/arm/dyncom/arm_dyncom_run.h index 13bef17fc..8eb694fee 100644 --- a/src/core/arm/dyncom/arm_dyncom_run.h +++ b/src/core/arm/dyncom/arm_dyncom_run.h | |||
| @@ -30,7 +30,7 @@ | |||
| 30 | * @return If the PC is being read, then the word-aligned PC value is returned. | 30 | * @return If the PC is being read, then the word-aligned PC value is returned. |
| 31 | * If the PC is not being read, then the value stored in the register is returned. | 31 | * If the PC is not being read, then the value stored in the register is returned. |
| 32 | */ | 32 | */ |
| 33 | static inline u32 CHECK_READ_REG15_WA(ARMul_State* cpu, int Rn) { | 33 | inline u32 CHECK_READ_REG15_WA(const ARMul_State* cpu, int Rn) { |
| 34 | return (Rn == 15) ? ((cpu->Reg[15] & ~0x3) + cpu->GetInstructionSize() * 2) : cpu->Reg[Rn]; | 34 | return (Rn == 15) ? ((cpu->Reg[15] & ~0x3) + cpu->GetInstructionSize() * 2) : cpu->Reg[Rn]; |
| 35 | } | 35 | } |
| 36 | 36 | ||
| @@ -43,6 +43,6 @@ static inline u32 CHECK_READ_REG15_WA(ARMul_State* cpu, int Rn) { | |||
| 43 | * @return If the PC is being read, then the incremented PC value is returned. | 43 | * @return If the PC is being read, then the incremented PC value is returned. |
| 44 | * If the PC is not being read, then the values stored in the register is returned. | 44 | * If the PC is not being read, then the values stored in the register is returned. |
| 45 | */ | 45 | */ |
| 46 | static inline u32 CHECK_READ_REG15(ARMul_State* cpu, int Rn) { | 46 | inline u32 CHECK_READ_REG15(const ARMul_State* cpu, int Rn) { |
| 47 | return (Rn == 15) ? ((cpu->Reg[15] & ~0x1) + cpu->GetInstructionSize() * 2) : cpu->Reg[Rn]; | 47 | return (Rn == 15) ? ((cpu->Reg[15] & ~0x1) + cpu->GetInstructionSize() * 2) : cpu->Reg[Rn]; |
| 48 | } | 48 | } |
diff --git a/src/core/arm/dyncom/arm_dyncom_thumb.h b/src/core/arm/dyncom/arm_dyncom_thumb.h index 447974363..c1be3c735 100644 --- a/src/core/arm/dyncom/arm_dyncom_thumb.h +++ b/src/core/arm/dyncom/arm_dyncom_thumb.h | |||
| @@ -38,7 +38,7 @@ enum class ThumbDecodeStatus { | |||
| 38 | // Translates a Thumb mode instruction into its ARM equivalent. | 38 | // Translates a Thumb mode instruction into its ARM equivalent. |
| 39 | ThumbDecodeStatus TranslateThumbInstruction(u32 addr, u32 instr, u32* ainstr, u32* inst_size); | 39 | ThumbDecodeStatus TranslateThumbInstruction(u32 addr, u32 instr, u32* ainstr, u32* inst_size); |
| 40 | 40 | ||
| 41 | static inline u32 GetThumbInstruction(u32 instr, u32 address) { | 41 | inline u32 GetThumbInstruction(u32 instr, u32 address) { |
| 42 | // Normally you would need to handle instruction endianness, | 42 | // Normally you would need to handle instruction endianness, |
| 43 | // however, it is fixed to little-endian on the MPCore, so | 43 | // however, it is fixed to little-endian on the MPCore, so |
| 44 | // there's no need to check for this beforehand. | 44 | // there's no need to check for this beforehand. |