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| author | 2015-02-21 17:20:08 -0800 | |
|---|---|---|
| committer | 2015-02-21 17:25:31 -0800 | |
| commit | 05c098a9e77235069c2bbfc7f13aa5d5f8601d88 (patch) | |
| tree | ff2e0d787c7d8f5a10c67c21d059a819afc21463 /src/core/arm/dyncom | |
| parent | Merge pull request #587 from archshift/assert (diff) | |
| download | yuzu-05c098a9e77235069c2bbfc7f13aa5d5f8601d88.tar.gz yuzu-05c098a9e77235069c2bbfc7f13aa5d5f8601d88.tar.xz yuzu-05c098a9e77235069c2bbfc7f13aa5d5f8601d88.zip | |
Cleaned up unaligned access.
Diffstat (limited to 'src/core/arm/dyncom')
| -rw-r--r-- | src/core/arm/dyncom/arm_dyncom_interpreter.cpp | 19 |
1 files changed, 2 insertions, 17 deletions
diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp index b691ffbc3..3b508f617 100644 --- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp +++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp | |||
| @@ -4422,12 +4422,7 @@ unsigned InterpreterMainLoop(ARMul_State* state) { | |||
| 4422 | inst_cream->get_addr(cpu, inst_cream->inst, addr, 1); | 4422 | inst_cream->get_addr(cpu, inst_cream->inst, addr, 1); |
| 4423 | 4423 | ||
| 4424 | unsigned int value = Memory::Read32(addr); | 4424 | unsigned int value = Memory::Read32(addr); |
| 4425 | if (BIT(CP15_REG(CP15_CONTROL), 22) == 1) | 4425 | cpu->Reg[BITS(inst_cream->inst, 12, 15)] = value; |
| 4426 | cpu->Reg[BITS(inst_cream->inst, 12, 15)] = value; | ||
| 4427 | else { | ||
| 4428 | value = ROTATE_RIGHT_32(value,(8*(addr&0x3))); | ||
| 4429 | cpu->Reg[BITS(inst_cream->inst, 12, 15)] = value; | ||
| 4430 | } | ||
| 4431 | 4426 | ||
| 4432 | if (BITS(inst_cream->inst, 12, 15) == 15) { | 4427 | if (BITS(inst_cream->inst, 12, 15) == 15) { |
| 4433 | // For armv5t, should enter thumb when bits[0] is non-zero. | 4428 | // For armv5t, should enter thumb when bits[0] is non-zero. |
| @@ -4450,12 +4445,7 @@ unsigned InterpreterMainLoop(ARMul_State* state) { | |||
| 4450 | inst_cream->get_addr(cpu, inst_cream->inst, addr, 1); | 4445 | inst_cream->get_addr(cpu, inst_cream->inst, addr, 1); |
| 4451 | 4446 | ||
| 4452 | unsigned int value = Memory::Read32(addr); | 4447 | unsigned int value = Memory::Read32(addr); |
| 4453 | if (BIT(CP15_REG(CP15_CONTROL), 22) == 1) | 4448 | cpu->Reg[BITS(inst_cream->inst, 12, 15)] = value; |
| 4454 | cpu->Reg[BITS(inst_cream->inst, 12, 15)] = value; | ||
| 4455 | else { | ||
| 4456 | value = ROTATE_RIGHT_32(value,(8*(addr&0x3))); | ||
| 4457 | cpu->Reg[BITS(inst_cream->inst, 12, 15)] = value; | ||
| 4458 | } | ||
| 4459 | 4449 | ||
| 4460 | if (BITS(inst_cream->inst, 12, 15) == 15) { | 4450 | if (BITS(inst_cream->inst, 12, 15) == 15) { |
| 4461 | // For armv5t, should enter thumb when bits[0] is non-zero. | 4451 | // For armv5t, should enter thumb when bits[0] is non-zero. |
| @@ -4699,11 +4689,6 @@ unsigned InterpreterMainLoop(ARMul_State* state) { | |||
| 4699 | unsigned int value = Memory::Read32(addr); | 4689 | unsigned int value = Memory::Read32(addr); |
| 4700 | cpu->Reg[BITS(inst_cream->inst, 12, 15)] = value; | 4690 | cpu->Reg[BITS(inst_cream->inst, 12, 15)] = value; |
| 4701 | 4691 | ||
| 4702 | if (BIT(CP15_REG(CP15_CONTROL), 22) == 1) | ||
| 4703 | cpu->Reg[BITS(inst_cream->inst, 12, 15)] = value; | ||
| 4704 | else | ||
| 4705 | cpu->Reg[BITS(inst_cream->inst, 12, 15)] = ROTATE_RIGHT_32(value,(8*(addr&0x3))) ; | ||
| 4706 | |||
| 4707 | if (BITS(inst_cream->inst, 12, 15) == 15) { | 4692 | if (BITS(inst_cream->inst, 12, 15) == 15) { |
| 4708 | INC_PC(sizeof(ldst_inst)); | 4693 | INC_PC(sizeof(ldst_inst)); |
| 4709 | goto DISPATCH; | 4694 | goto DISPATCH; |