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| author | 2018-07-20 18:56:53 -0400 | |
|---|---|---|
| committer | 2018-07-20 18:57:40 -0400 | |
| commit | ae09adfcb343f4ebf73a3a85a911422cbf50d6fc (patch) | |
| tree | 450f06d8bd27cdce2baa290e6850acf2d903d059 /src/core/arm/dynarmic | |
| parent | Merge pull request #742 from bunnei/misc-apm (diff) | |
| download | yuzu-ae09adfcb343f4ebf73a3a85a911422cbf50d6fc.tar.gz yuzu-ae09adfcb343f4ebf73a3a85a911422cbf50d6fc.tar.xz yuzu-ae09adfcb343f4ebf73a3a85a911422cbf50d6fc.zip | |
arm_interface: Remove unused tls_address member of ThreadContext
Currently, the TLS address is set within the scheduler, making this
member unused.
Diffstat (limited to 'src/core/arm/dynarmic')
| -rw-r--r-- | src/core/arm/dynarmic/arm_dynarmic.cpp | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/src/core/arm/dynarmic/arm_dynarmic.cpp b/src/core/arm/dynarmic/arm_dynarmic.cpp index 3572ee7b9..4417c6da4 100644 --- a/src/core/arm/dynarmic/arm_dynarmic.cpp +++ b/src/core/arm/dynarmic/arm_dynarmic.cpp | |||
| @@ -203,7 +203,6 @@ void ARM_Dynarmic::SaveContext(ARM_Interface::ThreadContext& ctx) { | |||
| 203 | ctx.cpsr = jit->GetPstate(); | 203 | ctx.cpsr = jit->GetPstate(); |
| 204 | ctx.fpu_registers = jit->GetVectors(); | 204 | ctx.fpu_registers = jit->GetVectors(); |
| 205 | ctx.fpscr = jit->GetFpcr(); | 205 | ctx.fpscr = jit->GetFpcr(); |
| 206 | ctx.tls_address = cb->tpidrro_el0; | ||
| 207 | } | 206 | } |
| 208 | 207 | ||
| 209 | void ARM_Dynarmic::LoadContext(const ARM_Interface::ThreadContext& ctx) { | 208 | void ARM_Dynarmic::LoadContext(const ARM_Interface::ThreadContext& ctx) { |
| @@ -213,7 +212,6 @@ void ARM_Dynarmic::LoadContext(const ARM_Interface::ThreadContext& ctx) { | |||
| 213 | jit->SetPstate(static_cast<u32>(ctx.cpsr)); | 212 | jit->SetPstate(static_cast<u32>(ctx.cpsr)); |
| 214 | jit->SetVectors(ctx.fpu_registers); | 213 | jit->SetVectors(ctx.fpu_registers); |
| 215 | jit->SetFpcr(static_cast<u32>(ctx.fpscr)); | 214 | jit->SetFpcr(static_cast<u32>(ctx.fpscr)); |
| 216 | cb->tpidrro_el0 = ctx.tls_address; | ||
| 217 | } | 215 | } |
| 218 | 216 | ||
| 219 | void ARM_Dynarmic::PrepareReschedule() { | 217 | void ARM_Dynarmic::PrepareReschedule() { |