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authorGravatar Lioncash2015-08-07 07:29:27 -0400
committerGravatar Lioncash2015-08-07 07:29:27 -0400
commitf48a89af8bc76a81a1c3fc3d4c2f52a8dc3b323b (patch)
tree08abe301a6faf1643a5cac630cba05a522a574d9 /src/core/arm/disassembler
parentMerge pull request #1022 from aroulin/disas-missing-v6k-instructions (diff)
parentarm_disasm: Remove unnecessary code (diff)
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Merge pull request #1026 from lioncash/disasm
arm_disasm: Remove unnecessary code
Diffstat (limited to 'src/core/arm/disassembler')
-rw-r--r--src/core/arm/disassembler/arm_disasm.cpp16
1 files changed, 4 insertions, 12 deletions
diff --git a/src/core/arm/disassembler/arm_disasm.cpp b/src/core/arm/disassembler/arm_disasm.cpp
index 8eec64d48..964e30112 100644
--- a/src/core/arm/disassembler/arm_disasm.cpp
+++ b/src/core/arm/disassembler/arm_disasm.cpp
@@ -854,20 +854,12 @@ Opcode ARM_Disasm::Decode10(uint32_t insn) {
854 return OP_LDM; 854 return OP_LDM;
855 return OP_STM; 855 return OP_STM;
856 } 856 }
857 // Branch or Branch with link
858 uint8_t is_link = (insn >> 24) & 1;
859 uint32_t offset = insn & 0xffffff;
860 857
861 // Sign-extend the 24-bit offset 858 // Branch with link
862 if ((offset >> 23) & 1) 859 if ((insn >> 24) & 1)
863 offset |= 0xff000000; 860 return OP_BL;
864 861
865 // Pre-compute the left-shift and the prefetch offset 862 return OP_B;
866 offset <<= 2;
867 offset += 8;
868 if (is_link == 0)
869 return OP_B;
870 return OP_BL;
871} 863}
872 864
873Opcode ARM_Disasm::Decode11(uint32_t insn) { 865Opcode ARM_Disasm::Decode11(uint32_t insn) {