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| author | 2018-09-19 19:53:11 +0800 | |
|---|---|---|
| committer | 2018-09-19 19:53:11 +0800 | |
| commit | c8f9bbbf859c0e38cf691b64c67761382fcebfc2 (patch) | |
| tree | 99529c2277a6b740a6e278985c5147fa649c5497 /src/core/arm/arm_interface.h | |
| parent | Add 1D sampler for TLDS - TexelFetch (Mario Rabbids) (diff) | |
| parent | Merge pull request #1348 from ogniK5377/GetImageSize (diff) | |
| download | yuzu-c8f9bbbf859c0e38cf691b64c67761382fcebfc2.tar.gz yuzu-c8f9bbbf859c0e38cf691b64c67761382fcebfc2.tar.xz yuzu-c8f9bbbf859c0e38cf691b64c67761382fcebfc2.zip | |
Merge branch 'master' into tlds
Diffstat (limited to 'src/core/arm/arm_interface.h')
| -rw-r--r-- | src/core/arm/arm_interface.h | 57 |
1 files changed, 33 insertions, 24 deletions
diff --git a/src/core/arm/arm_interface.h b/src/core/arm/arm_interface.h index c368745b1..867e34932 100644 --- a/src/core/arm/arm_interface.h +++ b/src/core/arm/arm_interface.h | |||
| @@ -10,7 +10,7 @@ | |||
| 10 | 10 | ||
| 11 | namespace Core { | 11 | namespace Core { |
| 12 | 12 | ||
| 13 | /// Generic ARM11 CPU interface | 13 | /// Generic ARMv8 CPU interface |
| 14 | class ARM_Interface : NonCopyable { | 14 | class ARM_Interface : NonCopyable { |
| 15 | public: | 15 | public: |
| 16 | virtual ~ARM_Interface() {} | 16 | virtual ~ARM_Interface() {} |
| @@ -19,9 +19,9 @@ public: | |||
| 19 | std::array<u64, 31> cpu_registers; | 19 | std::array<u64, 31> cpu_registers; |
| 20 | u64 sp; | 20 | u64 sp; |
| 21 | u64 pc; | 21 | u64 pc; |
| 22 | u64 cpsr; | 22 | u64 pstate; |
| 23 | std::array<u128, 32> fpu_registers; | 23 | std::array<u128, 32> vector_registers; |
| 24 | u64 fpscr; | 24 | u64 fpcr; |
| 25 | }; | 25 | }; |
| 26 | 26 | ||
| 27 | /// Runs the CPU until an event happens | 27 | /// Runs the CPU until an event happens |
| @@ -31,11 +31,11 @@ public: | |||
| 31 | virtual void Step() = 0; | 31 | virtual void Step() = 0; |
| 32 | 32 | ||
| 33 | /// Maps a backing memory region for the CPU | 33 | /// Maps a backing memory region for the CPU |
| 34 | virtual void MapBackingMemory(VAddr address, size_t size, u8* memory, | 34 | virtual void MapBackingMemory(VAddr address, std::size_t size, u8* memory, |
| 35 | Kernel::VMAPermission perms) = 0; | 35 | Kernel::VMAPermission perms) = 0; |
| 36 | 36 | ||
| 37 | /// Unmaps a region of memory that was previously mapped using MapBackingMemory | 37 | /// Unmaps a region of memory that was previously mapped using MapBackingMemory |
| 38 | virtual void UnmapMemory(VAddr address, size_t size) = 0; | 38 | virtual void UnmapMemory(VAddr address, std::size_t size) = 0; |
| 39 | 39 | ||
| 40 | /// Clear all instruction cache | 40 | /// Clear all instruction cache |
| 41 | virtual void ClearInstructionCache() = 0; | 41 | virtual void ClearInstructionCache() = 0; |
| @@ -69,42 +69,50 @@ public: | |||
| 69 | */ | 69 | */ |
| 70 | virtual void SetReg(int index, u64 value) = 0; | 70 | virtual void SetReg(int index, u64 value) = 0; |
| 71 | 71 | ||
| 72 | virtual u128 GetExtReg(int index) const = 0; | ||
| 73 | |||
| 74 | virtual void SetExtReg(int index, u128 value) = 0; | ||
| 75 | |||
| 76 | /** | 72 | /** |
| 77 | * Gets the value of a VFP register | 73 | * Gets the value of a specified vector register. |
| 78 | * @param index Register index (0-31) | 74 | * |
| 79 | * @return Returns the value in the register | 75 | * @param index The index of the vector register. |
| 76 | * @return the value within the vector register. | ||
| 80 | */ | 77 | */ |
| 81 | virtual u32 GetVFPReg(int index) const = 0; | 78 | virtual u128 GetVectorReg(int index) const = 0; |
| 82 | 79 | ||
| 83 | /** | 80 | /** |
| 84 | * Sets a VFP register to the given value | 81 | * Sets a given value into a vector register. |
| 85 | * @param index Register index (0-31) | 82 | * |
| 86 | * @param value Value to set register to | 83 | * @param index The index of the vector register. |
| 84 | * @param value The new value to place in the register. | ||
| 87 | */ | 85 | */ |
| 88 | virtual void SetVFPReg(int index, u32 value) = 0; | 86 | virtual void SetVectorReg(int index, u128 value) = 0; |
| 89 | 87 | ||
| 90 | /** | 88 | /** |
| 91 | * Get the current CPSR register | 89 | * Get the current PSTATE register |
| 92 | * @return Returns the value of the CPSR register | 90 | * @return Returns the value of the PSTATE register |
| 93 | */ | 91 | */ |
| 94 | virtual u32 GetCPSR() const = 0; | 92 | virtual u32 GetPSTATE() const = 0; |
| 95 | 93 | ||
| 96 | /** | 94 | /** |
| 97 | * Set the current CPSR register | 95 | * Set the current PSTATE register |
| 98 | * @param cpsr Value to set CPSR to | 96 | * @param pstate Value to set PSTATE to |
| 99 | */ | 97 | */ |
| 100 | virtual void SetCPSR(u32 cpsr) = 0; | 98 | virtual void SetPSTATE(u32 pstate) = 0; |
| 101 | 99 | ||
| 102 | virtual VAddr GetTlsAddress() const = 0; | 100 | virtual VAddr GetTlsAddress() const = 0; |
| 103 | 101 | ||
| 104 | virtual void SetTlsAddress(VAddr address) = 0; | 102 | virtual void SetTlsAddress(VAddr address) = 0; |
| 105 | 103 | ||
| 104 | /** | ||
| 105 | * Gets the value within the TPIDR_EL0 (read/write software thread ID) register. | ||
| 106 | * | ||
| 107 | * @return the value within the register. | ||
| 108 | */ | ||
| 106 | virtual u64 GetTPIDR_EL0() const = 0; | 109 | virtual u64 GetTPIDR_EL0() const = 0; |
| 107 | 110 | ||
| 111 | /** | ||
| 112 | * Sets a new value within the TPIDR_EL0 (read/write software thread ID) register. | ||
| 113 | * | ||
| 114 | * @param value The new value to place in the register. | ||
| 115 | */ | ||
| 108 | virtual void SetTPIDR_EL0(u64 value) = 0; | 116 | virtual void SetTPIDR_EL0(u64 value) = 0; |
| 109 | 117 | ||
| 110 | /** | 118 | /** |
| @@ -119,6 +127,7 @@ public: | |||
| 119 | */ | 127 | */ |
| 120 | virtual void LoadContext(const ThreadContext& ctx) = 0; | 128 | virtual void LoadContext(const ThreadContext& ctx) = 0; |
| 121 | 129 | ||
| 130 | /// Clears the exclusive monitor's state. | ||
| 122 | virtual void ClearExclusiveState() = 0; | 131 | virtual void ClearExclusiveState() = 0; |
| 123 | 132 | ||
| 124 | /// Prepare core for thread reschedule (if needed to correctly handle state) | 133 | /// Prepare core for thread reschedule (if needed to correctly handle state) |