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| author | 2014-05-26 20:52:00 -0400 | |
|---|---|---|
| committer | 2014-05-26 20:52:00 -0400 | |
| commit | 6448c2f30062c085330ff26a4812c9a91c7b492c (patch) | |
| tree | 386e32cf3ec053491fb8dfd8459a1c92553241d9 /src/core/arm/arm_interface.h | |
| parent | Merge pull request #4 from archshift/patch-1 (diff) | |
| parent | service: fixed typo that MSVC did not catch as an error (diff) | |
| download | yuzu-6448c2f30062c085330ff26a4812c9a91c7b492c.tar.gz yuzu-6448c2f30062c085330ff26a4812c9a91c7b492c.tar.xz yuzu-6448c2f30062c085330ff26a4812c9a91c7b492c.zip | |
Merge pull request #9 from bunnei/master
Add initial kernel HLE, includes thread creation and context switching
Diffstat (limited to 'src/core/arm/arm_interface.h')
| -rw-r--r-- | src/core/arm/arm_interface.h | 30 |
1 files changed, 25 insertions, 5 deletions
diff --git a/src/core/arm/arm_interface.h b/src/core/arm/arm_interface.h index 9fdc7ba3c..b73786ccd 100644 --- a/src/core/arm/arm_interface.h +++ b/src/core/arm/arm_interface.h | |||
| @@ -7,11 +7,13 @@ | |||
| 7 | #include "common/common.h" | 7 | #include "common/common.h" |
| 8 | #include "common/common_types.h" | 8 | #include "common/common_types.h" |
| 9 | 9 | ||
| 10 | #include "core/hle/svc.h" | ||
| 11 | |||
| 10 | /// Generic ARM11 CPU interface | 12 | /// Generic ARM11 CPU interface |
| 11 | class ARM_Interface : NonCopyable { | 13 | class ARM_Interface : NonCopyable { |
| 12 | public: | 14 | public: |
| 13 | ARM_Interface() { | 15 | ARM_Interface() { |
| 14 | m_num_instructions = 0; | 16 | num_instructions = 0; |
| 15 | } | 17 | } |
| 16 | 18 | ||
| 17 | ~ARM_Interface() { | 19 | ~ARM_Interface() { |
| @@ -23,7 +25,7 @@ public: | |||
| 23 | */ | 25 | */ |
| 24 | void Run(int num_instructions) { | 26 | void Run(int num_instructions) { |
| 25 | ExecuteInstructions(num_instructions); | 27 | ExecuteInstructions(num_instructions); |
| 26 | m_num_instructions += num_instructions; | 28 | num_instructions += num_instructions; |
| 27 | } | 29 | } |
| 28 | 30 | ||
| 29 | /// Step CPU by one instruction | 31 | /// Step CPU by one instruction |
| @@ -64,14 +66,32 @@ public: | |||
| 64 | virtual u32 GetCPSR() const = 0; | 66 | virtual u32 GetCPSR() const = 0; |
| 65 | 67 | ||
| 66 | /** | 68 | /** |
| 69 | * Set the current CPSR register | ||
| 70 | * @param cpsr Value to set CPSR to | ||
| 71 | */ | ||
| 72 | virtual void SetCPSR(u32 cpsr) = 0; | ||
| 73 | |||
| 74 | /** | ||
| 67 | * Returns the number of clock ticks since the last rese | 75 | * Returns the number of clock ticks since the last rese |
| 68 | * @return Returns number of clock ticks | 76 | * @return Returns number of clock ticks |
| 69 | */ | 77 | */ |
| 70 | virtual u64 GetTicks() const = 0; | 78 | virtual u64 GetTicks() const = 0; |
| 71 | 79 | ||
| 72 | /// Getter for m_num_instructions | 80 | /** |
| 81 | * Saves the current CPU context | ||
| 82 | * @param ctx Thread context to save | ||
| 83 | */ | ||
| 84 | virtual void SaveContext(ThreadContext& ctx) = 0; | ||
| 85 | |||
| 86 | /** | ||
| 87 | * Loads a CPU context | ||
| 88 | * @param ctx Thread context to load | ||
| 89 | */ | ||
| 90 | virtual void LoadContext(const ThreadContext& ctx) = 0; | ||
| 91 | |||
| 92 | /// Getter for num_instructions | ||
| 73 | u64 GetNumInstructions() { | 93 | u64 GetNumInstructions() { |
| 74 | return m_num_instructions; | 94 | return num_instructions; |
| 75 | } | 95 | } |
| 76 | 96 | ||
| 77 | protected: | 97 | protected: |
| @@ -84,6 +104,6 @@ protected: | |||
| 84 | 104 | ||
| 85 | private: | 105 | private: |
| 86 | 106 | ||
| 87 | u64 m_num_instructions; ///< Number of instructions executed | 107 | u64 num_instructions; ///< Number of instructions executed |
| 88 | 108 | ||
| 89 | }; | 109 | }; |