summaryrefslogtreecommitdiff
path: root/src/core/arm/arm_interface.h
diff options
context:
space:
mode:
authorGravatar bunnei2017-09-30 14:16:39 -0400
committerGravatar bunnei2017-09-30 14:34:03 -0400
commit6377585edb43009e464d4c04b4a35720b5f9d020 (patch)
tree432d8ef516d1dc4a5772bead7e9b47f67468b554 /src/core/arm/arm_interface.h
parentnso: Refactor and allocate .bss section. (diff)
downloadyuzu-6377585edb43009e464d4c04b4a35720b5f9d020.tar.gz
yuzu-6377585edb43009e464d4c04b4a35720b5f9d020.tar.xz
yuzu-6377585edb43009e464d4c04b4a35720b5f9d020.zip
arm_interface: Set TLS address for dynarmic core.
Diffstat (limited to 'src/core/arm/arm_interface.h')
-rw-r--r--src/core/arm/arm_interface.h7
1 files changed, 7 insertions, 0 deletions
diff --git a/src/core/arm/arm_interface.h b/src/core/arm/arm_interface.h
index b52228476..f613556dd 100644
--- a/src/core/arm/arm_interface.h
+++ b/src/core/arm/arm_interface.h
@@ -22,6 +22,9 @@ public:
22 u64 fpu_registers[64]; 22 u64 fpu_registers[64];
23 u64 fpscr; 23 u64 fpscr;
24 u64 fpexc; 24 u64 fpexc;
25
26 // TODO(bunnei): Fix once we have proper support for tpidrro_el0, etc. in the JIT
27 VAddr tls_address;
25 }; 28 };
26 29
27 /** 30 /**
@@ -121,6 +124,10 @@ public:
121 */ 124 */
122 virtual void SetCP15Register(CP15Register reg, u32 value) = 0; 125 virtual void SetCP15Register(CP15Register reg, u32 value) = 0;
123 126
127 virtual VAddr GetTlsAddress() const = 0;
128
129 virtual void SetTlsAddress(VAddr address) = 0;
130
124 /** 131 /**
125 * Advance the CPU core by the specified number of ticks (e.g. to simulate CPU execution time) 132 * Advance the CPU core by the specified number of ticks (e.g. to simulate CPU execution time)
126 * @param ticks Number of ticks to advance the CPU core 133 * @param ticks Number of ticks to advance the CPU core