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| author | 2014-04-08 19:25:03 -0400 | |
|---|---|---|
| committer | 2014-04-08 19:25:03 -0400 | |
| commit | 63e46abdb8764bc97e91bae862c8d461e61b1965 (patch) | |
| tree | e73f4aa25d7b4015a265e7bbfb6004dab7561027 /src/common/atomic_win32.h | |
| parent | fixed some license headers that I missed (diff) | |
| download | yuzu-63e46abdb8764bc97e91bae862c8d461e61b1965.tar.gz yuzu-63e46abdb8764bc97e91bae862c8d461e61b1965.tar.xz yuzu-63e46abdb8764bc97e91bae862c8d461e61b1965.zip | |
got rid of 'src' folders in each sub-project
Diffstat (limited to 'src/common/atomic_win32.h')
| -rw-r--r-- | src/common/atomic_win32.h | 72 |
1 files changed, 72 insertions, 0 deletions
diff --git a/src/common/atomic_win32.h b/src/common/atomic_win32.h new file mode 100644 index 000000000..760b16d4d --- /dev/null +++ b/src/common/atomic_win32.h | |||
| @@ -0,0 +1,72 @@ | |||
| 1 | // Copyright 2013 Dolphin Emulator Project | ||
| 2 | // Licensed under GPLv2 | ||
| 3 | // Refer to the license.txt file included. | ||
| 4 | |||
| 5 | #ifndef _ATOMIC_WIN32_H_ | ||
| 6 | #define _ATOMIC_WIN32_H_ | ||
| 7 | |||
| 8 | #include "common.h" | ||
| 9 | #include <intrin.h> | ||
| 10 | #include <Windows.h> | ||
| 11 | |||
| 12 | // Atomic operations are performed in a single step by the CPU. It is | ||
| 13 | // impossible for other threads to see the operation "half-done." | ||
| 14 | // | ||
| 15 | // Some atomic operations can be combined with different types of memory | ||
| 16 | // barriers called "Acquire semantics" and "Release semantics", defined below. | ||
| 17 | // | ||
| 18 | // Acquire semantics: Future memory accesses cannot be relocated to before the | ||
| 19 | // operation. | ||
| 20 | // | ||
| 21 | // Release semantics: Past memory accesses cannot be relocated to after the | ||
| 22 | // operation. | ||
| 23 | // | ||
| 24 | // These barriers affect not only the compiler, but also the CPU. | ||
| 25 | // | ||
| 26 | // NOTE: Acquire and Release are not differentiated right now. They perform a | ||
| 27 | // full memory barrier instead of a "one-way" memory barrier. The newest | ||
| 28 | // Windows SDK has Acquire and Release versions of some Interlocked* functions. | ||
| 29 | |||
| 30 | namespace Common | ||
| 31 | { | ||
| 32 | |||
| 33 | inline void AtomicAdd(volatile u32& target, u32 value) { | ||
| 34 | InterlockedExchangeAdd((volatile LONG*)&target, (LONG)value); | ||
| 35 | } | ||
| 36 | |||
| 37 | inline void AtomicAnd(volatile u32& target, u32 value) { | ||
| 38 | _InterlockedAnd((volatile LONG*)&target, (LONG)value); | ||
| 39 | } | ||
| 40 | |||
| 41 | inline void AtomicIncrement(volatile u32& target) { | ||
| 42 | InterlockedIncrement((volatile LONG*)&target); | ||
| 43 | } | ||
| 44 | |||
| 45 | inline void AtomicDecrement(volatile u32& target) { | ||
| 46 | InterlockedDecrement((volatile LONG*)&target); | ||
| 47 | } | ||
| 48 | |||
| 49 | inline u32 AtomicLoad(volatile u32& src) { | ||
| 50 | return src; // 32-bit reads are always atomic. | ||
| 51 | } | ||
| 52 | inline u32 AtomicLoadAcquire(volatile u32& src) { | ||
| 53 | u32 result = src; // 32-bit reads are always atomic. | ||
| 54 | _ReadBarrier(); // Compiler instruction only. x86 loads always have acquire semantics. | ||
| 55 | return result; | ||
| 56 | } | ||
| 57 | |||
| 58 | inline void AtomicOr(volatile u32& target, u32 value) { | ||
| 59 | _InterlockedOr((volatile LONG*)&target, (LONG)value); | ||
| 60 | } | ||
| 61 | |||
| 62 | inline void AtomicStore(volatile u32& dest, u32 value) { | ||
| 63 | dest = value; // 32-bit writes are always atomic. | ||
| 64 | } | ||
| 65 | inline void AtomicStoreRelease(volatile u32& dest, u32 value) { | ||
| 66 | _WriteBarrier(); // Compiler instruction only. x86 stores always have release semantics. | ||
| 67 | dest = value; // 32-bit writes are always atomic. | ||
| 68 | } | ||
| 69 | |||
| 70 | } | ||
| 71 | |||
| 72 | #endif | ||