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| author | 2015-01-02 18:23:21 -0500 | |
|---|---|---|
| committer | 2015-01-02 18:29:36 -0500 | |
| commit | bee4ff8454d21644f731703173f449dfeda0fec4 (patch) | |
| tree | b03b1340fe531171f90dc09bebe71bf288f4ac6d | |
| parent | dyncom: Implement SMLAD/SMUAD/SMLSD/SMUSD (diff) | |
| download | yuzu-bee4ff8454d21644f731703173f449dfeda0fec4.tar.gz yuzu-bee4ff8454d21644f731703173f449dfeda0fec4.tar.xz yuzu-bee4ff8454d21644f731703173f449dfeda0fec4.zip | |
armemu: Fix missing Q flag check for SMLSD.
| -rw-r--r-- | src/core/arm/interpreter/armemu.cpp | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp index 40e4837d8..12166bf79 100644 --- a/src/core/arm/interpreter/armemu.cpp +++ b/src/core/arm/interpreter/armemu.cpp | |||
| @@ -6480,9 +6480,13 @@ L_stm_s_takeabort: | |||
| 6480 | // SMUSD and SMLSD | 6480 | // SMUSD and SMLSD |
| 6481 | else { | 6481 | else { |
| 6482 | state->Reg[rd_idx] = product1 - product2; | 6482 | state->Reg[rd_idx] = product1 - product2; |
| 6483 | 6483 | ||
| 6484 | if (BITS(12, 15) != 15) | 6484 | if (BITS(12, 15) != 15) { |
| 6485 | state->Reg[rd_idx] += state->Reg[ra_idx]; | 6485 | state->Reg[rd_idx] += state->Reg[ra_idx]; |
| 6486 | |||
| 6487 | if (ARMul_AddOverflowQ(product1 - product2, state->Reg[ra_idx])) | ||
| 6488 | SETQ; | ||
| 6489 | } | ||
| 6486 | } | 6490 | } |
| 6487 | 6491 | ||
| 6488 | return 1; | 6492 | return 1; |