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authorGravatar liamwhite2023-01-04 21:20:00 -0500
committerGravatar GitHub2023-01-04 21:20:00 -0500
commitb78328f19a54964ef6874281d1a4d6b6ad1c34d9 (patch)
tree239947ad53a4a06c3641d58c5d6b8daf5b3dc16a
parentMerge pull request #9518 from gidoly/revert-9504-pg2 (diff)
parentyuzu-ui: Add setting for disabling macro HLE (diff)
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Merge pull request #9501 from FernandoS27/yfc-rel-2
Yuzu Fried Chicken Part 1.5: MacroHLE Rework and Dynamic State
-rw-r--r--src/common/CMakeLists.txt1
-rw-r--r--src/common/range_map.h139
-rw-r--r--src/common/settings.h1
-rw-r--r--src/shader_recompiler/backend/glasm/emit_glasm_context_get_set.cpp18
-rw-r--r--src/shader_recompiler/backend/glsl/emit_glsl.cpp2
-rw-r--r--src/shader_recompiler/backend/glsl/emit_glsl_context_get_set.cpp18
-rw-r--r--src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp12
-rw-r--r--src/shader_recompiler/backend/spirv/spirv_emit_context.cpp13
-rw-r--r--src/shader_recompiler/backend/spirv/spirv_emit_context.h1
-rw-r--r--src/shader_recompiler/environment.h10
-rw-r--r--src/shader_recompiler/frontend/ir/attribute.cpp6
-rw-r--r--src/shader_recompiler/frontend/ir/attribute.h5
-rw-r--r--src/shader_recompiler/frontend/ir/ir_emitter.cpp8
-rw-r--r--src/shader_recompiler/frontend/ir/ir_emitter.h2
-rw-r--r--src/shader_recompiler/frontend/maxwell/translate_program.cpp2
-rw-r--r--src/shader_recompiler/ir_opt/constant_propagation_pass.cpp76
-rw-r--r--src/shader_recompiler/ir_opt/passes.h2
-rw-r--r--src/shader_recompiler/shader_info.h6
-rw-r--r--src/shader_recompiler/varying_state.h2
-rw-r--r--src/tests/CMakeLists.txt1
-rw-r--r--src/tests/common/range_map.cpp70
-rw-r--r--src/video_core/CMakeLists.txt1
-rw-r--r--src/video_core/buffer_cache/buffer_cache.h76
-rw-r--r--src/video_core/cache_types.h24
-rw-r--r--src/video_core/dma_pusher.cpp42
-rw-r--r--src/video_core/dma_pusher.h2
-rw-r--r--src/video_core/engines/draw_manager.cpp31
-rw-r--r--src/video_core/engines/draw_manager.h25
-rw-r--r--src/video_core/engines/engine_interface.h24
-rw-r--r--src/video_core/engines/fermi_2d.cpp10
-rw-r--r--src/video_core/engines/fermi_2d.h2
-rw-r--r--src/video_core/engines/kepler_compute.cpp14
-rw-r--r--src/video_core/engines/kepler_compute.h2
-rw-r--r--src/video_core/engines/kepler_memory.cpp11
-rw-r--r--src/video_core/engines/kepler_memory.h2
-rw-r--r--src/video_core/engines/maxwell_3d.cpp173
-rw-r--r--src/video_core/engines/maxwell_3d.h75
-rw-r--r--src/video_core/engines/maxwell_dma.cpp12
-rw-r--r--src/video_core/engines/maxwell_dma.h2
-rw-r--r--src/video_core/macro/macro.cpp19
-rw-r--r--src/video_core/macro/macro.h1
-rw-r--r--src/video_core/macro/macro_hle.cpp648
-rw-r--r--src/video_core/macro/macro_hle.h5
-rw-r--r--src/video_core/memory_manager.cpp120
-rw-r--r--src/video_core/memory_manager.h39
-rw-r--r--src/video_core/rasterizer_interface.h20
-rw-r--r--src/video_core/renderer_null/null_rasterizer.cpp8
-rw-r--r--src/video_core/renderer_null/null_rasterizer.h12
-rw-r--r--src/video_core/renderer_opengl/gl_graphics_pipeline.h1
-rw-r--r--src/video_core/renderer_opengl/gl_rasterizer.cpp190
-rw-r--r--src/video_core/renderer_opengl/gl_rasterizer.h17
-rw-r--r--src/video_core/renderer_opengl/gl_shader_cache.cpp3
-rw-r--r--src/video_core/renderer_opengl/gl_texture_cache.h2
-rw-r--r--src/video_core/renderer_vulkan/fixed_pipeline_state.cpp119
-rw-r--r--src/video_core/renderer_vulkan/fixed_pipeline_state.h76
-rw-r--r--src/video_core/renderer_vulkan/vk_buffer_cache.cpp4
-rw-r--r--src/video_core/renderer_vulkan/vk_graphics_pipeline.cpp63
-rw-r--r--src/video_core/renderer_vulkan/vk_pipeline_cache.cpp29
-rw-r--r--src/video_core/renderer_vulkan/vk_pipeline_cache.h1
-rw-r--r--src/video_core/renderer_vulkan/vk_rasterizer.cpp421
-rw-r--r--src/video_core/renderer_vulkan/vk_rasterizer.h24
-rw-r--r--src/video_core/renderer_vulkan/vk_staging_buffer_pool.cpp56
-rw-r--r--src/video_core/renderer_vulkan/vk_staging_buffer_pool.h25
-rw-r--r--src/video_core/renderer_vulkan/vk_state_tracker.cpp102
-rw-r--r--src/video_core/renderer_vulkan/vk_state_tracker.h119
-rw-r--r--src/video_core/renderer_vulkan/vk_texture_cache.cpp8
-rw-r--r--src/video_core/renderer_vulkan/vk_texture_cache.h6
-rw-r--r--src/video_core/shader_environment.cpp58
-rw-r--r--src/video_core/shader_environment.h21
-rw-r--r--src/video_core/texture_cache/texture_cache.h107
-rw-r--r--src/video_core/texture_cache/texture_cache_base.h8
-rw-r--r--src/video_core/vulkan_common/vulkan_device.cpp139
-rw-r--r--src/video_core/vulkan_common/vulkan_device.h74
-rw-r--r--src/video_core/vulkan_common/vulkan_wrapper.cpp14
-rw-r--r--src/video_core/vulkan_common/vulkan_wrapper.h78
-rw-r--r--src/yuzu/configuration/config.cpp2
-rw-r--r--src/yuzu/configuration/configure_debug.cpp3
-rw-r--r--src/yuzu/configuration/configure_debug.ui15
-rw-r--r--src/yuzu_cmd/config.cpp1
79 files changed, 3008 insertions, 573 deletions
diff --git a/src/common/CMakeLists.txt b/src/common/CMakeLists.txt
index eb05e46a8..45332cf95 100644
--- a/src/common/CMakeLists.txt
+++ b/src/common/CMakeLists.txt
@@ -97,6 +97,7 @@ add_library(common STATIC
97 point.h 97 point.h
98 precompiled_headers.h 98 precompiled_headers.h
99 quaternion.h 99 quaternion.h
100 range_map.h
100 reader_writer_queue.h 101 reader_writer_queue.h
101 ring_buffer.h 102 ring_buffer.h
102 ${CMAKE_CURRENT_BINARY_DIR}/scm_rev.cpp 103 ${CMAKE_CURRENT_BINARY_DIR}/scm_rev.cpp
diff --git a/src/common/range_map.h b/src/common/range_map.h
new file mode 100644
index 000000000..79c7ef547
--- /dev/null
+++ b/src/common/range_map.h
@@ -0,0 +1,139 @@
1// SPDX-FileCopyrightText: Copyright 2022 yuzu Emulator Project
2// SPDX-License-Identifier: GPL-3.0-or-later
3
4#pragma once
5
6#include <map>
7#include <type_traits>
8
9#include "common/common_types.h"
10
11namespace Common {
12
13template <typename KeyTBase, typename ValueT>
14class RangeMap {
15private:
16 using KeyT =
17 std::conditional_t<std::is_signed_v<KeyTBase>, KeyTBase, std::make_signed_t<KeyTBase>>;
18
19public:
20 explicit RangeMap(ValueT null_value_) : null_value{null_value_} {
21 container.emplace(std::numeric_limits<KeyT>::min(), null_value);
22 };
23 ~RangeMap() = default;
24
25 void Map(KeyTBase address, KeyTBase address_end, ValueT value) {
26 KeyT new_address = static_cast<KeyT>(address);
27 KeyT new_address_end = static_cast<KeyT>(address_end);
28 if (new_address < 0) {
29 new_address = 0;
30 }
31 if (new_address_end < 0) {
32 new_address_end = 0;
33 }
34 InternalMap(new_address, new_address_end, value);
35 }
36
37 void Unmap(KeyTBase address, KeyTBase address_end) {
38 Map(address, address_end, null_value);
39 }
40
41 [[nodiscard]] size_t GetContinousSizeFrom(KeyTBase address) const {
42 const KeyT new_address = static_cast<KeyT>(address);
43 if (new_address < 0) {
44 return 0;
45 }
46 return ContinousSizeInternal(new_address);
47 }
48
49 [[nodiscard]] ValueT GetValueAt(KeyT address) const {
50 const KeyT new_address = static_cast<KeyT>(address);
51 if (new_address < 0) {
52 return null_value;
53 }
54 return GetValueInternal(new_address);
55 }
56
57private:
58 using MapType = std::map<KeyT, ValueT>;
59 using IteratorType = typename MapType::iterator;
60 using ConstIteratorType = typename MapType::const_iterator;
61
62 size_t ContinousSizeInternal(KeyT address) const {
63 const auto it = GetFirstElementBeforeOrOn(address);
64 if (it == container.end() || it->second == null_value) {
65 return 0;
66 }
67 const auto it_end = std::next(it);
68 if (it_end == container.end()) {
69 return std::numeric_limits<KeyT>::max() - address;
70 }
71 return it_end->first - address;
72 }
73
74 ValueT GetValueInternal(KeyT address) const {
75 const auto it = GetFirstElementBeforeOrOn(address);
76 if (it == container.end()) {
77 return null_value;
78 }
79 return it->second;
80 }
81
82 ConstIteratorType GetFirstElementBeforeOrOn(KeyT address) const {
83 auto it = container.lower_bound(address);
84 if (it == container.begin()) {
85 return it;
86 }
87 if (it != container.end() && (it->first == address)) {
88 return it;
89 }
90 --it;
91 return it;
92 }
93
94 ValueT GetFirstValueWithin(KeyT address) {
95 auto it = container.lower_bound(address);
96 if (it == container.begin()) {
97 return it->second;
98 }
99 if (it == container.end()) [[unlikely]] { // this would be a bug
100 return null_value;
101 }
102 --it;
103 return it->second;
104 }
105
106 ValueT GetLastValueWithin(KeyT address) {
107 auto it = container.upper_bound(address);
108 if (it == container.end()) {
109 return null_value;
110 }
111 if (it == container.begin()) [[unlikely]] { // this would be a bug
112 return it->second;
113 }
114 --it;
115 return it->second;
116 }
117
118 void InternalMap(KeyT address, KeyT address_end, ValueT value) {
119 const bool must_add_start = GetFirstValueWithin(address) != value;
120 const ValueT last_value = GetLastValueWithin(address_end);
121 const bool must_add_end = last_value != value;
122 auto it = container.lower_bound(address);
123 const auto it_end = container.upper_bound(address_end);
124 while (it != it_end) {
125 it = container.erase(it);
126 }
127 if (must_add_start) {
128 container.emplace(address, value);
129 }
130 if (must_add_end) {
131 container.emplace(address_end, last_value);
132 }
133 }
134
135 ValueT null_value;
136 MapType container;
137};
138
139} // namespace Common
diff --git a/src/common/settings.h b/src/common/settings.h
index 6b199af93..5017951c5 100644
--- a/src/common/settings.h
+++ b/src/common/settings.h
@@ -531,6 +531,7 @@ struct Values {
531 Setting<bool> reporting_services{false, "reporting_services"}; 531 Setting<bool> reporting_services{false, "reporting_services"};
532 Setting<bool> quest_flag{false, "quest_flag"}; 532 Setting<bool> quest_flag{false, "quest_flag"};
533 Setting<bool> disable_macro_jit{false, "disable_macro_jit"}; 533 Setting<bool> disable_macro_jit{false, "disable_macro_jit"};
534 Setting<bool> disable_macro_hle{false, "disable_macro_hle"};
534 Setting<bool> extended_logging{false, "extended_logging"}; 535 Setting<bool> extended_logging{false, "extended_logging"};
535 Setting<bool> use_debug_asserts{false, "use_debug_asserts"}; 536 Setting<bool> use_debug_asserts{false, "use_debug_asserts"};
536 Setting<bool> use_auto_stub{false, "use_auto_stub"}; 537 Setting<bool> use_auto_stub{false, "use_auto_stub"};
diff --git a/src/shader_recompiler/backend/glasm/emit_glasm_context_get_set.cpp b/src/shader_recompiler/backend/glasm/emit_glasm_context_get_set.cpp
index f0bd84ab2..c7d7d5fef 100644
--- a/src/shader_recompiler/backend/glasm/emit_glasm_context_get_set.cpp
+++ b/src/shader_recompiler/backend/glasm/emit_glasm_context_get_set.cpp
@@ -137,6 +137,15 @@ void EmitGetAttribute(EmitContext& ctx, IR::Inst& inst, IR::Attribute attr, Scal
137 case IR::Attribute::VertexId: 137 case IR::Attribute::VertexId:
138 ctx.Add("MOV.F {}.x,{}.id;", inst, ctx.attrib_name); 138 ctx.Add("MOV.F {}.x,{}.id;", inst, ctx.attrib_name);
139 break; 139 break;
140 case IR::Attribute::BaseInstance:
141 ctx.Add("MOV.F {}.x,{}.baseInstance;", inst, ctx.attrib_name);
142 break;
143 case IR::Attribute::BaseVertex:
144 ctx.Add("MOV.F {}.x,{}.baseVertex;", inst, ctx.attrib_name);
145 break;
146 case IR::Attribute::DrawID:
147 ctx.Add("MOV.F {}.x,{}.draw.id;", inst, ctx.attrib_name);
148 break;
140 case IR::Attribute::FrontFace: 149 case IR::Attribute::FrontFace:
141 ctx.Add("CMP.F {}.x,{}.facing.x,0,-1;", inst, ctx.attrib_name); 150 ctx.Add("CMP.F {}.x,{}.facing.x,0,-1;", inst, ctx.attrib_name);
142 break; 151 break;
@@ -156,6 +165,15 @@ void EmitGetAttributeU32(EmitContext& ctx, IR::Inst& inst, IR::Attribute attr, S
156 case IR::Attribute::VertexId: 165 case IR::Attribute::VertexId:
157 ctx.Add("MOV.S {}.x,{}.id;", inst, ctx.attrib_name); 166 ctx.Add("MOV.S {}.x,{}.id;", inst, ctx.attrib_name);
158 break; 167 break;
168 case IR::Attribute::BaseInstance:
169 ctx.Add("MOV.S {}.x,{}.baseInstance;", inst, ctx.attrib_name);
170 break;
171 case IR::Attribute::BaseVertex:
172 ctx.Add("MOV.S {}.x,{}.baseVertex;", inst, ctx.attrib_name);
173 break;
174 case IR::Attribute::DrawID:
175 ctx.Add("MOV.S {}.x,{}.draw.id;", inst, ctx.attrib_name);
176 break;
159 default: 177 default:
160 throw NotImplementedException("Get U32 attribute {}", attr); 178 throw NotImplementedException("Get U32 attribute {}", attr);
161 } 179 }
diff --git a/src/shader_recompiler/backend/glsl/emit_glsl.cpp b/src/shader_recompiler/backend/glsl/emit_glsl.cpp
index e8a4390f6..d91e04446 100644
--- a/src/shader_recompiler/backend/glsl/emit_glsl.cpp
+++ b/src/shader_recompiler/backend/glsl/emit_glsl.cpp
@@ -219,7 +219,7 @@ std::string EmitGLSL(const Profile& profile, const RuntimeInfo& runtime_info, IR
219 EmitContext ctx{program, bindings, profile, runtime_info}; 219 EmitContext ctx{program, bindings, profile, runtime_info};
220 Precolor(program); 220 Precolor(program);
221 EmitCode(ctx, program); 221 EmitCode(ctx, program);
222 const std::string version{fmt::format("#version 450{}\n", GlslVersionSpecifier(ctx))}; 222 const std::string version{fmt::format("#version 460{}\n", GlslVersionSpecifier(ctx))};
223 ctx.header.insert(0, version); 223 ctx.header.insert(0, version);
224 if (program.shared_memory_size > 0) { 224 if (program.shared_memory_size > 0) {
225 const auto requested_size{program.shared_memory_size}; 225 const auto requested_size{program.shared_memory_size};
diff --git a/src/shader_recompiler/backend/glsl/emit_glsl_context_get_set.cpp b/src/shader_recompiler/backend/glsl/emit_glsl_context_get_set.cpp
index 39579cf5d..2e369ed72 100644
--- a/src/shader_recompiler/backend/glsl/emit_glsl_context_get_set.cpp
+++ b/src/shader_recompiler/backend/glsl/emit_glsl_context_get_set.cpp
@@ -234,6 +234,15 @@ void EmitGetAttribute(EmitContext& ctx, IR::Inst& inst, IR::Attribute attr,
234 case IR::Attribute::FrontFace: 234 case IR::Attribute::FrontFace:
235 ctx.AddF32("{}=itof(gl_FrontFacing?-1:0);", inst); 235 ctx.AddF32("{}=itof(gl_FrontFacing?-1:0);", inst);
236 break; 236 break;
237 case IR::Attribute::BaseInstance:
238 ctx.AddF32("{}=itof(gl_BaseInstance);", inst);
239 break;
240 case IR::Attribute::BaseVertex:
241 ctx.AddF32("{}=itof(gl_BaseVertex);", inst);
242 break;
243 case IR::Attribute::DrawID:
244 ctx.AddF32("{}=itof(gl_DrawID);", inst);
245 break;
237 default: 246 default:
238 throw NotImplementedException("Get attribute {}", attr); 247 throw NotImplementedException("Get attribute {}", attr);
239 } 248 }
@@ -250,6 +259,15 @@ void EmitGetAttributeU32(EmitContext& ctx, IR::Inst& inst, IR::Attribute attr, s
250 case IR::Attribute::VertexId: 259 case IR::Attribute::VertexId:
251 ctx.AddU32("{}=uint(gl_VertexID);", inst); 260 ctx.AddU32("{}=uint(gl_VertexID);", inst);
252 break; 261 break;
262 case IR::Attribute::BaseInstance:
263 ctx.AddU32("{}=uint(gl_BaseInstance);", inst);
264 break;
265 case IR::Attribute::BaseVertex:
266 ctx.AddU32("{}=uint(gl_BaseVertex);", inst);
267 break;
268 case IR::Attribute::DrawID:
269 ctx.AddU32("{}=uint(gl_DrawID);", inst);
270 break;
253 default: 271 default:
254 throw NotImplementedException("Get U32 attribute {}", attr); 272 throw NotImplementedException("Get U32 attribute {}", attr);
255 } 273 }
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp
index 73b67f0af..db9c94ce8 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp
@@ -339,6 +339,12 @@ Id EmitGetAttribute(EmitContext& ctx, IR::Attribute attr, Id vertex) {
339 const Id base{ctx.OpLoad(ctx.U32[1], ctx.base_vertex)}; 339 const Id base{ctx.OpLoad(ctx.U32[1], ctx.base_vertex)};
340 return ctx.OpBitcast(ctx.F32[1], ctx.OpISub(ctx.U32[1], index, base)); 340 return ctx.OpBitcast(ctx.F32[1], ctx.OpISub(ctx.U32[1], index, base));
341 } 341 }
342 case IR::Attribute::BaseInstance:
343 return ctx.OpBitcast(ctx.F32[1], ctx.OpLoad(ctx.U32[1], ctx.base_instance));
344 case IR::Attribute::BaseVertex:
345 return ctx.OpBitcast(ctx.F32[1], ctx.OpLoad(ctx.U32[1], ctx.base_vertex));
346 case IR::Attribute::DrawID:
347 return ctx.OpBitcast(ctx.F32[1], ctx.OpLoad(ctx.U32[1], ctx.draw_index));
342 case IR::Attribute::FrontFace: 348 case IR::Attribute::FrontFace:
343 return ctx.OpSelect(ctx.F32[1], ctx.OpLoad(ctx.U1, ctx.front_face), 349 return ctx.OpSelect(ctx.F32[1], ctx.OpLoad(ctx.U1, ctx.front_face),
344 ctx.OpBitcast(ctx.F32[1], ctx.Const(std::numeric_limits<u32>::max())), 350 ctx.OpBitcast(ctx.F32[1], ctx.Const(std::numeric_limits<u32>::max())),
@@ -380,6 +386,12 @@ Id EmitGetAttributeU32(EmitContext& ctx, IR::Attribute attr, Id) {
380 const Id base{ctx.OpLoad(ctx.U32[1], ctx.base_vertex)}; 386 const Id base{ctx.OpLoad(ctx.U32[1], ctx.base_vertex)};
381 return ctx.OpISub(ctx.U32[1], index, base); 387 return ctx.OpISub(ctx.U32[1], index, base);
382 } 388 }
389 case IR::Attribute::BaseInstance:
390 return ctx.OpLoad(ctx.U32[1], ctx.base_instance);
391 case IR::Attribute::BaseVertex:
392 return ctx.OpLoad(ctx.U32[1], ctx.base_vertex);
393 case IR::Attribute::DrawID:
394 return ctx.OpLoad(ctx.U32[1], ctx.draw_index);
383 default: 395 default:
384 throw NotImplementedException("Read U32 attribute {}", attr); 396 throw NotImplementedException("Read U32 attribute {}", attr);
385 } 397 }
diff --git a/src/shader_recompiler/backend/spirv/spirv_emit_context.cpp b/src/shader_recompiler/backend/spirv/spirv_emit_context.cpp
index 41dc6d031..ecb2db494 100644
--- a/src/shader_recompiler/backend/spirv/spirv_emit_context.cpp
+++ b/src/shader_recompiler/backend/spirv/spirv_emit_context.cpp
@@ -1379,18 +1379,31 @@ void EmitContext::DefineInputs(const IR::Program& program) {
1379 if (loads[IR::Attribute::InstanceId]) { 1379 if (loads[IR::Attribute::InstanceId]) {
1380 if (profile.support_vertex_instance_id) { 1380 if (profile.support_vertex_instance_id) {
1381 instance_id = DefineInput(*this, U32[1], true, spv::BuiltIn::InstanceId); 1381 instance_id = DefineInput(*this, U32[1], true, spv::BuiltIn::InstanceId);
1382 if (loads[IR::Attribute::BaseInstance]) {
1383 base_instance = DefineInput(*this, U32[1], true, spv::BuiltIn::BaseVertex);
1384 }
1382 } else { 1385 } else {
1383 instance_index = DefineInput(*this, U32[1], true, spv::BuiltIn::InstanceIndex); 1386 instance_index = DefineInput(*this, U32[1], true, spv::BuiltIn::InstanceIndex);
1384 base_instance = DefineInput(*this, U32[1], true, spv::BuiltIn::BaseInstance); 1387 base_instance = DefineInput(*this, U32[1], true, spv::BuiltIn::BaseInstance);
1385 } 1388 }
1389 } else if (loads[IR::Attribute::BaseInstance]) {
1390 base_instance = DefineInput(*this, U32[1], true, spv::BuiltIn::BaseInstance);
1386 } 1391 }
1387 if (loads[IR::Attribute::VertexId]) { 1392 if (loads[IR::Attribute::VertexId]) {
1388 if (profile.support_vertex_instance_id) { 1393 if (profile.support_vertex_instance_id) {
1389 vertex_id = DefineInput(*this, U32[1], true, spv::BuiltIn::VertexId); 1394 vertex_id = DefineInput(*this, U32[1], true, spv::BuiltIn::VertexId);
1395 if (loads[IR::Attribute::BaseVertex]) {
1396 base_vertex = DefineInput(*this, U32[1], true, spv::BuiltIn::BaseVertex);
1397 }
1390 } else { 1398 } else {
1391 vertex_index = DefineInput(*this, U32[1], true, spv::BuiltIn::VertexIndex); 1399 vertex_index = DefineInput(*this, U32[1], true, spv::BuiltIn::VertexIndex);
1392 base_vertex = DefineInput(*this, U32[1], true, spv::BuiltIn::BaseVertex); 1400 base_vertex = DefineInput(*this, U32[1], true, spv::BuiltIn::BaseVertex);
1393 } 1401 }
1402 } else if (loads[IR::Attribute::BaseVertex]) {
1403 base_vertex = DefineInput(*this, U32[1], true, spv::BuiltIn::BaseVertex);
1404 }
1405 if (loads[IR::Attribute::DrawID]) {
1406 draw_index = DefineInput(*this, U32[1], true, spv::BuiltIn::DrawIndex);
1394 } 1407 }
1395 if (loads[IR::Attribute::FrontFace]) { 1408 if (loads[IR::Attribute::FrontFace]) {
1396 front_face = DefineInput(*this, U1, true, spv::BuiltIn::FrontFacing); 1409 front_face = DefineInput(*this, U1, true, spv::BuiltIn::FrontFacing);
diff --git a/src/shader_recompiler/backend/spirv/spirv_emit_context.h b/src/shader_recompiler/backend/spirv/spirv_emit_context.h
index dde45b4bc..4414a5169 100644
--- a/src/shader_recompiler/backend/spirv/spirv_emit_context.h
+++ b/src/shader_recompiler/backend/spirv/spirv_emit_context.h
@@ -218,6 +218,7 @@ public:
218 Id base_instance{}; 218 Id base_instance{};
219 Id vertex_id{}; 219 Id vertex_id{};
220 Id vertex_index{}; 220 Id vertex_index{};
221 Id draw_index{};
221 Id base_vertex{}; 222 Id base_vertex{};
222 Id front_face{}; 223 Id front_face{};
223 Id point_coord{}; 224 Id point_coord{};
diff --git a/src/shader_recompiler/environment.h b/src/shader_recompiler/environment.h
index 402f2664f..26e8307c1 100644
--- a/src/shader_recompiler/environment.h
+++ b/src/shader_recompiler/environment.h
@@ -34,6 +34,11 @@ public:
34 34
35 [[nodiscard]] virtual std::array<u32, 3> WorkgroupSize() const = 0; 35 [[nodiscard]] virtual std::array<u32, 3> WorkgroupSize() const = 0;
36 36
37 [[nodiscard]] virtual bool HasHLEMacroState() const = 0;
38
39 [[nodiscard]] virtual std::optional<ReplaceConstant> GetReplaceConstBuffer(u32 bank,
40 u32 offset) = 0;
41
37 virtual void Dump(u64 hash) = 0; 42 virtual void Dump(u64 hash) = 0;
38 43
39 [[nodiscard]] const ProgramHeader& SPH() const noexcept { 44 [[nodiscard]] const ProgramHeader& SPH() const noexcept {
@@ -52,11 +57,16 @@ public:
52 return start_address; 57 return start_address;
53 } 58 }
54 59
60 [[nodiscard]] bool IsPropietaryDriver() const noexcept {
61 return is_propietary_driver;
62 }
63
55protected: 64protected:
56 ProgramHeader sph{}; 65 ProgramHeader sph{};
57 std::array<u32, 8> gp_passthrough_mask{}; 66 std::array<u32, 8> gp_passthrough_mask{};
58 Stage stage{}; 67 Stage stage{};
59 u32 start_address{}; 68 u32 start_address{};
69 bool is_propietary_driver{};
60}; 70};
61 71
62} // namespace Shader 72} // namespace Shader
diff --git a/src/shader_recompiler/frontend/ir/attribute.cpp b/src/shader_recompiler/frontend/ir/attribute.cpp
index 7d3d882e4..1bf9db935 100644
--- a/src/shader_recompiler/frontend/ir/attribute.cpp
+++ b/src/shader_recompiler/frontend/ir/attribute.cpp
@@ -446,6 +446,12 @@ std::string NameOf(Attribute attribute) {
446 return "ViewportMask"; 446 return "ViewportMask";
447 case Attribute::FrontFace: 447 case Attribute::FrontFace:
448 return "FrontFace"; 448 return "FrontFace";
449 case Attribute::BaseInstance:
450 return "BaseInstance";
451 case Attribute::BaseVertex:
452 return "BaseVertex";
453 case Attribute::DrawID:
454 return "DrawID";
449 } 455 }
450 return fmt::format("<reserved attribute {}>", static_cast<int>(attribute)); 456 return fmt::format("<reserved attribute {}>", static_cast<int>(attribute));
451} 457}
diff --git a/src/shader_recompiler/frontend/ir/attribute.h b/src/shader_recompiler/frontend/ir/attribute.h
index 6ee3947b1..5f039b6f6 100644
--- a/src/shader_recompiler/frontend/ir/attribute.h
+++ b/src/shader_recompiler/frontend/ir/attribute.h
@@ -219,6 +219,11 @@ enum class Attribute : u64 {
219 FixedFncTexture9Q = 231, 219 FixedFncTexture9Q = 231,
220 ViewportMask = 232, 220 ViewportMask = 232,
221 FrontFace = 255, 221 FrontFace = 255,
222
223 // Implementation attributes
224 BaseInstance = 256,
225 BaseVertex = 257,
226 DrawID = 258,
222}; 227};
223 228
224constexpr size_t NUM_GENERICS = 32; 229constexpr size_t NUM_GENERICS = 32;
diff --git a/src/shader_recompiler/frontend/ir/ir_emitter.cpp b/src/shader_recompiler/frontend/ir/ir_emitter.cpp
index 0cdac0eff..eb2e49a68 100644
--- a/src/shader_recompiler/frontend/ir/ir_emitter.cpp
+++ b/src/shader_recompiler/frontend/ir/ir_emitter.cpp
@@ -294,6 +294,14 @@ F32 IREmitter::GetAttribute(IR::Attribute attribute, const U32& vertex) {
294 return Inst<F32>(Opcode::GetAttribute, attribute, vertex); 294 return Inst<F32>(Opcode::GetAttribute, attribute, vertex);
295} 295}
296 296
297U32 IREmitter::GetAttributeU32(IR::Attribute attribute) {
298 return GetAttributeU32(attribute, Imm32(0));
299}
300
301U32 IREmitter::GetAttributeU32(IR::Attribute attribute, const U32& vertex) {
302 return Inst<U32>(Opcode::GetAttributeU32, attribute, vertex);
303}
304
297void IREmitter::SetAttribute(IR::Attribute attribute, const F32& value, const U32& vertex) { 305void IREmitter::SetAttribute(IR::Attribute attribute, const F32& value, const U32& vertex) {
298 Inst(Opcode::SetAttribute, attribute, value, vertex); 306 Inst(Opcode::SetAttribute, attribute, value, vertex);
299} 307}
diff --git a/src/shader_recompiler/frontend/ir/ir_emitter.h b/src/shader_recompiler/frontend/ir/ir_emitter.h
index 2df992feb..7aaaa4ab0 100644
--- a/src/shader_recompiler/frontend/ir/ir_emitter.h
+++ b/src/shader_recompiler/frontend/ir/ir_emitter.h
@@ -74,6 +74,8 @@ public:
74 74
75 [[nodiscard]] F32 GetAttribute(IR::Attribute attribute); 75 [[nodiscard]] F32 GetAttribute(IR::Attribute attribute);
76 [[nodiscard]] F32 GetAttribute(IR::Attribute attribute, const U32& vertex); 76 [[nodiscard]] F32 GetAttribute(IR::Attribute attribute, const U32& vertex);
77 [[nodiscard]] U32 GetAttributeU32(IR::Attribute attribute);
78 [[nodiscard]] U32 GetAttributeU32(IR::Attribute attribute, const U32& vertex);
77 void SetAttribute(IR::Attribute attribute, const F32& value, const U32& vertex); 79 void SetAttribute(IR::Attribute attribute, const F32& value, const U32& vertex);
78 80
79 [[nodiscard]] F32 GetAttributeIndexed(const U32& phys_address); 81 [[nodiscard]] F32 GetAttributeIndexed(const U32& phys_address);
diff --git a/src/shader_recompiler/frontend/maxwell/translate_program.cpp b/src/shader_recompiler/frontend/maxwell/translate_program.cpp
index 3adbd2b16..ac159d24b 100644
--- a/src/shader_recompiler/frontend/maxwell/translate_program.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate_program.cpp
@@ -219,7 +219,7 @@ IR::Program TranslateProgram(ObjectPool<IR::Inst>& inst_pool, ObjectPool<IR::Blo
219 } 219 }
220 Optimization::SsaRewritePass(program); 220 Optimization::SsaRewritePass(program);
221 221
222 Optimization::ConstantPropagationPass(program); 222 Optimization::ConstantPropagationPass(env, program);
223 223
224 Optimization::PositionPass(env, program); 224 Optimization::PositionPass(env, program);
225 225
diff --git a/src/shader_recompiler/ir_opt/constant_propagation_pass.cpp b/src/shader_recompiler/ir_opt/constant_propagation_pass.cpp
index 826f9a54a..4d81e9336 100644
--- a/src/shader_recompiler/ir_opt/constant_propagation_pass.cpp
+++ b/src/shader_recompiler/ir_opt/constant_propagation_pass.cpp
@@ -7,6 +7,7 @@
7#include <type_traits> 7#include <type_traits>
8 8
9#include "common/bit_cast.h" 9#include "common/bit_cast.h"
10#include "shader_recompiler/environment.h"
10#include "shader_recompiler/exception.h" 11#include "shader_recompiler/exception.h"
11#include "shader_recompiler/frontend/ir/ir_emitter.h" 12#include "shader_recompiler/frontend/ir/ir_emitter.h"
12#include "shader_recompiler/frontend/ir/value.h" 13#include "shader_recompiler/frontend/ir/value.h"
@@ -515,6 +516,9 @@ void FoldBitCast(IR::Inst& inst, IR::Opcode reverse) {
515 case IR::Attribute::PrimitiveId: 516 case IR::Attribute::PrimitiveId:
516 case IR::Attribute::InstanceId: 517 case IR::Attribute::InstanceId:
517 case IR::Attribute::VertexId: 518 case IR::Attribute::VertexId:
519 case IR::Attribute::BaseVertex:
520 case IR::Attribute::BaseInstance:
521 case IR::Attribute::DrawID:
518 break; 522 break;
519 default: 523 default:
520 return; 524 return;
@@ -644,7 +648,63 @@ void FoldFSwizzleAdd(IR::Block& block, IR::Inst& inst) {
644 } 648 }
645} 649}
646 650
647void ConstantPropagation(IR::Block& block, IR::Inst& inst) { 651void FoldConstBuffer(Environment& env, IR::Block& block, IR::Inst& inst) {
652 const IR::Value bank{inst.Arg(0)};
653 const IR::Value offset{inst.Arg(1)};
654 if (!bank.IsImmediate() || !offset.IsImmediate()) {
655 return;
656 }
657 const auto bank_value = bank.U32();
658 const auto offset_value = offset.U32();
659 auto replacement = env.GetReplaceConstBuffer(bank_value, offset_value);
660 if (!replacement) {
661 return;
662 }
663 const auto new_attribute = [replacement]() {
664 switch (*replacement) {
665 case ReplaceConstant::BaseInstance:
666 return IR::Attribute::BaseInstance;
667 case ReplaceConstant::BaseVertex:
668 return IR::Attribute::BaseVertex;
669 case ReplaceConstant::DrawID:
670 return IR::Attribute::DrawID;
671 default:
672 throw NotImplementedException("Not implemented replacement variable {}", *replacement);
673 }
674 }();
675 IR::IREmitter ir{block, IR::Block::InstructionList::s_iterator_to(inst)};
676 if (inst.GetOpcode() == IR::Opcode::GetCbufU32) {
677 inst.ReplaceUsesWith(ir.GetAttributeU32(new_attribute));
678 } else {
679 inst.ReplaceUsesWith(ir.GetAttribute(new_attribute));
680 }
681}
682
683void FoldDriverConstBuffer(Environment& env, IR::Block& block, IR::Inst& inst, u32 which_bank,
684 u32 offset_start = 0, u32 offset_end = std::numeric_limits<u16>::max()) {
685 const IR::Value bank{inst.Arg(0)};
686 const IR::Value offset{inst.Arg(1)};
687 if (!bank.IsImmediate() || !offset.IsImmediate()) {
688 return;
689 }
690 const auto bank_value = bank.U32();
691 if (bank_value != which_bank) {
692 return;
693 }
694 const auto offset_value = offset.U32();
695 if (offset_value < offset_start || offset_value >= offset_end) {
696 return;
697 }
698 IR::IREmitter ir{block, IR::Block::InstructionList::s_iterator_to(inst)};
699 if (inst.GetOpcode() == IR::Opcode::GetCbufU32) {
700 inst.ReplaceUsesWith(IR::Value{env.ReadCbufValue(bank_value, offset_value)});
701 } else {
702 inst.ReplaceUsesWith(
703 IR::Value{Common::BitCast<f32>(env.ReadCbufValue(bank_value, offset_value))});
704 }
705}
706
707void ConstantPropagation(Environment& env, IR::Block& block, IR::Inst& inst) {
648 switch (inst.GetOpcode()) { 708 switch (inst.GetOpcode()) {
649 case IR::Opcode::GetRegister: 709 case IR::Opcode::GetRegister:
650 return FoldGetRegister(inst); 710 return FoldGetRegister(inst);
@@ -789,18 +849,28 @@ void ConstantPropagation(IR::Block& block, IR::Inst& inst) {
789 IR::Opcode::CompositeInsertF16x4); 849 IR::Opcode::CompositeInsertF16x4);
790 case IR::Opcode::FSwizzleAdd: 850 case IR::Opcode::FSwizzleAdd:
791 return FoldFSwizzleAdd(block, inst); 851 return FoldFSwizzleAdd(block, inst);
852 case IR::Opcode::GetCbufF32:
853 case IR::Opcode::GetCbufU32:
854 if (env.HasHLEMacroState()) {
855 FoldConstBuffer(env, block, inst);
856 }
857 if (env.IsPropietaryDriver()) {
858 FoldDriverConstBuffer(env, block, inst, 1);
859 }
860 break;
792 default: 861 default:
793 break; 862 break;
794 } 863 }
795} 864}
865
796} // Anonymous namespace 866} // Anonymous namespace
797 867
798void ConstantPropagationPass(IR::Program& program) { 868void ConstantPropagationPass(Environment& env, IR::Program& program) {
799 const auto end{program.post_order_blocks.rend()}; 869 const auto end{program.post_order_blocks.rend()};
800 for (auto it = program.post_order_blocks.rbegin(); it != end; ++it) { 870 for (auto it = program.post_order_blocks.rbegin(); it != end; ++it) {
801 IR::Block* const block{*it}; 871 IR::Block* const block{*it};
802 for (IR::Inst& inst : block->Instructions()) { 872 for (IR::Inst& inst : block->Instructions()) {
803 ConstantPropagation(*block, inst); 873 ConstantPropagation(env, *block, inst);
804 } 874 }
805 } 875 }
806} 876}
diff --git a/src/shader_recompiler/ir_opt/passes.h b/src/shader_recompiler/ir_opt/passes.h
index 11bfe801a..1f8f2ba95 100644
--- a/src/shader_recompiler/ir_opt/passes.h
+++ b/src/shader_recompiler/ir_opt/passes.h
@@ -13,7 +13,7 @@ struct HostTranslateInfo;
13namespace Shader::Optimization { 13namespace Shader::Optimization {
14 14
15void CollectShaderInfoPass(Environment& env, IR::Program& program); 15void CollectShaderInfoPass(Environment& env, IR::Program& program);
16void ConstantPropagationPass(IR::Program& program); 16void ConstantPropagationPass(Environment& env, IR::Program& program);
17void DeadCodeEliminationPass(IR::Program& program); 17void DeadCodeEliminationPass(IR::Program& program);
18void GlobalMemoryToStorageBufferPass(IR::Program& program); 18void GlobalMemoryToStorageBufferPass(IR::Program& program);
19void IdentityRemovalPass(IR::Program& program); 19void IdentityRemovalPass(IR::Program& program);
diff --git a/src/shader_recompiler/shader_info.h b/src/shader_recompiler/shader_info.h
index d9c6e92db..44236b6b1 100644
--- a/src/shader_recompiler/shader_info.h
+++ b/src/shader_recompiler/shader_info.h
@@ -16,6 +16,12 @@
16 16
17namespace Shader { 17namespace Shader {
18 18
19enum class ReplaceConstant : u32 {
20 BaseInstance,
21 BaseVertex,
22 DrawID,
23};
24
19enum class TextureType : u32 { 25enum class TextureType : u32 {
20 Color1D, 26 Color1D,
21 ColorArray1D, 27 ColorArray1D,
diff --git a/src/shader_recompiler/varying_state.h b/src/shader_recompiler/varying_state.h
index 7b28a285f..18a9aaf50 100644
--- a/src/shader_recompiler/varying_state.h
+++ b/src/shader_recompiler/varying_state.h
@@ -11,7 +11,7 @@
11namespace Shader { 11namespace Shader {
12 12
13struct VaryingState { 13struct VaryingState {
14 std::bitset<256> mask{}; 14 std::bitset<512> mask{};
15 15
16 void Set(IR::Attribute attribute, bool state = true) { 16 void Set(IR::Attribute attribute, bool state = true) {
17 mask[static_cast<size_t>(attribute)] = state; 17 mask[static_cast<size_t>(attribute)] = state;
diff --git a/src/tests/CMakeLists.txt b/src/tests/CMakeLists.txt
index 6a4022e45..9b65e79cb 100644
--- a/src/tests/CMakeLists.txt
+++ b/src/tests/CMakeLists.txt
@@ -7,6 +7,7 @@ add_executable(tests
7 common/fibers.cpp 7 common/fibers.cpp
8 common/host_memory.cpp 8 common/host_memory.cpp
9 common/param_package.cpp 9 common/param_package.cpp
10 common/range_map.cpp
10 common/ring_buffer.cpp 11 common/ring_buffer.cpp
11 common/scratch_buffer.cpp 12 common/scratch_buffer.cpp
12 common/unique_function.cpp 13 common/unique_function.cpp
diff --git a/src/tests/common/range_map.cpp b/src/tests/common/range_map.cpp
new file mode 100644
index 000000000..5a4630a38
--- /dev/null
+++ b/src/tests/common/range_map.cpp
@@ -0,0 +1,70 @@
1// SPDX-FileCopyrightText: Copyright 2022 yuzu Emulator Project
2// SPDX-License-Identifier: GPL-3.0-or-later
3
4#include <stdexcept>
5
6#include <catch2/catch.hpp>
7
8#include "common/range_map.h"
9
10enum class MappedEnum : u32 {
11 Invalid = 0,
12 Valid_1 = 1,
13 Valid_2 = 2,
14 Valid_3 = 3,
15};
16
17TEST_CASE("Range Map: Setup", "[video_core]") {
18 Common::RangeMap<u64, MappedEnum> my_map(MappedEnum::Invalid);
19 my_map.Map(3000, 3500, MappedEnum::Valid_1);
20 my_map.Unmap(3200, 3600);
21 my_map.Map(4000, 4500, MappedEnum::Valid_2);
22 my_map.Map(4200, 4400, MappedEnum::Valid_2);
23 my_map.Map(4200, 4400, MappedEnum::Valid_1);
24 REQUIRE(my_map.GetContinousSizeFrom(4200) == 200);
25 REQUIRE(my_map.GetContinousSizeFrom(3000) == 200);
26 REQUIRE(my_map.GetContinousSizeFrom(2900) == 0);
27
28 REQUIRE(my_map.GetValueAt(2900) == MappedEnum::Invalid);
29 REQUIRE(my_map.GetValueAt(3100) == MappedEnum::Valid_1);
30 REQUIRE(my_map.GetValueAt(3000) == MappedEnum::Valid_1);
31 REQUIRE(my_map.GetValueAt(3200) == MappedEnum::Invalid);
32
33 REQUIRE(my_map.GetValueAt(4199) == MappedEnum::Valid_2);
34 REQUIRE(my_map.GetValueAt(4200) == MappedEnum::Valid_1);
35 REQUIRE(my_map.GetValueAt(4400) == MappedEnum::Valid_2);
36 REQUIRE(my_map.GetValueAt(4500) == MappedEnum::Invalid);
37 REQUIRE(my_map.GetValueAt(4600) == MappedEnum::Invalid);
38
39 my_map.Unmap(0, 6000);
40 for (u64 address = 0; address < 10000; address += 1000) {
41 REQUIRE(my_map.GetContinousSizeFrom(address) == 0);
42 }
43
44 my_map.Map(1000, 3000, MappedEnum::Valid_1);
45 my_map.Map(4000, 5000, MappedEnum::Valid_1);
46 my_map.Map(2500, 4100, MappedEnum::Valid_1);
47 REQUIRE(my_map.GetContinousSizeFrom(1000) == 4000);
48
49 my_map.Map(1000, 3000, MappedEnum::Valid_1);
50 my_map.Map(4000, 5000, MappedEnum::Valid_2);
51 my_map.Map(2500, 4100, MappedEnum::Valid_3);
52 REQUIRE(my_map.GetContinousSizeFrom(1000) == 1500);
53 REQUIRE(my_map.GetContinousSizeFrom(2500) == 1600);
54 REQUIRE(my_map.GetContinousSizeFrom(4100) == 900);
55 REQUIRE(my_map.GetValueAt(900) == MappedEnum::Invalid);
56 REQUIRE(my_map.GetValueAt(1000) == MappedEnum::Valid_1);
57 REQUIRE(my_map.GetValueAt(2500) == MappedEnum::Valid_3);
58 REQUIRE(my_map.GetValueAt(4100) == MappedEnum::Valid_2);
59 REQUIRE(my_map.GetValueAt(5000) == MappedEnum::Invalid);
60
61 my_map.Map(2000, 6000, MappedEnum::Valid_3);
62 REQUIRE(my_map.GetContinousSizeFrom(1000) == 1000);
63 REQUIRE(my_map.GetContinousSizeFrom(3000) == 3000);
64 REQUIRE(my_map.GetValueAt(1000) == MappedEnum::Valid_1);
65 REQUIRE(my_map.GetValueAt(1999) == MappedEnum::Valid_1);
66 REQUIRE(my_map.GetValueAt(1500) == MappedEnum::Valid_1);
67 REQUIRE(my_map.GetValueAt(2001) == MappedEnum::Valid_3);
68 REQUIRE(my_map.GetValueAt(5999) == MappedEnum::Valid_3);
69 REQUIRE(my_map.GetValueAt(6000) == MappedEnum::Invalid);
70}
diff --git a/src/video_core/CMakeLists.txt b/src/video_core/CMakeLists.txt
index fd71bf186..aa271a377 100644
--- a/src/video_core/CMakeLists.txt
+++ b/src/video_core/CMakeLists.txt
@@ -13,6 +13,7 @@ add_library(video_core STATIC
13 buffer_cache/buffer_base.h 13 buffer_cache/buffer_base.h
14 buffer_cache/buffer_cache.cpp 14 buffer_cache/buffer_cache.cpp
15 buffer_cache/buffer_cache.h 15 buffer_cache/buffer_cache.h
16 cache_types.h
16 cdma_pusher.cpp 17 cdma_pusher.cpp
17 cdma_pusher.h 18 cdma_pusher.h
18 compatible_formats.cpp 19 compatible_formats.cpp
diff --git a/src/video_core/buffer_cache/buffer_cache.h b/src/video_core/buffer_cache/buffer_cache.h
index f1c60d1f3..06fd40851 100644
--- a/src/video_core/buffer_cache/buffer_cache.h
+++ b/src/video_core/buffer_cache/buffer_cache.h
@@ -200,7 +200,16 @@ public:
200 /// Return true when a CPU region is modified from the CPU 200 /// Return true when a CPU region is modified from the CPU
201 [[nodiscard]] bool IsRegionCpuModified(VAddr addr, size_t size); 201 [[nodiscard]] bool IsRegionCpuModified(VAddr addr, size_t size);
202 202
203 std::mutex mutex; 203 void SetDrawIndirect(
204 const Tegra::Engines::DrawManager::IndirectParams* current_draw_indirect_) {
205 current_draw_indirect = current_draw_indirect_;
206 }
207
208 [[nodiscard]] std::pair<Buffer*, u32> GetDrawIndirectCount();
209
210 [[nodiscard]] std::pair<Buffer*, u32> GetDrawIndirectBuffer();
211
212 std::recursive_mutex mutex;
204 Runtime& runtime; 213 Runtime& runtime;
205 214
206private: 215private:
@@ -272,6 +281,8 @@ private:
272 281
273 void BindHostVertexBuffers(); 282 void BindHostVertexBuffers();
274 283
284 void BindHostDrawIndirectBuffers();
285
275 void BindHostGraphicsUniformBuffers(size_t stage); 286 void BindHostGraphicsUniformBuffers(size_t stage);
276 287
277 void BindHostGraphicsUniformBuffer(size_t stage, u32 index, u32 binding_index, bool needs_bind); 288 void BindHostGraphicsUniformBuffer(size_t stage, u32 index, u32 binding_index, bool needs_bind);
@@ -298,6 +309,8 @@ private:
298 309
299 void UpdateVertexBuffer(u32 index); 310 void UpdateVertexBuffer(u32 index);
300 311
312 void UpdateDrawIndirect();
313
301 void UpdateUniformBuffers(size_t stage); 314 void UpdateUniformBuffers(size_t stage);
302 315
303 void UpdateStorageBuffers(size_t stage); 316 void UpdateStorageBuffers(size_t stage);
@@ -372,6 +385,8 @@ private:
372 SlotVector<Buffer> slot_buffers; 385 SlotVector<Buffer> slot_buffers;
373 DelayedDestructionRing<Buffer, 8> delayed_destruction_ring; 386 DelayedDestructionRing<Buffer, 8> delayed_destruction_ring;
374 387
388 const Tegra::Engines::DrawManager::IndirectParams* current_draw_indirect{};
389
375 u32 last_index_count = 0; 390 u32 last_index_count = 0;
376 391
377 Binding index_buffer; 392 Binding index_buffer;
@@ -380,6 +395,8 @@ private:
380 std::array<std::array<Binding, NUM_STORAGE_BUFFERS>, NUM_STAGES> storage_buffers; 395 std::array<std::array<Binding, NUM_STORAGE_BUFFERS>, NUM_STAGES> storage_buffers;
381 std::array<std::array<TextureBufferBinding, NUM_TEXTURE_BUFFERS>, NUM_STAGES> texture_buffers; 396 std::array<std::array<TextureBufferBinding, NUM_TEXTURE_BUFFERS>, NUM_STAGES> texture_buffers;
382 std::array<Binding, NUM_TRANSFORM_FEEDBACK_BUFFERS> transform_feedback_buffers; 397 std::array<Binding, NUM_TRANSFORM_FEEDBACK_BUFFERS> transform_feedback_buffers;
398 Binding count_buffer_binding;
399 Binding indirect_buffer_binding;
383 400
384 std::array<Binding, NUM_COMPUTE_UNIFORM_BUFFERS> compute_uniform_buffers; 401 std::array<Binding, NUM_COMPUTE_UNIFORM_BUFFERS> compute_uniform_buffers;
385 std::array<Binding, NUM_STORAGE_BUFFERS> compute_storage_buffers; 402 std::array<Binding, NUM_STORAGE_BUFFERS> compute_storage_buffers;
@@ -674,6 +691,9 @@ void BufferCache<P>::BindHostGeometryBuffers(bool is_indexed) {
674 } 691 }
675 BindHostVertexBuffers(); 692 BindHostVertexBuffers();
676 BindHostTransformFeedbackBuffers(); 693 BindHostTransformFeedbackBuffers();
694 if (current_draw_indirect) {
695 BindHostDrawIndirectBuffers();
696 }
677} 697}
678 698
679template <class P> 699template <class P>
@@ -823,6 +843,7 @@ bool BufferCache<P>::ShouldWaitAsyncFlushes() const noexcept {
823template <class P> 843template <class P>
824void BufferCache<P>::CommitAsyncFlushesHigh() { 844void BufferCache<P>::CommitAsyncFlushesHigh() {
825 AccumulateFlushes(); 845 AccumulateFlushes();
846
826 if (committed_ranges.empty()) { 847 if (committed_ranges.empty()) {
827 return; 848 return;
828 } 849 }
@@ -869,7 +890,7 @@ void BufferCache<P>::CommitAsyncFlushesHigh() {
869 buffer_id, 890 buffer_id,
870 }); 891 });
871 // Align up to avoid cache conflicts 892 // Align up to avoid cache conflicts
872 constexpr u64 align = 256ULL; 893 constexpr u64 align = 8ULL;
873 constexpr u64 mask = ~(align - 1ULL); 894 constexpr u64 mask = ~(align - 1ULL);
874 total_size_bytes += (new_size + align - 1) & mask; 895 total_size_bytes += (new_size + align - 1) & mask;
875 largest_copy = std::max(largest_copy, new_size); 896 largest_copy = std::max(largest_copy, new_size);
@@ -1042,6 +1063,19 @@ void BufferCache<P>::BindHostVertexBuffers() {
1042} 1063}
1043 1064
1044template <class P> 1065template <class P>
1066void BufferCache<P>::BindHostDrawIndirectBuffers() {
1067 const auto bind_buffer = [this](const Binding& binding) {
1068 Buffer& buffer = slot_buffers[binding.buffer_id];
1069 TouchBuffer(buffer, binding.buffer_id);
1070 SynchronizeBuffer(buffer, binding.cpu_addr, binding.size);
1071 };
1072 if (current_draw_indirect->include_count) {
1073 bind_buffer(count_buffer_binding);
1074 }
1075 bind_buffer(indirect_buffer_binding);
1076}
1077
1078template <class P>
1045void BufferCache<P>::BindHostGraphicsUniformBuffers(size_t stage) { 1079void BufferCache<P>::BindHostGraphicsUniformBuffers(size_t stage) {
1046 u32 dirty = ~0U; 1080 u32 dirty = ~0U;
1047 if constexpr (HAS_PERSISTENT_UNIFORM_BUFFER_BINDINGS) { 1081 if constexpr (HAS_PERSISTENT_UNIFORM_BUFFER_BINDINGS) {
@@ -1272,6 +1306,9 @@ void BufferCache<P>::DoUpdateGraphicsBuffers(bool is_indexed) {
1272 UpdateStorageBuffers(stage); 1306 UpdateStorageBuffers(stage);
1273 UpdateTextureBuffers(stage); 1307 UpdateTextureBuffers(stage);
1274 } 1308 }
1309 if (current_draw_indirect) {
1310 UpdateDrawIndirect();
1311 }
1275 } while (has_deleted_buffers); 1312 } while (has_deleted_buffers);
1276} 1313}
1277 1314
@@ -1289,7 +1326,7 @@ void BufferCache<P>::UpdateIndexBuffer() {
1289 const auto& draw_state = maxwell3d->draw_manager->GetDrawState(); 1326 const auto& draw_state = maxwell3d->draw_manager->GetDrawState();
1290 const auto& index_array = draw_state.index_buffer; 1327 const auto& index_array = draw_state.index_buffer;
1291 auto& flags = maxwell3d->dirty.flags; 1328 auto& flags = maxwell3d->dirty.flags;
1292 if (!flags[Dirty::IndexBuffer] && last_index_count == index_array.count) { 1329 if (!flags[Dirty::IndexBuffer]) {
1293 return; 1330 return;
1294 } 1331 }
1295 flags[Dirty::IndexBuffer] = false; 1332 flags[Dirty::IndexBuffer] = false;
@@ -1362,6 +1399,27 @@ void BufferCache<P>::UpdateVertexBuffer(u32 index) {
1362} 1399}
1363 1400
1364template <class P> 1401template <class P>
1402void BufferCache<P>::UpdateDrawIndirect() {
1403 const auto update = [this](GPUVAddr gpu_addr, size_t size, Binding& binding) {
1404 const std::optional<VAddr> cpu_addr = gpu_memory->GpuToCpuAddress(gpu_addr);
1405 if (!cpu_addr) {
1406 binding = NULL_BINDING;
1407 return;
1408 }
1409 binding = Binding{
1410 .cpu_addr = *cpu_addr,
1411 .size = static_cast<u32>(size),
1412 .buffer_id = FindBuffer(*cpu_addr, static_cast<u32>(size)),
1413 };
1414 };
1415 if (current_draw_indirect->include_count) {
1416 update(current_draw_indirect->count_start_address, sizeof(u32), count_buffer_binding);
1417 }
1418 update(current_draw_indirect->indirect_start_address, current_draw_indirect->buffer_size,
1419 indirect_buffer_binding);
1420}
1421
1422template <class P>
1365void BufferCache<P>::UpdateUniformBuffers(size_t stage) { 1423void BufferCache<P>::UpdateUniformBuffers(size_t stage) {
1366 ForEachEnabledBit(enabled_uniform_buffer_masks[stage], [&](u32 index) { 1424 ForEachEnabledBit(enabled_uniform_buffer_masks[stage], [&](u32 index) {
1367 Binding& binding = uniform_buffers[stage][index]; 1425 Binding& binding = uniform_buffers[stage][index];
@@ -1941,4 +1999,16 @@ bool BufferCache<P>::HasFastUniformBufferBound(size_t stage, u32 binding_index)
1941 } 1999 }
1942} 2000}
1943 2001
2002template <class P>
2003std::pair<typename BufferCache<P>::Buffer*, u32> BufferCache<P>::GetDrawIndirectCount() {
2004 auto& buffer = slot_buffers[count_buffer_binding.buffer_id];
2005 return std::make_pair(&buffer, buffer.Offset(count_buffer_binding.cpu_addr));
2006}
2007
2008template <class P>
2009std::pair<typename BufferCache<P>::Buffer*, u32> BufferCache<P>::GetDrawIndirectBuffer() {
2010 auto& buffer = slot_buffers[indirect_buffer_binding.buffer_id];
2011 return std::make_pair(&buffer, buffer.Offset(indirect_buffer_binding.cpu_addr));
2012}
2013
1944} // namespace VideoCommon 2014} // namespace VideoCommon
diff --git a/src/video_core/cache_types.h b/src/video_core/cache_types.h
new file mode 100644
index 000000000..1a5db3c55
--- /dev/null
+++ b/src/video_core/cache_types.h
@@ -0,0 +1,24 @@
1// SPDX-FileCopyrightText: Copyright 2020 yuzu Emulator Project
2// SPDX-License-Identifier: GPL-2.0-or-later
3
4#pragma once
5
6#include "common/common_funcs.h"
7#include "common/common_types.h"
8
9namespace VideoCommon {
10
11enum class CacheType : u32 {
12 None = 0,
13 TextureCache = 1 << 0,
14 QueryCache = 1 << 1,
15 BufferCache = 1 << 2,
16 ShaderCache = 1 << 3,
17 NoTextureCache = QueryCache | BufferCache | ShaderCache,
18 NoBufferCache = TextureCache | QueryCache | ShaderCache,
19 NoQueryCache = TextureCache | BufferCache | ShaderCache,
20 All = TextureCache | QueryCache | BufferCache | ShaderCache,
21};
22DECLARE_ENUM_FLAG_OPERATORS(CacheType)
23
24} // namespace VideoCommon
diff --git a/src/video_core/dma_pusher.cpp b/src/video_core/dma_pusher.cpp
index 322de2606..551929824 100644
--- a/src/video_core/dma_pusher.cpp
+++ b/src/video_core/dma_pusher.cpp
@@ -61,7 +61,7 @@ bool DmaPusher::Step() {
61 } else { 61 } else {
62 const CommandListHeader command_list_header{ 62 const CommandListHeader command_list_header{
63 command_list.command_lists[dma_pushbuffer_subindex++]}; 63 command_list.command_lists[dma_pushbuffer_subindex++]};
64 const GPUVAddr dma_get = command_list_header.addr; 64 dma_state.dma_get = command_list_header.addr;
65 65
66 if (dma_pushbuffer_subindex >= command_list.command_lists.size()) { 66 if (dma_pushbuffer_subindex >= command_list.command_lists.size()) {
67 // We've gone through the current list, remove it from the queue 67 // We've gone through the current list, remove it from the queue
@@ -75,12 +75,22 @@ bool DmaPusher::Step() {
75 75
76 // Push buffer non-empty, read a word 76 // Push buffer non-empty, read a word
77 command_headers.resize_destructive(command_list_header.size); 77 command_headers.resize_destructive(command_list_header.size);
78 if (Settings::IsGPULevelHigh()) { 78 constexpr u32 MacroRegistersStart = 0xE00;
79 memory_manager.ReadBlock(dma_get, command_headers.data(), 79 if (dma_state.method < MacroRegistersStart) {
80 command_list_header.size * sizeof(u32)); 80 if (Settings::IsGPULevelHigh()) {
81 memory_manager.ReadBlock(dma_state.dma_get, command_headers.data(),
82 command_list_header.size * sizeof(u32));
83 } else {
84 memory_manager.ReadBlockUnsafe(dma_state.dma_get, command_headers.data(),
85 command_list_header.size * sizeof(u32));
86 }
81 } else { 87 } else {
82 memory_manager.ReadBlockUnsafe(dma_get, command_headers.data(), 88 const size_t copy_size = command_list_header.size * sizeof(u32);
83 command_list_header.size * sizeof(u32)); 89 if (subchannels[dma_state.subchannel]) {
90 subchannels[dma_state.subchannel]->current_dirty =
91 memory_manager.IsMemoryDirty(dma_state.dma_get, copy_size);
92 }
93 memory_manager.ReadBlockUnsafe(dma_state.dma_get, command_headers.data(), copy_size);
84 } 94 }
85 ProcessCommands(command_headers); 95 ProcessCommands(command_headers);
86 } 96 }
@@ -94,6 +104,7 @@ void DmaPusher::ProcessCommands(std::span<const CommandHeader> commands) {
94 104
95 if (dma_state.method_count) { 105 if (dma_state.method_count) {
96 // Data word of methods command 106 // Data word of methods command
107 dma_state.dma_word_offset = static_cast<u32>(index * sizeof(u32));
97 if (dma_state.non_incrementing) { 108 if (dma_state.non_incrementing) {
98 const u32 max_write = static_cast<u32>( 109 const u32 max_write = static_cast<u32>(
99 std::min<std::size_t>(index + dma_state.method_count, commands.size()) - index); 110 std::min<std::size_t>(index + dma_state.method_count, commands.size()) - index);
@@ -132,6 +143,8 @@ void DmaPusher::ProcessCommands(std::span<const CommandHeader> commands) {
132 case SubmissionMode::Inline: 143 case SubmissionMode::Inline:
133 dma_state.method = command_header.method; 144 dma_state.method = command_header.method;
134 dma_state.subchannel = command_header.subchannel; 145 dma_state.subchannel = command_header.subchannel;
146 dma_state.dma_word_offset = static_cast<u64>(
147 -static_cast<s64>(dma_state.dma_get)); // negate to set address as 0
135 CallMethod(command_header.arg_count); 148 CallMethod(command_header.arg_count);
136 dma_state.non_incrementing = true; 149 dma_state.non_incrementing = true;
137 dma_increment_once = false; 150 dma_increment_once = false;
@@ -164,8 +177,14 @@ void DmaPusher::CallMethod(u32 argument) const {
164 dma_state.method_count, 177 dma_state.method_count,
165 }); 178 });
166 } else { 179 } else {
167 subchannels[dma_state.subchannel]->CallMethod(dma_state.method, argument, 180 auto subchannel = subchannels[dma_state.subchannel];
168 dma_state.is_last_call); 181 if (!subchannel->execution_mask[dma_state.method]) [[likely]] {
182 subchannel->method_sink.emplace_back(dma_state.method, argument);
183 return;
184 }
185 subchannel->ConsumeSink();
186 subchannel->current_dma_segment = dma_state.dma_get + dma_state.dma_word_offset;
187 subchannel->CallMethod(dma_state.method, argument, dma_state.is_last_call);
169 } 188 }
170} 189}
171 190
@@ -174,8 +193,11 @@ void DmaPusher::CallMultiMethod(const u32* base_start, u32 num_methods) const {
174 puller.CallMultiMethod(dma_state.method, dma_state.subchannel, base_start, num_methods, 193 puller.CallMultiMethod(dma_state.method, dma_state.subchannel, base_start, num_methods,
175 dma_state.method_count); 194 dma_state.method_count);
176 } else { 195 } else {
177 subchannels[dma_state.subchannel]->CallMultiMethod(dma_state.method, base_start, 196 auto subchannel = subchannels[dma_state.subchannel];
178 num_methods, dma_state.method_count); 197 subchannel->ConsumeSink();
198 subchannel->current_dma_segment = dma_state.dma_get + dma_state.dma_word_offset;
199 subchannel->CallMultiMethod(dma_state.method, base_start, num_methods,
200 dma_state.method_count);
179 } 201 }
180} 202}
181 203
diff --git a/src/video_core/dma_pusher.h b/src/video_core/dma_pusher.h
index 6f00de937..1cdb690ed 100644
--- a/src/video_core/dma_pusher.h
+++ b/src/video_core/dma_pusher.h
@@ -156,6 +156,8 @@ private:
156 u32 subchannel; ///< Current subchannel 156 u32 subchannel; ///< Current subchannel
157 u32 method_count; ///< Current method count 157 u32 method_count; ///< Current method count
158 u32 length_pending; ///< Large NI command length pending 158 u32 length_pending; ///< Large NI command length pending
159 GPUVAddr dma_get; ///< Currently read segment
160 u64 dma_word_offset; ///< Current word ofset from address
159 bool non_incrementing; ///< Current command's NI flag 161 bool non_incrementing; ///< Current command's NI flag
160 bool is_last_call; 162 bool is_last_call;
161 }; 163 };
diff --git a/src/video_core/engines/draw_manager.cpp b/src/video_core/engines/draw_manager.cpp
index 3a78421f6..2437121ce 100644
--- a/src/video_core/engines/draw_manager.cpp
+++ b/src/video_core/engines/draw_manager.cpp
@@ -91,6 +91,23 @@ void DrawManager::DrawIndex(PrimitiveTopology topology, u32 index_first, u32 ind
91 ProcessDraw(true, num_instances); 91 ProcessDraw(true, num_instances);
92} 92}
93 93
94void DrawManager::DrawArrayIndirect(PrimitiveTopology topology) {
95 draw_state.topology = topology;
96
97 ProcessDrawIndirect();
98}
99
100void DrawManager::DrawIndexedIndirect(PrimitiveTopology topology, u32 index_first,
101 u32 index_count) {
102 const auto& regs{maxwell3d->regs};
103 draw_state.topology = topology;
104 draw_state.index_buffer = regs.index_buffer;
105 draw_state.index_buffer.first = index_first;
106 draw_state.index_buffer.count = index_count;
107
108 ProcessDrawIndirect();
109}
110
94void DrawManager::SetInlineIndexBuffer(u32 index) { 111void DrawManager::SetInlineIndexBuffer(u32 index) {
95 draw_state.inline_index_draw_indexes.push_back(static_cast<u8>(index & 0x000000ff)); 112 draw_state.inline_index_draw_indexes.push_back(static_cast<u8>(index & 0x000000ff));
96 draw_state.inline_index_draw_indexes.push_back(static_cast<u8>((index & 0x0000ff00) >> 8)); 113 draw_state.inline_index_draw_indexes.push_back(static_cast<u8>((index & 0x0000ff00) >> 8));
@@ -198,4 +215,18 @@ void DrawManager::ProcessDraw(bool draw_indexed, u32 instance_count) {
198 maxwell3d->rasterizer->Draw(draw_indexed, instance_count); 215 maxwell3d->rasterizer->Draw(draw_indexed, instance_count);
199 } 216 }
200} 217}
218
219void DrawManager::ProcessDrawIndirect() {
220 LOG_TRACE(
221 HW_GPU,
222 "called, topology={}, is_indexed={}, includes_count={}, buffer_size={}, max_draw_count={}",
223 draw_state.topology, indirect_state.is_indexed, indirect_state.include_count,
224 indirect_state.buffer_size, indirect_state.max_draw_counts);
225
226 UpdateTopology();
227
228 if (maxwell3d->ShouldExecute()) {
229 maxwell3d->rasterizer->DrawIndirect();
230 }
231}
201} // namespace Tegra::Engines 232} // namespace Tegra::Engines
diff --git a/src/video_core/engines/draw_manager.h b/src/video_core/engines/draw_manager.h
index 0e6930a9c..58d1b2d59 100644
--- a/src/video_core/engines/draw_manager.h
+++ b/src/video_core/engines/draw_manager.h
@@ -32,6 +32,16 @@ public:
32 std::vector<u8> inline_index_draw_indexes; 32 std::vector<u8> inline_index_draw_indexes;
33 }; 33 };
34 34
35 struct IndirectParams {
36 bool is_indexed;
37 bool include_count;
38 GPUVAddr count_start_address;
39 GPUVAddr indirect_start_address;
40 size_t buffer_size;
41 size_t max_draw_counts;
42 size_t stride;
43 };
44
35 explicit DrawManager(Maxwell3D* maxwell_3d); 45 explicit DrawManager(Maxwell3D* maxwell_3d);
36 46
37 void ProcessMethodCall(u32 method, u32 argument); 47 void ProcessMethodCall(u32 method, u32 argument);
@@ -46,10 +56,22 @@ public:
46 void DrawIndex(PrimitiveTopology topology, u32 index_first, u32 index_count, u32 base_index, 56 void DrawIndex(PrimitiveTopology topology, u32 index_first, u32 index_count, u32 base_index,
47 u32 base_instance, u32 num_instances); 57 u32 base_instance, u32 num_instances);
48 58
59 void DrawArrayIndirect(PrimitiveTopology topology);
60
61 void DrawIndexedIndirect(PrimitiveTopology topology, u32 index_first, u32 index_count);
62
49 const State& GetDrawState() const { 63 const State& GetDrawState() const {
50 return draw_state; 64 return draw_state;
51 } 65 }
52 66
67 IndirectParams& GetIndirectParams() {
68 return indirect_state;
69 }
70
71 const IndirectParams& GetIndirectParams() const {
72 return indirect_state;
73 }
74
53private: 75private:
54 void SetInlineIndexBuffer(u32 index); 76 void SetInlineIndexBuffer(u32 index);
55 77
@@ -63,7 +85,10 @@ private:
63 85
64 void ProcessDraw(bool draw_indexed, u32 instance_count); 86 void ProcessDraw(bool draw_indexed, u32 instance_count);
65 87
88 void ProcessDrawIndirect();
89
66 Maxwell3D* maxwell3d{}; 90 Maxwell3D* maxwell3d{};
67 State draw_state{}; 91 State draw_state{};
92 IndirectParams indirect_state{};
68}; 93};
69} // namespace Tegra::Engines 94} // namespace Tegra::Engines
diff --git a/src/video_core/engines/engine_interface.h b/src/video_core/engines/engine_interface.h
index 26cde8584..392322358 100644
--- a/src/video_core/engines/engine_interface.h
+++ b/src/video_core/engines/engine_interface.h
@@ -3,6 +3,10 @@
3 3
4#pragma once 4#pragma once
5 5
6#include <bitset>
7#include <limits>
8#include <vector>
9
6#include "common/common_types.h" 10#include "common/common_types.h"
7 11
8namespace Tegra::Engines { 12namespace Tegra::Engines {
@@ -17,6 +21,26 @@ public:
17 /// Write multiple values to the register identified by method. 21 /// Write multiple values to the register identified by method.
18 virtual void CallMultiMethod(u32 method, const u32* base_start, u32 amount, 22 virtual void CallMultiMethod(u32 method, const u32* base_start, u32 amount,
19 u32 methods_pending) = 0; 23 u32 methods_pending) = 0;
24
25 void ConsumeSink() {
26 if (method_sink.empty()) {
27 return;
28 }
29 ConsumeSinkImpl();
30 }
31
32 std::bitset<std::numeric_limits<u16>::max()> execution_mask{};
33 std::vector<std::pair<u32, u32>> method_sink{};
34 bool current_dirty{};
35 GPUVAddr current_dma_segment;
36
37protected:
38 virtual void ConsumeSinkImpl() {
39 for (auto [method, value] : method_sink) {
40 CallMethod(method, value, true);
41 }
42 method_sink.clear();
43 }
20}; 44};
21 45
22} // namespace Tegra::Engines 46} // namespace Tegra::Engines
diff --git a/src/video_core/engines/fermi_2d.cpp b/src/video_core/engines/fermi_2d.cpp
index c6478ae85..e655e7254 100644
--- a/src/video_core/engines/fermi_2d.cpp
+++ b/src/video_core/engines/fermi_2d.cpp
@@ -25,6 +25,9 @@ Fermi2D::Fermi2D(MemoryManager& memory_manager_) {
25 // Nvidia's OpenGL driver seems to assume these values 25 // Nvidia's OpenGL driver seems to assume these values
26 regs.src.depth = 1; 26 regs.src.depth = 1;
27 regs.dst.depth = 1; 27 regs.dst.depth = 1;
28
29 execution_mask.reset();
30 execution_mask[FERMI2D_REG_INDEX(pixels_from_memory.src_y0) + 1] = true;
28} 31}
29 32
30Fermi2D::~Fermi2D() = default; 33Fermi2D::~Fermi2D() = default;
@@ -49,6 +52,13 @@ void Fermi2D::CallMultiMethod(u32 method, const u32* base_start, u32 amount, u32
49 } 52 }
50} 53}
51 54
55void Fermi2D::ConsumeSinkImpl() {
56 for (auto [method, value] : method_sink) {
57 regs.reg_array[method] = value;
58 }
59 method_sink.clear();
60}
61
52void Fermi2D::Blit() { 62void Fermi2D::Blit() {
53 MICROPROFILE_SCOPE(GPU_BlitEngine); 63 MICROPROFILE_SCOPE(GPU_BlitEngine);
54 LOG_DEBUG(HW_GPU, "called. source address=0x{:x}, destination address=0x{:x}", 64 LOG_DEBUG(HW_GPU, "called. source address=0x{:x}, destination address=0x{:x}",
diff --git a/src/video_core/engines/fermi_2d.h b/src/video_core/engines/fermi_2d.h
index 100b21bac..523fbdec2 100644
--- a/src/video_core/engines/fermi_2d.h
+++ b/src/video_core/engines/fermi_2d.h
@@ -309,6 +309,8 @@ private:
309 /// Performs the copy from the source surface to the destination surface as configured in the 309 /// Performs the copy from the source surface to the destination surface as configured in the
310 /// registers. 310 /// registers.
311 void Blit(); 311 void Blit();
312
313 void ConsumeSinkImpl() override;
312}; 314};
313 315
314#define ASSERT_REG_POSITION(field_name, position) \ 316#define ASSERT_REG_POSITION(field_name, position) \
diff --git a/src/video_core/engines/kepler_compute.cpp b/src/video_core/engines/kepler_compute.cpp
index e5c622155..601095f03 100644
--- a/src/video_core/engines/kepler_compute.cpp
+++ b/src/video_core/engines/kepler_compute.cpp
@@ -14,7 +14,12 @@
14namespace Tegra::Engines { 14namespace Tegra::Engines {
15 15
16KeplerCompute::KeplerCompute(Core::System& system_, MemoryManager& memory_manager_) 16KeplerCompute::KeplerCompute(Core::System& system_, MemoryManager& memory_manager_)
17 : system{system_}, memory_manager{memory_manager_}, upload_state{memory_manager, regs.upload} {} 17 : system{system_}, memory_manager{memory_manager_}, upload_state{memory_manager, regs.upload} {
18 execution_mask.reset();
19 execution_mask[KEPLER_COMPUTE_REG_INDEX(exec_upload)] = true;
20 execution_mask[KEPLER_COMPUTE_REG_INDEX(data_upload)] = true;
21 execution_mask[KEPLER_COMPUTE_REG_INDEX(launch)] = true;
22}
18 23
19KeplerCompute::~KeplerCompute() = default; 24KeplerCompute::~KeplerCompute() = default;
20 25
@@ -23,6 +28,13 @@ void KeplerCompute::BindRasterizer(VideoCore::RasterizerInterface* rasterizer_)
23 upload_state.BindRasterizer(rasterizer); 28 upload_state.BindRasterizer(rasterizer);
24} 29}
25 30
31void KeplerCompute::ConsumeSinkImpl() {
32 for (auto [method, value] : method_sink) {
33 regs.reg_array[method] = value;
34 }
35 method_sink.clear();
36}
37
26void KeplerCompute::CallMethod(u32 method, u32 method_argument, bool is_last_call) { 38void KeplerCompute::CallMethod(u32 method, u32 method_argument, bool is_last_call) {
27 ASSERT_MSG(method < Regs::NUM_REGS, 39 ASSERT_MSG(method < Regs::NUM_REGS,
28 "Invalid KeplerCompute register, increase the size of the Regs structure"); 40 "Invalid KeplerCompute register, increase the size of the Regs structure");
diff --git a/src/video_core/engines/kepler_compute.h b/src/video_core/engines/kepler_compute.h
index e154e3f06..2092e685f 100644
--- a/src/video_core/engines/kepler_compute.h
+++ b/src/video_core/engines/kepler_compute.h
@@ -204,6 +204,8 @@ public:
204private: 204private:
205 void ProcessLaunch(); 205 void ProcessLaunch();
206 206
207 void ConsumeSinkImpl() override;
208
207 /// Retrieves information about a specific TIC entry from the TIC buffer. 209 /// Retrieves information about a specific TIC entry from the TIC buffer.
208 Texture::TICEntry GetTICEntry(u32 tic_index) const; 210 Texture::TICEntry GetTICEntry(u32 tic_index) const;
209 211
diff --git a/src/video_core/engines/kepler_memory.cpp b/src/video_core/engines/kepler_memory.cpp
index 08045d1cf..c026801a3 100644
--- a/src/video_core/engines/kepler_memory.cpp
+++ b/src/video_core/engines/kepler_memory.cpp
@@ -18,6 +18,17 @@ KeplerMemory::~KeplerMemory() = default;
18 18
19void KeplerMemory::BindRasterizer(VideoCore::RasterizerInterface* rasterizer_) { 19void KeplerMemory::BindRasterizer(VideoCore::RasterizerInterface* rasterizer_) {
20 upload_state.BindRasterizer(rasterizer_); 20 upload_state.BindRasterizer(rasterizer_);
21
22 execution_mask.reset();
23 execution_mask[KEPLERMEMORY_REG_INDEX(exec)] = true;
24 execution_mask[KEPLERMEMORY_REG_INDEX(data)] = true;
25}
26
27void KeplerMemory::ConsumeSinkImpl() {
28 for (auto [method, value] : method_sink) {
29 regs.reg_array[method] = value;
30 }
31 method_sink.clear();
21} 32}
22 33
23void KeplerMemory::CallMethod(u32 method, u32 method_argument, bool is_last_call) { 34void KeplerMemory::CallMethod(u32 method, u32 method_argument, bool is_last_call) {
diff --git a/src/video_core/engines/kepler_memory.h b/src/video_core/engines/kepler_memory.h
index 5fe7489f0..fb1eecbba 100644
--- a/src/video_core/engines/kepler_memory.h
+++ b/src/video_core/engines/kepler_memory.h
@@ -73,6 +73,8 @@ public:
73 } regs{}; 73 } regs{};
74 74
75private: 75private:
76 void ConsumeSinkImpl() override;
77
76 Core::System& system; 78 Core::System& system;
77 Upload::State upload_state; 79 Upload::State upload_state;
78}; 80};
diff --git a/src/video_core/engines/maxwell_3d.cpp b/src/video_core/engines/maxwell_3d.cpp
index 9b182b653..fbfd1ddd2 100644
--- a/src/video_core/engines/maxwell_3d.cpp
+++ b/src/video_core/engines/maxwell_3d.cpp
@@ -4,6 +4,8 @@
4#include <cstring> 4#include <cstring>
5#include <optional> 5#include <optional>
6#include "common/assert.h" 6#include "common/assert.h"
7#include "common/scope_exit.h"
8#include "common/settings.h"
7#include "core/core.h" 9#include "core/core.h"
8#include "core/core_timing.h" 10#include "core/core_timing.h"
9#include "video_core/dirty_flags.h" 11#include "video_core/dirty_flags.h"
@@ -28,6 +30,10 @@ Maxwell3D::Maxwell3D(Core::System& system_, MemoryManager& memory_manager_)
28 regs.upload} { 30 regs.upload} {
29 dirty.flags.flip(); 31 dirty.flags.flip();
30 InitializeRegisterDefaults(); 32 InitializeRegisterDefaults();
33 execution_mask.reset();
34 for (size_t i = 0; i < execution_mask.size(); i++) {
35 execution_mask[i] = IsMethodExecutable(static_cast<u32>(i));
36 }
31} 37}
32 38
33Maxwell3D::~Maxwell3D() = default; 39Maxwell3D::~Maxwell3D() = default;
@@ -121,6 +127,71 @@ void Maxwell3D::InitializeRegisterDefaults() {
121 shadow_state = regs; 127 shadow_state = regs;
122} 128}
123 129
130bool Maxwell3D::IsMethodExecutable(u32 method) {
131 if (method >= MacroRegistersStart) {
132 return true;
133 }
134 switch (method) {
135 case MAXWELL3D_REG_INDEX(draw.end):
136 case MAXWELL3D_REG_INDEX(draw.begin):
137 case MAXWELL3D_REG_INDEX(vertex_buffer.first):
138 case MAXWELL3D_REG_INDEX(vertex_buffer.count):
139 case MAXWELL3D_REG_INDEX(index_buffer.first):
140 case MAXWELL3D_REG_INDEX(index_buffer.count):
141 case MAXWELL3D_REG_INDEX(draw_inline_index):
142 case MAXWELL3D_REG_INDEX(index_buffer32_subsequent):
143 case MAXWELL3D_REG_INDEX(index_buffer16_subsequent):
144 case MAXWELL3D_REG_INDEX(index_buffer8_subsequent):
145 case MAXWELL3D_REG_INDEX(index_buffer32_first):
146 case MAXWELL3D_REG_INDEX(index_buffer16_first):
147 case MAXWELL3D_REG_INDEX(index_buffer8_first):
148 case MAXWELL3D_REG_INDEX(inline_index_2x16.even):
149 case MAXWELL3D_REG_INDEX(inline_index_4x8.index0):
150 case MAXWELL3D_REG_INDEX(vertex_array_instance_first):
151 case MAXWELL3D_REG_INDEX(vertex_array_instance_subsequent):
152 case MAXWELL3D_REG_INDEX(wait_for_idle):
153 case MAXWELL3D_REG_INDEX(shadow_ram_control):
154 case MAXWELL3D_REG_INDEX(load_mme.instruction_ptr):
155 case MAXWELL3D_REG_INDEX(load_mme.instruction):
156 case MAXWELL3D_REG_INDEX(load_mme.start_address):
157 case MAXWELL3D_REG_INDEX(falcon[4]):
158 case MAXWELL3D_REG_INDEX(const_buffer.buffer):
159 case MAXWELL3D_REG_INDEX(const_buffer.buffer) + 1:
160 case MAXWELL3D_REG_INDEX(const_buffer.buffer) + 2:
161 case MAXWELL3D_REG_INDEX(const_buffer.buffer) + 3:
162 case MAXWELL3D_REG_INDEX(const_buffer.buffer) + 4:
163 case MAXWELL3D_REG_INDEX(const_buffer.buffer) + 5:
164 case MAXWELL3D_REG_INDEX(const_buffer.buffer) + 6:
165 case MAXWELL3D_REG_INDEX(const_buffer.buffer) + 7:
166 case MAXWELL3D_REG_INDEX(const_buffer.buffer) + 8:
167 case MAXWELL3D_REG_INDEX(const_buffer.buffer) + 9:
168 case MAXWELL3D_REG_INDEX(const_buffer.buffer) + 10:
169 case MAXWELL3D_REG_INDEX(const_buffer.buffer) + 11:
170 case MAXWELL3D_REG_INDEX(const_buffer.buffer) + 12:
171 case MAXWELL3D_REG_INDEX(const_buffer.buffer) + 13:
172 case MAXWELL3D_REG_INDEX(const_buffer.buffer) + 14:
173 case MAXWELL3D_REG_INDEX(const_buffer.buffer) + 15:
174 case MAXWELL3D_REG_INDEX(bind_groups[0].raw_config):
175 case MAXWELL3D_REG_INDEX(bind_groups[1].raw_config):
176 case MAXWELL3D_REG_INDEX(bind_groups[2].raw_config):
177 case MAXWELL3D_REG_INDEX(bind_groups[3].raw_config):
178 case MAXWELL3D_REG_INDEX(bind_groups[4].raw_config):
179 case MAXWELL3D_REG_INDEX(topology_override):
180 case MAXWELL3D_REG_INDEX(clear_surface):
181 case MAXWELL3D_REG_INDEX(report_semaphore.query):
182 case MAXWELL3D_REG_INDEX(render_enable.mode):
183 case MAXWELL3D_REG_INDEX(clear_report_value):
184 case MAXWELL3D_REG_INDEX(sync_info):
185 case MAXWELL3D_REG_INDEX(launch_dma):
186 case MAXWELL3D_REG_INDEX(inline_data):
187 case MAXWELL3D_REG_INDEX(fragment_barrier):
188 case MAXWELL3D_REG_INDEX(tiled_cache_barrier):
189 return true;
190 default:
191 return false;
192 }
193}
194
124void Maxwell3D::ProcessMacro(u32 method, const u32* base_start, u32 amount, bool is_last_call) { 195void Maxwell3D::ProcessMacro(u32 method, const u32* base_start, u32 amount, bool is_last_call) {
125 if (executing_macro == 0) { 196 if (executing_macro == 0) {
126 // A macro call must begin by writing the macro method's register, not its argument. 197 // A macro call must begin by writing the macro method's register, not its argument.
@@ -130,14 +201,72 @@ void Maxwell3D::ProcessMacro(u32 method, const u32* base_start, u32 amount, bool
130 } 201 }
131 202
132 macro_params.insert(macro_params.end(), base_start, base_start + amount); 203 macro_params.insert(macro_params.end(), base_start, base_start + amount);
204 for (size_t i = 0; i < amount; i++) {
205 macro_addresses.push_back(current_dma_segment + i * sizeof(u32));
206 }
207 macro_segments.emplace_back(current_dma_segment, amount);
208 current_macro_dirty |= current_dirty;
209 current_dirty = false;
133 210
134 // Call the macro when there are no more parameters in the command buffer 211 // Call the macro when there are no more parameters in the command buffer
135 if (is_last_call) { 212 if (is_last_call) {
213 ConsumeSink();
136 CallMacroMethod(executing_macro, macro_params); 214 CallMacroMethod(executing_macro, macro_params);
137 macro_params.clear(); 215 macro_params.clear();
216 macro_addresses.clear();
217 macro_segments.clear();
218 current_macro_dirty = false;
138 } 219 }
139} 220}
140 221
222void Maxwell3D::RefreshParametersImpl() {
223 size_t current_index = 0;
224 for (auto& segment : macro_segments) {
225 if (segment.first == 0) {
226 current_index += segment.second;
227 continue;
228 }
229 memory_manager.ReadBlock(segment.first, &macro_params[current_index],
230 sizeof(u32) * segment.second);
231 current_index += segment.second;
232 }
233}
234
235u32 Maxwell3D::GetMaxCurrentVertices() {
236 u32 num_vertices = 0;
237 for (size_t index = 0; index < Regs::NumVertexArrays; ++index) {
238 const auto& array = regs.vertex_streams[index];
239 if (array.enable == 0) {
240 continue;
241 }
242 const auto& attribute = regs.vertex_attrib_format[index];
243 if (attribute.constant) {
244 num_vertices = std::max(num_vertices, 1U);
245 continue;
246 }
247 const auto& limit = regs.vertex_stream_limits[index];
248 const GPUVAddr gpu_addr_begin = array.Address();
249 const GPUVAddr gpu_addr_end = limit.Address() + 1;
250 const u32 address_size = static_cast<u32>(gpu_addr_end - gpu_addr_begin);
251 num_vertices = std::max(
252 num_vertices, address_size / std::max(attribute.SizeInBytes(), array.stride.Value()));
253 }
254 return num_vertices;
255}
256
257size_t Maxwell3D::EstimateIndexBufferSize() {
258 GPUVAddr start_address = regs.index_buffer.StartAddress();
259 GPUVAddr end_address = regs.index_buffer.EndAddress();
260 constexpr std::array<size_t, 4> max_sizes = {
261 std::numeric_limits<u8>::max(), std::numeric_limits<u16>::max(),
262 std::numeric_limits<u32>::max(), std::numeric_limits<u32>::max()};
263 const size_t byte_size = regs.index_buffer.FormatSizeInBytes();
264 return std::min<size_t>(
265 memory_manager.GetMemoryLayoutSize(start_address, byte_size * max_sizes[byte_size]) /
266 byte_size,
267 static_cast<size_t>(end_address - start_address));
268}
269
141u32 Maxwell3D::ProcessShadowRam(u32 method, u32 argument) { 270u32 Maxwell3D::ProcessShadowRam(u32 method, u32 argument) {
142 // Keep track of the register value in shadow_state when requested. 271 // Keep track of the register value in shadow_state when requested.
143 const auto control = shadow_state.shadow_ram_control; 272 const auto control = shadow_state.shadow_ram_control;
@@ -152,6 +281,29 @@ u32 Maxwell3D::ProcessShadowRam(u32 method, u32 argument) {
152 return argument; 281 return argument;
153} 282}
154 283
284void Maxwell3D::ConsumeSinkImpl() {
285 SCOPE_EXIT({ method_sink.clear(); });
286 const auto control = shadow_state.shadow_ram_control;
287 if (control == Regs::ShadowRamControl::Track ||
288 control == Regs::ShadowRamControl::TrackWithFilter) {
289
290 for (auto [method, value] : method_sink) {
291 shadow_state.reg_array[method] = value;
292 ProcessDirtyRegisters(method, value);
293 }
294 return;
295 }
296 if (control == Regs::ShadowRamControl::Replay) {
297 for (auto [method, value] : method_sink) {
298 ProcessDirtyRegisters(method, shadow_state.reg_array[method]);
299 }
300 return;
301 }
302 for (auto [method, value] : method_sink) {
303 ProcessDirtyRegisters(method, value);
304 }
305}
306
155void Maxwell3D::ProcessDirtyRegisters(u32 method, u32 argument) { 307void Maxwell3D::ProcessDirtyRegisters(u32 method, u32 argument) {
156 if (regs.reg_array[method] == argument) { 308 if (regs.reg_array[method] == argument) {
157 return; 309 return;
@@ -263,7 +415,6 @@ void Maxwell3D::CallMethod(u32 method, u32 method_argument, bool is_last_call) {
263 415
264 const u32 argument = ProcessShadowRam(method, method_argument); 416 const u32 argument = ProcessShadowRam(method, method_argument);
265 ProcessDirtyRegisters(method, argument); 417 ProcessDirtyRegisters(method, argument);
266
267 ProcessMethodCall(method, argument, method_argument, is_last_call); 418 ProcessMethodCall(method, argument, method_argument, is_last_call);
268} 419}
269 420
@@ -294,9 +445,11 @@ void Maxwell3D::CallMultiMethod(u32 method, const u32* base_start, u32 amount,
294 case MAXWELL3D_REG_INDEX(const_buffer.buffer) + 15: 445 case MAXWELL3D_REG_INDEX(const_buffer.buffer) + 15:
295 ProcessCBMultiData(base_start, amount); 446 ProcessCBMultiData(base_start, amount);
296 break; 447 break;
297 case MAXWELL3D_REG_INDEX(inline_data): 448 case MAXWELL3D_REG_INDEX(inline_data): {
449 ASSERT(methods_pending == amount);
298 upload_state.ProcessData(base_start, amount); 450 upload_state.ProcessData(base_start, amount);
299 return; 451 return;
452 }
300 default: 453 default:
301 for (u32 i = 0; i < amount; i++) { 454 for (u32 i = 0; i < amount; i++) {
302 CallMethod(method, base_start[i], methods_pending - i <= 1); 455 CallMethod(method, base_start[i], methods_pending - i <= 1);
@@ -389,7 +542,11 @@ void Maxwell3D::ProcessQueryCondition() {
389 case Regs::RenderEnable::Override::NeverRender: 542 case Regs::RenderEnable::Override::NeverRender:
390 execute_on = false; 543 execute_on = false;
391 break; 544 break;
392 case Regs::RenderEnable::Override::UseRenderEnable: 545 case Regs::RenderEnable::Override::UseRenderEnable: {
546 if (rasterizer->AccelerateConditionalRendering()) {
547 execute_on = true;
548 return;
549 }
393 switch (regs.render_enable.mode) { 550 switch (regs.render_enable.mode) {
394 case Regs::RenderEnable::Mode::True: { 551 case Regs::RenderEnable::Mode::True: {
395 execute_on = true; 552 execute_on = true;
@@ -427,6 +584,7 @@ void Maxwell3D::ProcessQueryCondition() {
427 } 584 }
428 break; 585 break;
429 } 586 }
587 }
430} 588}
431 589
432void Maxwell3D::ProcessCounterReset() { 590void Maxwell3D::ProcessCounterReset() {
@@ -463,7 +621,8 @@ std::optional<u64> Maxwell3D::GetQueryResult() {
463} 621}
464 622
465void Maxwell3D::ProcessCBBind(size_t stage_index) { 623void Maxwell3D::ProcessCBBind(size_t stage_index) {
466 // Bind the buffer currently in CB_ADDRESS to the specified index in the desired shader stage. 624 // Bind the buffer currently in CB_ADDRESS to the specified index in the desired shader
625 // stage.
467 const auto& bind_data = regs.bind_groups[stage_index]; 626 const auto& bind_data = regs.bind_groups[stage_index];
468 auto& buffer = state.shader_stages[stage_index].const_buffers[bind_data.shader_slot]; 627 auto& buffer = state.shader_stages[stage_index].const_buffers[bind_data.shader_slot];
469 buffer.enabled = bind_data.valid.Value() != 0; 628 buffer.enabled = bind_data.valid.Value() != 0;
@@ -524,4 +683,10 @@ u32 Maxwell3D::GetRegisterValue(u32 method) const {
524 return regs.reg_array[method]; 683 return regs.reg_array[method];
525} 684}
526 685
686void Maxwell3D::SetHLEReplacementAttributeType(u32 bank, u32 offset,
687 HLEReplacementAttributeType name) {
688 const u64 key = (static_cast<u64>(bank) << 32) | offset;
689 replace_table.emplace(key, name);
690}
691
527} // namespace Tegra::Engines 692} // namespace Tegra::Engines
diff --git a/src/video_core/engines/maxwell_3d.h b/src/video_core/engines/maxwell_3d.h
index 22b904319..0b2fd2928 100644
--- a/src/video_core/engines/maxwell_3d.h
+++ b/src/video_core/engines/maxwell_3d.h
@@ -272,6 +272,7 @@ public:
272 }; 272 };
273 273
274 union { 274 union {
275 u32 raw;
275 BitField<0, 1, Mode> mode; 276 BitField<0, 1, Mode> mode;
276 BitField<4, 8, u32> pad; 277 BitField<4, 8, u32> pad;
277 }; 278 };
@@ -1217,10 +1218,12 @@ public:
1217 1218
1218 struct Window { 1219 struct Window {
1219 union { 1220 union {
1221 u32 raw_x;
1220 BitField<0, 16, u32> x_min; 1222 BitField<0, 16, u32> x_min;
1221 BitField<16, 16, u32> x_max; 1223 BitField<16, 16, u32> x_max;
1222 }; 1224 };
1223 union { 1225 union {
1226 u32 raw_y;
1224 BitField<0, 16, u32> y_min; 1227 BitField<0, 16, u32> y_min;
1225 BitField<16, 16, u32> y_max; 1228 BitField<16, 16, u32> y_max;
1226 }; 1229 };
@@ -2708,7 +2711,7 @@ public:
2708 u32 post_z_pixel_imask; ///< 0x0F1C 2711 u32 post_z_pixel_imask; ///< 0x0F1C
2709 INSERT_PADDING_BYTES_NOINIT(0x20); 2712 INSERT_PADDING_BYTES_NOINIT(0x20);
2710 ConstantColorRendering const_color_rendering; ///< 0x0F40 2713 ConstantColorRendering const_color_rendering; ///< 0x0F40
2711 s32 stencil_back_ref; ///< 0x0F54 2714 u32 stencil_back_ref; ///< 0x0F54
2712 u32 stencil_back_mask; ///< 0x0F58 2715 u32 stencil_back_mask; ///< 0x0F58
2713 u32 stencil_back_func_mask; ///< 0x0F5C 2716 u32 stencil_back_func_mask; ///< 0x0F5C
2714 INSERT_PADDING_BYTES_NOINIT(0x14); 2717 INSERT_PADDING_BYTES_NOINIT(0x14);
@@ -2832,9 +2835,9 @@ public:
2832 Blend blend; ///< 0x133C 2835 Blend blend; ///< 0x133C
2833 u32 stencil_enable; ///< 0x1380 2836 u32 stencil_enable; ///< 0x1380
2834 StencilOp stencil_front_op; ///< 0x1384 2837 StencilOp stencil_front_op; ///< 0x1384
2835 s32 stencil_front_ref; ///< 0x1394 2838 u32 stencil_front_ref; ///< 0x1394
2836 s32 stencil_front_func_mask; ///< 0x1398 2839 u32 stencil_front_func_mask; ///< 0x1398
2837 s32 stencil_front_mask; ///< 0x139C 2840 u32 stencil_front_mask; ///< 0x139C
2838 INSERT_PADDING_BYTES_NOINIT(0x4); 2841 INSERT_PADDING_BYTES_NOINIT(0x4);
2839 u32 draw_auto_start_byte_count; ///< 0x13A4 2842 u32 draw_auto_start_byte_count; ///< 0x13A4
2840 PsSaturate frag_color_clamp; ///< 0x13A8 2843 PsSaturate frag_color_clamp; ///< 0x13A8
@@ -3020,6 +3023,24 @@ public:
3020 /// Store temporary hw register values, used by some calls to restore state after a operation 3023 /// Store temporary hw register values, used by some calls to restore state after a operation
3021 Regs shadow_state; 3024 Regs shadow_state;
3022 3025
3026 // None Engine
3027 enum class EngineHint : u32 {
3028 None = 0x0,
3029 OnHLEMacro = 0x1,
3030 };
3031
3032 EngineHint engine_state{EngineHint::None};
3033
3034 enum class HLEReplacementAttributeType : u32 {
3035 BaseVertex = 0x0,
3036 BaseInstance = 0x1,
3037 DrawID = 0x2,
3038 };
3039
3040 void SetHLEReplacementAttributeType(u32 bank, u32 offset, HLEReplacementAttributeType name);
3041
3042 std::unordered_map<u64, HLEReplacementAttributeType> replace_table;
3043
3023 static_assert(sizeof(Regs) == Regs::NUM_REGS * sizeof(u32), "Maxwell3D Regs has wrong size"); 3044 static_assert(sizeof(Regs) == Regs::NUM_REGS * sizeof(u32), "Maxwell3D Regs has wrong size");
3024 static_assert(std::is_trivially_copyable_v<Regs>, "Maxwell3D Regs must be trivially copyable"); 3045 static_assert(std::is_trivially_copyable_v<Regs>, "Maxwell3D Regs must be trivially copyable");
3025 3046
@@ -3067,6 +3088,35 @@ public:
3067 std::unique_ptr<DrawManager> draw_manager; 3088 std::unique_ptr<DrawManager> draw_manager;
3068 friend class DrawManager; 3089 friend class DrawManager;
3069 3090
3091 GPUVAddr GetMacroAddress(size_t index) const {
3092 return macro_addresses[index];
3093 }
3094
3095 void RefreshParameters() {
3096 if (!current_macro_dirty) {
3097 return;
3098 }
3099 RefreshParametersImpl();
3100 }
3101
3102 bool AnyParametersDirty() const {
3103 return current_macro_dirty;
3104 }
3105
3106 u32 GetMaxCurrentVertices();
3107
3108 size_t EstimateIndexBufferSize();
3109
3110 /// Handles a write to the CLEAR_BUFFERS register.
3111 void ProcessClearBuffers(u32 layer_count);
3112
3113 /// Handles a write to the CB_BIND register.
3114 void ProcessCBBind(size_t stage_index);
3115
3116 /// Handles a write to the CB_DATA[i] register.
3117 void ProcessCBData(u32 value);
3118 void ProcessCBMultiData(const u32* start_base, u32 amount);
3119
3070private: 3120private:
3071 void InitializeRegisterDefaults(); 3121 void InitializeRegisterDefaults();
3072 3122
@@ -3076,6 +3126,8 @@ private:
3076 3126
3077 void ProcessDirtyRegisters(u32 method, u32 argument); 3127 void ProcessDirtyRegisters(u32 method, u32 argument);
3078 3128
3129 void ConsumeSinkImpl() override;
3130
3079 void ProcessMethodCall(u32 method, u32 argument, u32 nonshadow_argument, bool is_last_call); 3131 void ProcessMethodCall(u32 method, u32 argument, u32 nonshadow_argument, bool is_last_call);
3080 3132
3081 /// Retrieves information about a specific TIC entry from the TIC buffer. 3133 /// Retrieves information about a specific TIC entry from the TIC buffer.
@@ -3116,16 +3168,13 @@ private:
3116 /// Handles writes to syncing register. 3168 /// Handles writes to syncing register.
3117 void ProcessSyncPoint(); 3169 void ProcessSyncPoint();
3118 3170
3119 /// Handles a write to the CB_DATA[i] register.
3120 void ProcessCBData(u32 value);
3121 void ProcessCBMultiData(const u32* start_base, u32 amount);
3122
3123 /// Handles a write to the CB_BIND register.
3124 void ProcessCBBind(size_t stage_index);
3125
3126 /// Returns a query's value or an empty object if the value will be deferred through a cache. 3171 /// Returns a query's value or an empty object if the value will be deferred through a cache.
3127 std::optional<u64> GetQueryResult(); 3172 std::optional<u64> GetQueryResult();
3128 3173
3174 void RefreshParametersImpl();
3175
3176 bool IsMethodExecutable(u32 method);
3177
3129 Core::System& system; 3178 Core::System& system;
3130 MemoryManager& memory_manager; 3179 MemoryManager& memory_manager;
3131 3180
@@ -3145,6 +3194,10 @@ private:
3145 Upload::State upload_state; 3194 Upload::State upload_state;
3146 3195
3147 bool execute_on{true}; 3196 bool execute_on{true};
3197
3198 std::vector<std::pair<GPUVAddr, size_t>> macro_segments;
3199 std::vector<GPUVAddr> macro_addresses;
3200 bool current_macro_dirty{};
3148}; 3201};
3149 3202
3150#define ASSERT_REG_POSITION(field_name, position) \ 3203#define ASSERT_REG_POSITION(field_name, position) \
diff --git a/src/video_core/engines/maxwell_dma.cpp b/src/video_core/engines/maxwell_dma.cpp
index f73d7bf0f..01f70ea9e 100644
--- a/src/video_core/engines/maxwell_dma.cpp
+++ b/src/video_core/engines/maxwell_dma.cpp
@@ -21,7 +21,10 @@ namespace Tegra::Engines {
21using namespace Texture; 21using namespace Texture;
22 22
23MaxwellDMA::MaxwellDMA(Core::System& system_, MemoryManager& memory_manager_) 23MaxwellDMA::MaxwellDMA(Core::System& system_, MemoryManager& memory_manager_)
24 : system{system_}, memory_manager{memory_manager_} {} 24 : system{system_}, memory_manager{memory_manager_} {
25 execution_mask.reset();
26 execution_mask[offsetof(Regs, launch_dma) / sizeof(u32)] = true;
27}
25 28
26MaxwellDMA::~MaxwellDMA() = default; 29MaxwellDMA::~MaxwellDMA() = default;
27 30
@@ -29,6 +32,13 @@ void MaxwellDMA::BindRasterizer(VideoCore::RasterizerInterface* rasterizer_) {
29 rasterizer = rasterizer_; 32 rasterizer = rasterizer_;
30} 33}
31 34
35void MaxwellDMA::ConsumeSinkImpl() {
36 for (auto [method, value] : method_sink) {
37 regs.reg_array[method] = value;
38 }
39 method_sink.clear();
40}
41
32void MaxwellDMA::CallMethod(u32 method, u32 method_argument, bool is_last_call) { 42void MaxwellDMA::CallMethod(u32 method, u32 method_argument, bool is_last_call) {
33 ASSERT_MSG(method < NUM_REGS, "Invalid MaxwellDMA register"); 43 ASSERT_MSG(method < NUM_REGS, "Invalid MaxwellDMA register");
34 44
diff --git a/src/video_core/engines/maxwell_dma.h b/src/video_core/engines/maxwell_dma.h
index c88191a61..0e594fa74 100644
--- a/src/video_core/engines/maxwell_dma.h
+++ b/src/video_core/engines/maxwell_dma.h
@@ -231,6 +231,8 @@ private:
231 231
232 void ReleaseSemaphore(); 232 void ReleaseSemaphore();
233 233
234 void ConsumeSinkImpl() override;
235
234 Core::System& system; 236 Core::System& system;
235 237
236 MemoryManager& memory_manager; 238 MemoryManager& memory_manager;
diff --git a/src/video_core/macro/macro.cpp b/src/video_core/macro/macro.cpp
index 505d81c1e..82ad0477d 100644
--- a/src/video_core/macro/macro.cpp
+++ b/src/video_core/macro/macro.cpp
@@ -12,7 +12,9 @@
12#include "common/assert.h" 12#include "common/assert.h"
13#include "common/fs/fs.h" 13#include "common/fs/fs.h"
14#include "common/fs/path_util.h" 14#include "common/fs/path_util.h"
15#include "common/microprofile.h"
15#include "common/settings.h" 16#include "common/settings.h"
17#include "video_core/engines/maxwell_3d.h"
16#include "video_core/macro/macro.h" 18#include "video_core/macro/macro.h"
17#include "video_core/macro/macro_hle.h" 19#include "video_core/macro/macro_hle.h"
18#include "video_core/macro/macro_interpreter.h" 20#include "video_core/macro/macro_interpreter.h"
@@ -21,6 +23,8 @@
21#include "video_core/macro/macro_jit_x64.h" 23#include "video_core/macro/macro_jit_x64.h"
22#endif 24#endif
23 25
26MICROPROFILE_DEFINE(MacroHLE, "GPU", "Execute macro HLE", MP_RGB(128, 192, 192));
27
24namespace Tegra { 28namespace Tegra {
25 29
26static void Dump(u64 hash, std::span<const u32> code) { 30static void Dump(u64 hash, std::span<const u32> code) {
@@ -40,8 +44,8 @@ static void Dump(u64 hash, std::span<const u32> code) {
40 macro_file.write(reinterpret_cast<const char*>(code.data()), code.size_bytes()); 44 macro_file.write(reinterpret_cast<const char*>(code.data()), code.size_bytes());
41} 45}
42 46
43MacroEngine::MacroEngine(Engines::Maxwell3D& maxwell3d) 47MacroEngine::MacroEngine(Engines::Maxwell3D& maxwell3d_)
44 : hle_macros{std::make_unique<Tegra::HLEMacro>(maxwell3d)} {} 48 : hle_macros{std::make_unique<Tegra::HLEMacro>(maxwell3d_)}, maxwell3d{maxwell3d_} {}
45 49
46MacroEngine::~MacroEngine() = default; 50MacroEngine::~MacroEngine() = default;
47 51
@@ -59,8 +63,10 @@ void MacroEngine::Execute(u32 method, const std::vector<u32>& parameters) {
59 if (compiled_macro != macro_cache.end()) { 63 if (compiled_macro != macro_cache.end()) {
60 const auto& cache_info = compiled_macro->second; 64 const auto& cache_info = compiled_macro->second;
61 if (cache_info.has_hle_program) { 65 if (cache_info.has_hle_program) {
66 MICROPROFILE_SCOPE(MacroHLE);
62 cache_info.hle_program->Execute(parameters, method); 67 cache_info.hle_program->Execute(parameters, method);
63 } else { 68 } else {
69 maxwell3d.RefreshParameters();
64 cache_info.lle_program->Execute(parameters, method); 70 cache_info.lle_program->Execute(parameters, method);
65 } 71 }
66 } else { 72 } else {
@@ -101,12 +107,15 @@ void MacroEngine::Execute(u32 method, const std::vector<u32>& parameters) {
101 } 107 }
102 } 108 }
103 109
104 if (auto hle_program = hle_macros->GetHLEProgram(cache_info.hash)) { 110 auto hle_program = hle_macros->GetHLEProgram(cache_info.hash);
111 if (!hle_program || Settings::values.disable_macro_hle) {
112 maxwell3d.RefreshParameters();
113 cache_info.lle_program->Execute(parameters, method);
114 } else {
105 cache_info.has_hle_program = true; 115 cache_info.has_hle_program = true;
106 cache_info.hle_program = std::move(hle_program); 116 cache_info.hle_program = std::move(hle_program);
117 MICROPROFILE_SCOPE(MacroHLE);
107 cache_info.hle_program->Execute(parameters, method); 118 cache_info.hle_program->Execute(parameters, method);
108 } else {
109 cache_info.lle_program->Execute(parameters, method);
110 } 119 }
111 } 120 }
112} 121}
diff --git a/src/video_core/macro/macro.h b/src/video_core/macro/macro.h
index 07d97ba39..737ced9a4 100644
--- a/src/video_core/macro/macro.h
+++ b/src/video_core/macro/macro.h
@@ -137,6 +137,7 @@ private:
137 std::unordered_map<u32, CacheInfo> macro_cache; 137 std::unordered_map<u32, CacheInfo> macro_cache;
138 std::unordered_map<u32, std::vector<u32>> uploaded_macro_code; 138 std::unordered_map<u32, std::vector<u32>> uploaded_macro_code;
139 std::unique_ptr<HLEMacro> hle_macros; 139 std::unique_ptr<HLEMacro> hle_macros;
140 Engines::Maxwell3D& maxwell3d;
140}; 141};
141 142
142std::unique_ptr<MacroEngine> GetMacroEngine(Engines::Maxwell3D& maxwell3d); 143std::unique_ptr<MacroEngine> GetMacroEngine(Engines::Maxwell3D& maxwell3d);
diff --git a/src/video_core/macro/macro_hle.cpp b/src/video_core/macro/macro_hle.cpp
index 8549db2e4..a5476e795 100644
--- a/src/video_core/macro/macro_hle.cpp
+++ b/src/video_core/macro/macro_hle.cpp
@@ -1,143 +1,593 @@
1// SPDX-FileCopyrightText: Copyright 2020 yuzu Emulator Project 1// SPDX-FileCopyrightText: Copyright 2023 yuzu Emulator Project
2// SPDX-License-Identifier: GPL-2.0-or-later 2// SPDX-License-Identifier: GPL-3.0-or-later
3 3
4#include <array> 4#include <array>
5#include <vector> 5#include <vector>
6#include "common/assert.h"
6#include "common/scope_exit.h" 7#include "common/scope_exit.h"
7#include "video_core/dirty_flags.h" 8#include "video_core/dirty_flags.h"
8#include "video_core/engines/draw_manager.h" 9#include "video_core/engines/draw_manager.h"
9#include "video_core/engines/maxwell_3d.h" 10#include "video_core/engines/maxwell_3d.h"
10#include "video_core/macro/macro.h" 11#include "video_core/macro/macro.h"
11#include "video_core/macro/macro_hle.h" 12#include "video_core/macro/macro_hle.h"
13#include "video_core/memory_manager.h"
12#include "video_core/rasterizer_interface.h" 14#include "video_core/rasterizer_interface.h"
13 15
14namespace Tegra { 16namespace Tegra {
15namespace {
16 17
17using HLEFunction = void (*)(Engines::Maxwell3D& maxwell3d, const std::vector<u32>& parameters); 18using Maxwell3D = Engines::Maxwell3D;
18 19
19// HLE'd functions 20namespace {
20void HLE_771BB18C62444DA0(Engines::Maxwell3D& maxwell3d, const std::vector<u32>& parameters) {
21 const u32 instance_count = parameters[2] & maxwell3d.GetRegisterValue(0xD1B);
22 maxwell3d.draw_manager->DrawIndex(
23 static_cast<Tegra::Engines::Maxwell3D::Regs::PrimitiveTopology>(parameters[0] & 0x3ffffff),
24 parameters[4], parameters[1], parameters[3], parameters[5], instance_count);
25}
26 21
27void HLE_0D61FC9FAAC9FCAD(Engines::Maxwell3D& maxwell3d, const std::vector<u32>& parameters) { 22bool IsTopologySafe(Maxwell3D::Regs::PrimitiveTopology topology) {
28 const u32 instance_count = (maxwell3d.GetRegisterValue(0xD1B) & parameters[2]); 23 switch (topology) {
29 maxwell3d.draw_manager->DrawArray( 24 case Maxwell3D::Regs::PrimitiveTopology::Points:
30 static_cast<Tegra::Engines::Maxwell3D::Regs::PrimitiveTopology>(parameters[0]), 25 case Maxwell3D::Regs::PrimitiveTopology::Lines:
31 parameters[3], parameters[1], parameters[4], instance_count); 26 case Maxwell3D::Regs::PrimitiveTopology::LineLoop:
27 case Maxwell3D::Regs::PrimitiveTopology::LineStrip:
28 case Maxwell3D::Regs::PrimitiveTopology::Triangles:
29 case Maxwell3D::Regs::PrimitiveTopology::TriangleStrip:
30 case Maxwell3D::Regs::PrimitiveTopology::TriangleFan:
31 case Maxwell3D::Regs::PrimitiveTopology::LinesAdjacency:
32 case Maxwell3D::Regs::PrimitiveTopology::LineStripAdjacency:
33 case Maxwell3D::Regs::PrimitiveTopology::TrianglesAdjacency:
34 case Maxwell3D::Regs::PrimitiveTopology::TriangleStripAdjacency:
35 case Maxwell3D::Regs::PrimitiveTopology::Patches:
36 return true;
37 case Maxwell3D::Regs::PrimitiveTopology::Quads:
38 case Maxwell3D::Regs::PrimitiveTopology::QuadStrip:
39 case Maxwell3D::Regs::PrimitiveTopology::Polygon:
40 default:
41 return false;
42 }
32} 43}
33 44
34void HLE_0217920100488FF7(Engines::Maxwell3D& maxwell3d, const std::vector<u32>& parameters) { 45class HLEMacroImpl : public CachedMacro {
35 const u32 instance_count = (maxwell3d.GetRegisterValue(0xD1B) & parameters[2]); 46public:
36 const u32 element_base = parameters[4]; 47 explicit HLEMacroImpl(Maxwell3D& maxwell3d_) : maxwell3d{maxwell3d_} {}
37 const u32 base_instance = parameters[5];
38 maxwell3d.regs.vertex_id_base = element_base;
39 maxwell3d.dirty.flags[VideoCommon::Dirty::IndexBuffer] = true;
40 maxwell3d.CallMethod(0x8e3, 0x640, true);
41 maxwell3d.CallMethod(0x8e4, element_base, true);
42 maxwell3d.CallMethod(0x8e5, base_instance, true);
43
44 maxwell3d.draw_manager->DrawIndex(
45 static_cast<Tegra::Engines::Maxwell3D::Regs::PrimitiveTopology>(parameters[0]),
46 parameters[3], parameters[1], element_base, base_instance, instance_count);
47
48 maxwell3d.regs.vertex_id_base = 0x0;
49 maxwell3d.CallMethod(0x8e3, 0x640, true);
50 maxwell3d.CallMethod(0x8e4, 0x0, true);
51 maxwell3d.CallMethod(0x8e5, 0x0, true);
52}
53 48
54// Multidraw Indirect 49protected:
55void HLE_3F5E74B9C9A50164(Engines::Maxwell3D& maxwell3d, const std::vector<u32>& parameters) { 50 Maxwell3D& maxwell3d;
56 SCOPE_EXIT({ 51};
57 // Clean everything. 52
58 maxwell3d.regs.vertex_id_base = 0x0; 53class HLE_DrawArrays final : public HLEMacroImpl {
59 maxwell3d.CallMethod(0x8e3, 0x640, true); 54public:
60 maxwell3d.CallMethod(0x8e4, 0x0, true); 55 explicit HLE_DrawArrays(Maxwell3D& maxwell3d_) : HLEMacroImpl(maxwell3d_) {}
61 maxwell3d.CallMethod(0x8e5, 0x0, true); 56
57 void Execute(const std::vector<u32>& parameters, [[maybe_unused]] u32 method) override {
58 maxwell3d.RefreshParameters();
59
60 auto topology = static_cast<Maxwell3D::Regs::PrimitiveTopology>(parameters[0]);
61 maxwell3d.draw_manager->DrawArray(topology, parameters[1], parameters[2],
62 maxwell3d.regs.global_base_instance_index, 1);
63 }
64};
65
66class HLE_DrawIndexed final : public HLEMacroImpl {
67public:
68 explicit HLE_DrawIndexed(Maxwell3D& maxwell3d_) : HLEMacroImpl(maxwell3d_) {}
69
70 void Execute(const std::vector<u32>& parameters, [[maybe_unused]] u32 method) override {
71 maxwell3d.RefreshParameters();
72 maxwell3d.regs.index_buffer.start_addr_high = parameters[1];
73 maxwell3d.regs.index_buffer.start_addr_low = parameters[2];
74 maxwell3d.regs.index_buffer.format =
75 static_cast<Engines::Maxwell3D::Regs::IndexFormat>(parameters[3]);
62 maxwell3d.dirty.flags[VideoCommon::Dirty::IndexBuffer] = true; 76 maxwell3d.dirty.flags[VideoCommon::Dirty::IndexBuffer] = true;
63 }); 77
64 const u32 start_indirect = parameters[0]; 78 auto topology = static_cast<Maxwell3D::Regs::PrimitiveTopology>(parameters[0]);
65 const u32 end_indirect = parameters[1]; 79 maxwell3d.draw_manager->DrawIndex(topology, 0, parameters[4],
66 if (start_indirect >= end_indirect) { 80 maxwell3d.regs.global_base_vertex_index,
67 // Nothing to do. 81 maxwell3d.regs.global_base_instance_index, 1);
68 return; 82 }
69 } 83};
70 const u32 padding = parameters[3]; 84
71 const std::size_t max_draws = parameters[4]; 85/*
72 86 * @note: these macros have two versions, a normal and extended version, with the extended version
73 const u32 indirect_words = 5 + padding; 87 * also assigning the base vertex/instance.
74 const std::size_t first_draw = start_indirect; 88 */
75 const std::size_t effective_draws = end_indirect - start_indirect; 89template <bool extended>
76 const std::size_t last_draw = start_indirect + std::min(effective_draws, max_draws); 90class HLE_DrawArraysIndirect final : public HLEMacroImpl {
77 91public:
78 for (std::size_t index = first_draw; index < last_draw; index++) { 92 explicit HLE_DrawArraysIndirect(Maxwell3D& maxwell3d_) : HLEMacroImpl(maxwell3d_) {}
79 const std::size_t base = index * indirect_words + 5; 93
80 const u32 base_vertex = parameters[base + 3]; 94 void Execute(const std::vector<u32>& parameters, [[maybe_unused]] u32 method) override {
81 const u32 base_instance = parameters[base + 4]; 95 auto topology = static_cast<Maxwell3D::Regs::PrimitiveTopology>(parameters[0]);
82 maxwell3d.regs.vertex_id_base = base_vertex; 96 if (!maxwell3d.AnyParametersDirty() || !IsTopologySafe(topology)) {
83 maxwell3d.CallMethod(0x8e3, 0x640, true); 97 Fallback(parameters);
84 maxwell3d.CallMethod(0x8e4, base_vertex, true); 98 return;
85 maxwell3d.CallMethod(0x8e5, base_instance, true); 99 }
100
101 auto& params = maxwell3d.draw_manager->GetIndirectParams();
102 params.is_indexed = false;
103 params.include_count = false;
104 params.count_start_address = 0;
105 params.indirect_start_address = maxwell3d.GetMacroAddress(1);
106 params.buffer_size = 4 * sizeof(u32);
107 params.max_draw_counts = 1;
108 params.stride = 0;
109
110 if constexpr (extended) {
111 maxwell3d.engine_state = Maxwell3D::EngineHint::OnHLEMacro;
112 maxwell3d.SetHLEReplacementAttributeType(
113 0, 0x640, Maxwell3D::HLEReplacementAttributeType::BaseInstance);
114 }
115
116 maxwell3d.draw_manager->DrawArrayIndirect(topology);
117
118 if constexpr (extended) {
119 maxwell3d.engine_state = Maxwell3D::EngineHint::None;
120 maxwell3d.replace_table.clear();
121 }
122 }
123
124private:
125 void Fallback(const std::vector<u32>& parameters) {
126 SCOPE_EXIT({
127 if (extended) {
128 maxwell3d.engine_state = Maxwell3D::EngineHint::None;
129 maxwell3d.replace_table.clear();
130 }
131 });
132 maxwell3d.RefreshParameters();
133 const u32 instance_count = (maxwell3d.GetRegisterValue(0xD1B) & parameters[2]);
134
135 auto topology = static_cast<Maxwell3D::Regs::PrimitiveTopology>(parameters[0]);
136 const u32 vertex_first = parameters[3];
137 const u32 vertex_count = parameters[1];
138
139 if (!IsTopologySafe(topology) &&
140 static_cast<size_t>(maxwell3d.GetMaxCurrentVertices()) <
141 static_cast<size_t>(vertex_first) + static_cast<size_t>(vertex_count)) {
142 ASSERT_MSG(false, "Faulty draw!");
143 return;
144 }
145
146 const u32 base_instance = parameters[4];
147 if constexpr (extended) {
148 maxwell3d.regs.global_base_instance_index = base_instance;
149 maxwell3d.engine_state = Maxwell3D::EngineHint::OnHLEMacro;
150 maxwell3d.SetHLEReplacementAttributeType(
151 0, 0x640, Maxwell3D::HLEReplacementAttributeType::BaseInstance);
152 }
153
154 maxwell3d.draw_manager->DrawArray(topology, vertex_first, vertex_count, base_instance,
155 instance_count);
156
157 if constexpr (extended) {
158 maxwell3d.regs.global_base_instance_index = 0;
159 maxwell3d.engine_state = Maxwell3D::EngineHint::None;
160 maxwell3d.replace_table.clear();
161 }
162 }
163};
164
165/*
166 * @note: these macros have two versions, a normal and extended version, with the extended version
167 * also assigning the base vertex/instance.
168 */
169template <bool extended>
170class HLE_DrawIndexedIndirect final : public HLEMacroImpl {
171public:
172 explicit HLE_DrawIndexedIndirect(Maxwell3D& maxwell3d_) : HLEMacroImpl(maxwell3d_) {}
173
174 void Execute(const std::vector<u32>& parameters, [[maybe_unused]] u32 method) override {
175 auto topology = static_cast<Maxwell3D::Regs::PrimitiveTopology>(parameters[0]);
176 if (!maxwell3d.AnyParametersDirty() || !IsTopologySafe(topology)) {
177 Fallback(parameters);
178 return;
179 }
180
181 const u32 estimate = static_cast<u32>(maxwell3d.EstimateIndexBufferSize());
182 const u32 element_base = parameters[4];
183 const u32 base_instance = parameters[5];
184 maxwell3d.regs.vertex_id_base = element_base;
185 maxwell3d.regs.global_base_vertex_index = element_base;
186 maxwell3d.regs.global_base_instance_index = base_instance;
187 maxwell3d.dirty.flags[VideoCommon::Dirty::IndexBuffer] = true;
188 if constexpr (extended) {
189 maxwell3d.engine_state = Maxwell3D::EngineHint::OnHLEMacro;
190 maxwell3d.SetHLEReplacementAttributeType(
191 0, 0x640, Maxwell3D::HLEReplacementAttributeType::BaseVertex);
192 maxwell3d.SetHLEReplacementAttributeType(
193 0, 0x644, Maxwell3D::HLEReplacementAttributeType::BaseInstance);
194 }
195 auto& params = maxwell3d.draw_manager->GetIndirectParams();
196 params.is_indexed = true;
197 params.include_count = false;
198 params.count_start_address = 0;
199 params.indirect_start_address = maxwell3d.GetMacroAddress(1);
200 params.buffer_size = 5 * sizeof(u32);
201 params.max_draw_counts = 1;
202 params.stride = 0;
86 maxwell3d.dirty.flags[VideoCommon::Dirty::IndexBuffer] = true; 203 maxwell3d.dirty.flags[VideoCommon::Dirty::IndexBuffer] = true;
204 maxwell3d.draw_manager->DrawIndexedIndirect(topology, 0, estimate);
205 maxwell3d.regs.vertex_id_base = 0x0;
206 maxwell3d.regs.global_base_vertex_index = 0x0;
207 maxwell3d.regs.global_base_instance_index = 0x0;
208 if constexpr (extended) {
209 maxwell3d.engine_state = Maxwell3D::EngineHint::None;
210 maxwell3d.replace_table.clear();
211 }
212 }
213
214private:
215 void Fallback(const std::vector<u32>& parameters) {
216 maxwell3d.RefreshParameters();
217 const u32 instance_count = (maxwell3d.GetRegisterValue(0xD1B) & parameters[2]);
218 const u32 element_base = parameters[4];
219 const u32 base_instance = parameters[5];
220 maxwell3d.regs.vertex_id_base = element_base;
221 maxwell3d.regs.global_base_vertex_index = element_base;
222 maxwell3d.regs.global_base_instance_index = base_instance;
223 maxwell3d.dirty.flags[VideoCommon::Dirty::IndexBuffer] = true;
224 if constexpr (extended) {
225 maxwell3d.engine_state = Maxwell3D::EngineHint::OnHLEMacro;
226 maxwell3d.SetHLEReplacementAttributeType(
227 0, 0x640, Maxwell3D::HLEReplacementAttributeType::BaseVertex);
228 maxwell3d.SetHLEReplacementAttributeType(
229 0, 0x644, Maxwell3D::HLEReplacementAttributeType::BaseInstance);
230 }
231
87 maxwell3d.draw_manager->DrawIndex( 232 maxwell3d.draw_manager->DrawIndex(
88 static_cast<Tegra::Engines::Maxwell3D::Regs::PrimitiveTopology>(parameters[2]), 233 static_cast<Tegra::Maxwell3D::Regs::PrimitiveTopology>(parameters[0]), parameters[3],
89 parameters[base + 2], parameters[base], base_vertex, base_instance, 234 parameters[1], element_base, base_instance, instance_count);
90 parameters[base + 1]); 235
236 maxwell3d.regs.vertex_id_base = 0x0;
237 maxwell3d.regs.global_base_vertex_index = 0x0;
238 maxwell3d.regs.global_base_instance_index = 0x0;
239 if constexpr (extended) {
240 maxwell3d.engine_state = Maxwell3D::EngineHint::None;
241 maxwell3d.replace_table.clear();
242 }
91 } 243 }
92} 244};
93 245
94// Multi-layer Clear 246class HLE_MultiLayerClear final : public HLEMacroImpl {
95void HLE_EAD26C3E2109B06B(Engines::Maxwell3D& maxwell3d, const std::vector<u32>& parameters) { 247public:
96 ASSERT(parameters.size() == 1); 248 explicit HLE_MultiLayerClear(Maxwell3D& maxwell3d_) : HLEMacroImpl(maxwell3d_) {}
97 249
98 const Engines::Maxwell3D::Regs::ClearSurface clear_params{parameters[0]}; 250 void Execute(const std::vector<u32>& parameters, [[maybe_unused]] u32 method) override {
99 const u32 rt_index = clear_params.RT; 251 maxwell3d.RefreshParameters();
100 const u32 num_layers = maxwell3d.regs.rt[rt_index].depth; 252 ASSERT(parameters.size() == 1);
101 ASSERT(clear_params.layer == 0);
102 253
103 maxwell3d.regs.clear_surface.raw = clear_params.raw; 254 const Maxwell3D::Regs::ClearSurface clear_params{parameters[0]};
104 maxwell3d.draw_manager->Clear(num_layers); 255 const u32 rt_index = clear_params.RT;
105} 256 const u32 num_layers = maxwell3d.regs.rt[rt_index].depth;
257 ASSERT(clear_params.layer == 0);
106 258
107constexpr std::array<std::pair<u64, HLEFunction>, 5> hle_funcs{{ 259 maxwell3d.regs.clear_surface.raw = clear_params.raw;
108 {0x771BB18C62444DA0, &HLE_771BB18C62444DA0}, 260 maxwell3d.draw_manager->Clear(num_layers);
109 {0x0D61FC9FAAC9FCAD, &HLE_0D61FC9FAAC9FCAD}, 261 }
110 {0x0217920100488FF7, &HLE_0217920100488FF7}, 262};
111 {0x3F5E74B9C9A50164, &HLE_3F5E74B9C9A50164}, 263
112 {0xEAD26C3E2109B06B, &HLE_EAD26C3E2109B06B}, 264class HLE_MultiDrawIndexedIndirectCount final : public HLEMacroImpl {
113}}; 265public:
266 explicit HLE_MultiDrawIndexedIndirectCount(Maxwell3D& maxwell3d_) : HLEMacroImpl(maxwell3d_) {}
267
268 void Execute(const std::vector<u32>& parameters, [[maybe_unused]] u32 method) override {
269 const auto topology = static_cast<Maxwell3D::Regs::PrimitiveTopology>(parameters[2]);
270 if (!IsTopologySafe(topology)) {
271 Fallback(parameters);
272 return;
273 }
274
275 const u32 start_indirect = parameters[0];
276 const u32 end_indirect = parameters[1];
277 if (start_indirect >= end_indirect) {
278 // Nothing to do.
279 return;
280 }
281
282 const u32 padding = parameters[3]; // padding is in words
283
284 // size of each indirect segment
285 const u32 indirect_words = 5 + padding;
286 const u32 stride = indirect_words * sizeof(u32);
287 const std::size_t draw_count = end_indirect - start_indirect;
288 const u32 estimate = static_cast<u32>(maxwell3d.EstimateIndexBufferSize());
289 maxwell3d.dirty.flags[VideoCommon::Dirty::IndexBuffer] = true;
290 auto& params = maxwell3d.draw_manager->GetIndirectParams();
291 params.is_indexed = true;
292 params.include_count = true;
293 params.count_start_address = maxwell3d.GetMacroAddress(4);
294 params.indirect_start_address = maxwell3d.GetMacroAddress(5);
295 params.buffer_size = stride * draw_count;
296 params.max_draw_counts = draw_count;
297 params.stride = stride;
298 maxwell3d.dirty.flags[VideoCommon::Dirty::IndexBuffer] = true;
299 maxwell3d.engine_state = Maxwell3D::EngineHint::OnHLEMacro;
300 maxwell3d.SetHLEReplacementAttributeType(
301 0, 0x640, Maxwell3D::HLEReplacementAttributeType::BaseVertex);
302 maxwell3d.SetHLEReplacementAttributeType(
303 0, 0x644, Maxwell3D::HLEReplacementAttributeType::BaseInstance);
304 maxwell3d.SetHLEReplacementAttributeType(0, 0x648,
305 Maxwell3D::HLEReplacementAttributeType::DrawID);
306 maxwell3d.draw_manager->DrawIndexedIndirect(topology, 0, estimate);
307 maxwell3d.engine_state = Maxwell3D::EngineHint::None;
308 maxwell3d.replace_table.clear();
309 }
310
311private:
312 void Fallback(const std::vector<u32>& parameters) {
313 SCOPE_EXIT({
314 // Clean everything.
315 maxwell3d.regs.vertex_id_base = 0x0;
316 maxwell3d.engine_state = Maxwell3D::EngineHint::None;
317 maxwell3d.replace_table.clear();
318 });
319 maxwell3d.RefreshParameters();
320 const u32 start_indirect = parameters[0];
321 const u32 end_indirect = parameters[1];
322 if (start_indirect >= end_indirect) {
323 // Nothing to do.
324 return;
325 }
326 const auto topology = static_cast<Maxwell3D::Regs::PrimitiveTopology>(parameters[2]);
327 const u32 padding = parameters[3];
328 const std::size_t max_draws = parameters[4];
329
330 const u32 indirect_words = 5 + padding;
331 const std::size_t first_draw = start_indirect;
332 const std::size_t effective_draws = end_indirect - start_indirect;
333 const std::size_t last_draw = start_indirect + std::min(effective_draws, max_draws);
334
335 for (std::size_t index = first_draw; index < last_draw; index++) {
336 const std::size_t base = index * indirect_words + 5;
337 const u32 base_vertex = parameters[base + 3];
338 const u32 base_instance = parameters[base + 4];
339 maxwell3d.regs.vertex_id_base = base_vertex;
340 maxwell3d.engine_state = Maxwell3D::EngineHint::OnHLEMacro;
341 maxwell3d.SetHLEReplacementAttributeType(
342 0, 0x640, Maxwell3D::HLEReplacementAttributeType::BaseVertex);
343 maxwell3d.SetHLEReplacementAttributeType(
344 0, 0x644, Maxwell3D::HLEReplacementAttributeType::BaseInstance);
345 maxwell3d.CallMethod(0x8e3, 0x648, true);
346 maxwell3d.CallMethod(0x8e4, static_cast<u32>(index), true);
347 maxwell3d.dirty.flags[VideoCommon::Dirty::IndexBuffer] = true;
348 maxwell3d.draw_manager->DrawIndex(topology, parameters[base + 2], parameters[base],
349 base_vertex, base_instance, parameters[base + 1]);
350 }
351 }
352};
353
354class HLE_C713C83D8F63CCF3 final : public HLEMacroImpl {
355public:
356 explicit HLE_C713C83D8F63CCF3(Maxwell3D& maxwell3d_) : HLEMacroImpl(maxwell3d_) {}
357
358 void Execute(const std::vector<u32>& parameters, [[maybe_unused]] u32 method) override {
359 maxwell3d.RefreshParameters();
360 const u32 offset = (parameters[0] & 0x3FFFFFFF) << 2;
361 const u32 address = maxwell3d.regs.shadow_scratch[24];
362 auto& const_buffer = maxwell3d.regs.const_buffer;
363 const_buffer.size = 0x7000;
364 const_buffer.address_high = (address >> 24) & 0xFF;
365 const_buffer.address_low = address << 8;
366 const_buffer.offset = offset;
367 }
368};
369
370class HLE_D7333D26E0A93EDE final : public HLEMacroImpl {
371public:
372 explicit HLE_D7333D26E0A93EDE(Maxwell3D& maxwell3d_) : HLEMacroImpl(maxwell3d_) {}
373
374 void Execute(const std::vector<u32>& parameters, [[maybe_unused]] u32 method) override {
375 maxwell3d.RefreshParameters();
376 const size_t index = parameters[0];
377 const u32 address = maxwell3d.regs.shadow_scratch[42 + index];
378 const u32 size = maxwell3d.regs.shadow_scratch[47 + index];
379 auto& const_buffer = maxwell3d.regs.const_buffer;
380 const_buffer.size = size;
381 const_buffer.address_high = (address >> 24) & 0xFF;
382 const_buffer.address_low = address << 8;
383 }
384};
385
386class HLE_BindShader final : public HLEMacroImpl {
387public:
388 explicit HLE_BindShader(Maxwell3D& maxwell3d_) : HLEMacroImpl(maxwell3d_) {}
389
390 void Execute(const std::vector<u32>& parameters, [[maybe_unused]] u32 method) override {
391 maxwell3d.RefreshParameters();
392 auto& regs = maxwell3d.regs;
393 const u32 index = parameters[0];
394 if ((parameters[1] - regs.shadow_scratch[28 + index]) == 0) {
395 return;
396 }
397
398 regs.pipelines[index & 0xF].offset = parameters[2];
399 maxwell3d.dirty.flags[VideoCommon::Dirty::Shaders] = true;
400 regs.shadow_scratch[28 + index] = parameters[1];
401 regs.shadow_scratch[34 + index] = parameters[2];
402
403 const u32 address = parameters[4];
404 auto& const_buffer = regs.const_buffer;
405 const_buffer.size = 0x10000;
406 const_buffer.address_high = (address >> 24) & 0xFF;
407 const_buffer.address_low = address << 8;
408
409 const size_t bind_group_id = parameters[3] & 0x7F;
410 auto& bind_group = regs.bind_groups[bind_group_id];
411 bind_group.raw_config = 0x11;
412 maxwell3d.ProcessCBBind(bind_group_id);
413 }
414};
114 415
115class HLEMacroImpl final : public CachedMacro { 416class HLE_SetRasterBoundingBox final : public HLEMacroImpl {
116public: 417public:
117 explicit HLEMacroImpl(Engines::Maxwell3D& maxwell3d_, HLEFunction func_) 418 explicit HLE_SetRasterBoundingBox(Maxwell3D& maxwell3d_) : HLEMacroImpl(maxwell3d_) {}
118 : maxwell3d{maxwell3d_}, func{func_} {}
119 419
120 void Execute(const std::vector<u32>& parameters, u32 method) override { 420 void Execute(const std::vector<u32>& parameters, [[maybe_unused]] u32 method) override {
121 func(maxwell3d, parameters); 421 maxwell3d.RefreshParameters();
422 const u32 raster_mode = parameters[0];
423 auto& regs = maxwell3d.regs;
424 const u32 raster_enabled = maxwell3d.regs.conservative_raster_enable;
425 const u32 scratch_data = maxwell3d.regs.shadow_scratch[52];
426 regs.raster_bounding_box.raw = raster_mode & 0xFFFFF00F;
427 regs.raster_bounding_box.pad.Assign(scratch_data & raster_enabled);
428 }
429};
430
431template <size_t base_size>
432class HLE_ClearConstBuffer final : public HLEMacroImpl {
433public:
434 explicit HLE_ClearConstBuffer(Maxwell3D& maxwell3d_) : HLEMacroImpl(maxwell3d_) {}
435
436 void Execute(const std::vector<u32>& parameters, [[maybe_unused]] u32 method) override {
437 maxwell3d.RefreshParameters();
438 static constexpr std::array<u32, base_size> zeroes{};
439 auto& regs = maxwell3d.regs;
440 regs.const_buffer.size = static_cast<u32>(base_size);
441 regs.const_buffer.address_high = parameters[0];
442 regs.const_buffer.address_low = parameters[1];
443 regs.const_buffer.offset = 0;
444 maxwell3d.ProcessCBMultiData(zeroes.data(), parameters[2] * 4);
445 }
446};
447
448class HLE_ClearMemory final : public HLEMacroImpl {
449public:
450 explicit HLE_ClearMemory(Maxwell3D& maxwell3d_) : HLEMacroImpl(maxwell3d_) {}
451
452 void Execute(const std::vector<u32>& parameters, [[maybe_unused]] u32 method) override {
453 maxwell3d.RefreshParameters();
454
455 const u32 needed_memory = parameters[2] / sizeof(u32);
456 if (needed_memory > zero_memory.size()) {
457 zero_memory.resize(needed_memory, 0);
458 }
459 auto& regs = maxwell3d.regs;
460 regs.upload.line_length_in = parameters[2];
461 regs.upload.line_count = 1;
462 regs.upload.dest.address_high = parameters[0];
463 regs.upload.dest.address_low = parameters[1];
464 maxwell3d.CallMethod(static_cast<size_t>(MAXWELL3D_REG_INDEX(launch_dma)), 0x1011, true);
465 maxwell3d.CallMultiMethod(static_cast<size_t>(MAXWELL3D_REG_INDEX(inline_data)),
466 zero_memory.data(), needed_memory, needed_memory);
122 } 467 }
123 468
124private: 469private:
125 Engines::Maxwell3D& maxwell3d; 470 std::vector<u32> zero_memory;
126 HLEFunction func; 471};
472
473class HLE_TransformFeedbackSetup final : public HLEMacroImpl {
474public:
475 explicit HLE_TransformFeedbackSetup(Maxwell3D& maxwell3d_) : HLEMacroImpl(maxwell3d_) {}
476
477 void Execute(const std::vector<u32>& parameters, [[maybe_unused]] u32 method) override {
478 maxwell3d.RefreshParameters();
479
480 auto& regs = maxwell3d.regs;
481 regs.transform_feedback_enabled = 1;
482 regs.transform_feedback.buffers[0].start_offset = 0;
483 regs.transform_feedback.buffers[1].start_offset = 0;
484 regs.transform_feedback.buffers[2].start_offset = 0;
485 regs.transform_feedback.buffers[3].start_offset = 0;
486
487 regs.upload.line_length_in = 4;
488 regs.upload.line_count = 1;
489 regs.upload.dest.address_high = parameters[0];
490 regs.upload.dest.address_low = parameters[1];
491 maxwell3d.CallMethod(static_cast<size_t>(MAXWELL3D_REG_INDEX(launch_dma)), 0x1011, true);
492 maxwell3d.CallMethod(static_cast<size_t>(MAXWELL3D_REG_INDEX(inline_data)),
493 regs.transform_feedback.controls[0].stride, true);
494 }
127}; 495};
128 496
129} // Anonymous namespace 497} // Anonymous namespace
130 498
131HLEMacro::HLEMacro(Engines::Maxwell3D& maxwell3d_) : maxwell3d{maxwell3d_} {} 499HLEMacro::HLEMacro(Maxwell3D& maxwell3d_) : maxwell3d{maxwell3d_} {
500 builders.emplace(0xDD6A7FA92A7D2674ULL,
501 std::function<std::unique_ptr<CachedMacro>(Maxwell3D&)>(
502 [](Maxwell3D& maxwell3d__) -> std::unique_ptr<CachedMacro> {
503 return std::make_unique<HLE_DrawArrays>(maxwell3d__);
504 }));
505 builders.emplace(0x0D61FC9FAAC9FCADULL,
506 std::function<std::unique_ptr<CachedMacro>(Maxwell3D&)>(
507 [](Maxwell3D& maxwell3d__) -> std::unique_ptr<CachedMacro> {
508 return std::make_unique<HLE_DrawArraysIndirect<false>>(maxwell3d__);
509 }));
510 builders.emplace(0x8A4D173EB99A8603ULL,
511 std::function<std::unique_ptr<CachedMacro>(Maxwell3D&)>(
512 [](Maxwell3D& maxwell3d__) -> std::unique_ptr<CachedMacro> {
513 return std::make_unique<HLE_DrawArraysIndirect<true>>(maxwell3d__);
514 }));
515 builders.emplace(0x2DB33AADB741839CULL,
516 std::function<std::unique_ptr<CachedMacro>(Maxwell3D&)>(
517 [](Maxwell3D& maxwell3d__) -> std::unique_ptr<CachedMacro> {
518 return std::make_unique<HLE_DrawIndexed>(maxwell3d__);
519 }));
520 builders.emplace(0x771BB18C62444DA0ULL,
521 std::function<std::unique_ptr<CachedMacro>(Maxwell3D&)>(
522 [](Maxwell3D& maxwell3d__) -> std::unique_ptr<CachedMacro> {
523 return std::make_unique<HLE_DrawIndexedIndirect<false>>(maxwell3d__);
524 }));
525 builders.emplace(0x0217920100488FF7ULL,
526 std::function<std::unique_ptr<CachedMacro>(Maxwell3D&)>(
527 [](Maxwell3D& maxwell3d__) -> std::unique_ptr<CachedMacro> {
528 return std::make_unique<HLE_DrawIndexedIndirect<true>>(maxwell3d__);
529 }));
530 builders.emplace(0x3F5E74B9C9A50164ULL,
531 std::function<std::unique_ptr<CachedMacro>(Maxwell3D&)>(
532 [](Maxwell3D& maxwell3d__) -> std::unique_ptr<CachedMacro> {
533 return std::make_unique<HLE_MultiDrawIndexedIndirectCount>(
534 maxwell3d__);
535 }));
536 builders.emplace(0xEAD26C3E2109B06BULL,
537 std::function<std::unique_ptr<CachedMacro>(Maxwell3D&)>(
538 [](Maxwell3D& maxwell3d__) -> std::unique_ptr<CachedMacro> {
539 return std::make_unique<HLE_MultiLayerClear>(maxwell3d__);
540 }));
541 builders.emplace(0xC713C83D8F63CCF3ULL,
542 std::function<std::unique_ptr<CachedMacro>(Maxwell3D&)>(
543 [](Maxwell3D& maxwell3d__) -> std::unique_ptr<CachedMacro> {
544 return std::make_unique<HLE_C713C83D8F63CCF3>(maxwell3d__);
545 }));
546 builders.emplace(0xD7333D26E0A93EDEULL,
547 std::function<std::unique_ptr<CachedMacro>(Maxwell3D&)>(
548 [](Maxwell3D& maxwell3d__) -> std::unique_ptr<CachedMacro> {
549 return std::make_unique<HLE_D7333D26E0A93EDE>(maxwell3d__);
550 }));
551 builders.emplace(0xEB29B2A09AA06D38ULL,
552 std::function<std::unique_ptr<CachedMacro>(Maxwell3D&)>(
553 [](Maxwell3D& maxwell3d__) -> std::unique_ptr<CachedMacro> {
554 return std::make_unique<HLE_BindShader>(maxwell3d__);
555 }));
556 builders.emplace(0xDB1341DBEB4C8AF7ULL,
557 std::function<std::unique_ptr<CachedMacro>(Maxwell3D&)>(
558 [](Maxwell3D& maxwell3d__) -> std::unique_ptr<CachedMacro> {
559 return std::make_unique<HLE_SetRasterBoundingBox>(maxwell3d__);
560 }));
561 builders.emplace(0x6C97861D891EDf7EULL,
562 std::function<std::unique_ptr<CachedMacro>(Maxwell3D&)>(
563 [](Maxwell3D& maxwell3d__) -> std::unique_ptr<CachedMacro> {
564 return std::make_unique<HLE_ClearConstBuffer<0x5F00>>(maxwell3d__);
565 }));
566 builders.emplace(0xD246FDDF3A6173D7ULL,
567 std::function<std::unique_ptr<CachedMacro>(Maxwell3D&)>(
568 [](Maxwell3D& maxwell3d__) -> std::unique_ptr<CachedMacro> {
569 return std::make_unique<HLE_ClearConstBuffer<0x7000>>(maxwell3d__);
570 }));
571 builders.emplace(0xEE4D0004BEC8ECF4ULL,
572 std::function<std::unique_ptr<CachedMacro>(Maxwell3D&)>(
573 [](Maxwell3D& maxwell3d__) -> std::unique_ptr<CachedMacro> {
574 return std::make_unique<HLE_ClearMemory>(maxwell3d__);
575 }));
576 builders.emplace(0xFC0CF27F5FFAA661ULL,
577 std::function<std::unique_ptr<CachedMacro>(Maxwell3D&)>(
578 [](Maxwell3D& maxwell3d__) -> std::unique_ptr<CachedMacro> {
579 return std::make_unique<HLE_TransformFeedbackSetup>(maxwell3d__);
580 }));
581}
582
132HLEMacro::~HLEMacro() = default; 583HLEMacro::~HLEMacro() = default;
133 584
134std::unique_ptr<CachedMacro> HLEMacro::GetHLEProgram(u64 hash) const { 585std::unique_ptr<CachedMacro> HLEMacro::GetHLEProgram(u64 hash) const {
135 const auto it = std::find_if(hle_funcs.cbegin(), hle_funcs.cend(), 586 const auto it = builders.find(hash);
136 [hash](const auto& pair) { return pair.first == hash; }); 587 if (it == builders.end()) {
137 if (it == hle_funcs.end()) {
138 return nullptr; 588 return nullptr;
139 } 589 }
140 return std::make_unique<HLEMacroImpl>(maxwell3d, it->second); 590 return it->second(maxwell3d);
141} 591}
142 592
143} // namespace Tegra 593} // namespace Tegra
diff --git a/src/video_core/macro/macro_hle.h b/src/video_core/macro/macro_hle.h
index 625332c9d..33f92fab1 100644
--- a/src/video_core/macro/macro_hle.h
+++ b/src/video_core/macro/macro_hle.h
@@ -3,7 +3,10 @@
3 3
4#pragma once 4#pragma once
5 5
6#include <functional>
6#include <memory> 7#include <memory>
8#include <unordered_map>
9
7#include "common/common_types.h" 10#include "common/common_types.h"
8 11
9namespace Tegra { 12namespace Tegra {
@@ -23,6 +26,8 @@ public:
23 26
24private: 27private:
25 Engines::Maxwell3D& maxwell3d; 28 Engines::Maxwell3D& maxwell3d;
29 std::unordered_map<u64, std::function<std::unique_ptr<CachedMacro>(Engines::Maxwell3D&)>>
30 builders;
26}; 31};
27 32
28} // namespace Tegra 33} // namespace Tegra
diff --git a/src/video_core/memory_manager.cpp b/src/video_core/memory_manager.cpp
index 8c8dfcca6..3a5cdeb39 100644
--- a/src/video_core/memory_manager.cpp
+++ b/src/video_core/memory_manager.cpp
@@ -25,7 +25,8 @@ MemoryManager::MemoryManager(Core::System& system_, u64 address_space_bits_, u64
25 address_space_bits{address_space_bits_}, page_bits{page_bits_}, big_page_bits{big_page_bits_}, 25 address_space_bits{address_space_bits_}, page_bits{page_bits_}, big_page_bits{big_page_bits_},
26 entries{}, big_entries{}, page_table{address_space_bits, address_space_bits + page_bits - 38, 26 entries{}, big_entries{}, page_table{address_space_bits, address_space_bits + page_bits - 38,
27 page_bits != big_page_bits ? page_bits : 0}, 27 page_bits != big_page_bits ? page_bits : 0},
28 unique_identifier{unique_identifier_generator.fetch_add(1, std::memory_order_acq_rel)} { 28 kind_map{PTEKind::INVALID}, unique_identifier{unique_identifier_generator.fetch_add(
29 1, std::memory_order_acq_rel)} {
29 address_space_size = 1ULL << address_space_bits; 30 address_space_size = 1ULL << address_space_bits;
30 page_size = 1ULL << page_bits; 31 page_size = 1ULL << page_bits;
31 page_mask = page_size - 1ULL; 32 page_mask = page_size - 1ULL;
@@ -41,11 +42,7 @@ MemoryManager::MemoryManager(Core::System& system_, u64 address_space_bits_, u64
41 big_entries.resize(big_page_table_size / 32, 0); 42 big_entries.resize(big_page_table_size / 32, 0);
42 big_page_table_cpu.resize(big_page_table_size); 43 big_page_table_cpu.resize(big_page_table_size);
43 big_page_continous.resize(big_page_table_size / continous_bits, 0); 44 big_page_continous.resize(big_page_table_size / continous_bits, 0);
44 std::array<PTEKind, 32> kind_valus;
45 kind_valus.fill(PTEKind::INVALID);
46 big_kinds.resize(big_page_table_size / 32, kind_valus);
47 entries.resize(page_table_size / 32, 0); 45 entries.resize(page_table_size / 32, 0);
48 kinds.resize(page_table_size / 32, kind_valus);
49} 46}
50 47
51MemoryManager::~MemoryManager() = default; 48MemoryManager::~MemoryManager() = default;
@@ -83,38 +80,7 @@ void MemoryManager::SetEntry(size_t position, MemoryManager::EntryType entry) {
83} 80}
84 81
85PTEKind MemoryManager::GetPageKind(GPUVAddr gpu_addr) const { 82PTEKind MemoryManager::GetPageKind(GPUVAddr gpu_addr) const {
86 auto entry = GetEntry<true>(gpu_addr); 83 return kind_map.GetValueAt(gpu_addr);
87 if (entry == EntryType::Mapped || entry == EntryType::Reserved) [[likely]] {
88 return GetKind<true>(gpu_addr);
89 } else {
90 return GetKind<false>(gpu_addr);
91 }
92}
93
94template <bool is_big_page>
95PTEKind MemoryManager::GetKind(size_t position) const {
96 if constexpr (is_big_page) {
97 position = position >> big_page_bits;
98 const size_t sub_index = position % 32;
99 return big_kinds[position / 32][sub_index];
100 } else {
101 position = position >> page_bits;
102 const size_t sub_index = position % 32;
103 return kinds[position / 32][sub_index];
104 }
105}
106
107template <bool is_big_page>
108void MemoryManager::SetKind(size_t position, PTEKind kind) {
109 if constexpr (is_big_page) {
110 position = position >> big_page_bits;
111 const size_t sub_index = position % 32;
112 big_kinds[position / 32][sub_index] = kind;
113 } else {
114 position = position >> page_bits;
115 const size_t sub_index = position % 32;
116 kinds[position / 32][sub_index] = kind;
117 }
118} 84}
119 85
120inline bool MemoryManager::IsBigPageContinous(size_t big_page_index) const { 86inline bool MemoryManager::IsBigPageContinous(size_t big_page_index) const {
@@ -141,7 +107,6 @@ GPUVAddr MemoryManager::PageTableOp(GPUVAddr gpu_addr, [[maybe_unused]] VAddr cp
141 const GPUVAddr current_gpu_addr = gpu_addr + offset; 107 const GPUVAddr current_gpu_addr = gpu_addr + offset;
142 [[maybe_unused]] const auto current_entry_type = GetEntry<false>(current_gpu_addr); 108 [[maybe_unused]] const auto current_entry_type = GetEntry<false>(current_gpu_addr);
143 SetEntry<false>(current_gpu_addr, entry_type); 109 SetEntry<false>(current_gpu_addr, entry_type);
144 SetKind<false>(current_gpu_addr, kind);
145 if (current_entry_type != entry_type) { 110 if (current_entry_type != entry_type) {
146 rasterizer->ModifyGPUMemory(unique_identifier, gpu_addr, page_size); 111 rasterizer->ModifyGPUMemory(unique_identifier, gpu_addr, page_size);
147 } 112 }
@@ -153,6 +118,7 @@ GPUVAddr MemoryManager::PageTableOp(GPUVAddr gpu_addr, [[maybe_unused]] VAddr cp
153 } 118 }
154 remaining_size -= page_size; 119 remaining_size -= page_size;
155 } 120 }
121 kind_map.Map(gpu_addr, gpu_addr + size, kind);
156 return gpu_addr; 122 return gpu_addr;
157} 123}
158 124
@@ -164,7 +130,6 @@ GPUVAddr MemoryManager::BigPageTableOp(GPUVAddr gpu_addr, [[maybe_unused]] VAddr
164 const GPUVAddr current_gpu_addr = gpu_addr + offset; 130 const GPUVAddr current_gpu_addr = gpu_addr + offset;
165 [[maybe_unused]] const auto current_entry_type = GetEntry<true>(current_gpu_addr); 131 [[maybe_unused]] const auto current_entry_type = GetEntry<true>(current_gpu_addr);
166 SetEntry<true>(current_gpu_addr, entry_type); 132 SetEntry<true>(current_gpu_addr, entry_type);
167 SetKind<true>(current_gpu_addr, kind);
168 if (current_entry_type != entry_type) { 133 if (current_entry_type != entry_type) {
169 rasterizer->ModifyGPUMemory(unique_identifier, gpu_addr, big_page_size); 134 rasterizer->ModifyGPUMemory(unique_identifier, gpu_addr, big_page_size);
170 } 135 }
@@ -193,6 +158,7 @@ GPUVAddr MemoryManager::BigPageTableOp(GPUVAddr gpu_addr, [[maybe_unused]] VAddr
193 } 158 }
194 remaining_size -= big_page_size; 159 remaining_size -= big_page_size;
195 } 160 }
161 kind_map.Map(gpu_addr, gpu_addr + size, kind);
196 return gpu_addr; 162 return gpu_addr;
197} 163}
198 164
@@ -325,9 +291,15 @@ template <bool is_big_pages, typename FuncMapped, typename FuncReserved, typenam
325inline void MemoryManager::MemoryOperation(GPUVAddr gpu_src_addr, std::size_t size, 291inline void MemoryManager::MemoryOperation(GPUVAddr gpu_src_addr, std::size_t size,
326 FuncMapped&& func_mapped, FuncReserved&& func_reserved, 292 FuncMapped&& func_mapped, FuncReserved&& func_reserved,
327 FuncUnmapped&& func_unmapped) const { 293 FuncUnmapped&& func_unmapped) const {
328 static constexpr bool BOOL_BREAK_MAPPED = std::is_same_v<FuncMapped, bool>; 294 using FuncMappedReturn =
329 static constexpr bool BOOL_BREAK_RESERVED = std::is_same_v<FuncReserved, bool>; 295 typename std::invoke_result<FuncMapped, std::size_t, std::size_t, std::size_t>::type;
330 static constexpr bool BOOL_BREAK_UNMAPPED = std::is_same_v<FuncUnmapped, bool>; 296 using FuncReservedReturn =
297 typename std::invoke_result<FuncReserved, std::size_t, std::size_t, std::size_t>::type;
298 using FuncUnmappedReturn =
299 typename std::invoke_result<FuncUnmapped, std::size_t, std::size_t, std::size_t>::type;
300 static constexpr bool BOOL_BREAK_MAPPED = std::is_same_v<FuncMappedReturn, bool>;
301 static constexpr bool BOOL_BREAK_RESERVED = std::is_same_v<FuncReservedReturn, bool>;
302 static constexpr bool BOOL_BREAK_UNMAPPED = std::is_same_v<FuncUnmappedReturn, bool>;
331 u64 used_page_size; 303 u64 used_page_size;
332 u64 used_page_mask; 304 u64 used_page_mask;
333 u64 used_page_bits; 305 u64 used_page_bits;
@@ -384,8 +356,8 @@ inline void MemoryManager::MemoryOperation(GPUVAddr gpu_src_addr, std::size_t si
384} 356}
385 357
386template <bool is_safe> 358template <bool is_safe>
387void MemoryManager::ReadBlockImpl(GPUVAddr gpu_src_addr, void* dest_buffer, 359void MemoryManager::ReadBlockImpl(GPUVAddr gpu_src_addr, void* dest_buffer, std::size_t size,
388 std::size_t size) const { 360 [[maybe_unused]] VideoCommon::CacheType which) const {
389 auto set_to_zero = [&]([[maybe_unused]] std::size_t page_index, 361 auto set_to_zero = [&]([[maybe_unused]] std::size_t page_index,
390 [[maybe_unused]] std::size_t offset, std::size_t copy_amount) { 362 [[maybe_unused]] std::size_t offset, std::size_t copy_amount) {
391 std::memset(dest_buffer, 0, copy_amount); 363 std::memset(dest_buffer, 0, copy_amount);
@@ -395,7 +367,7 @@ void MemoryManager::ReadBlockImpl(GPUVAddr gpu_src_addr, void* dest_buffer,
395 const VAddr cpu_addr_base = 367 const VAddr cpu_addr_base =
396 (static_cast<VAddr>(page_table[page_index]) << cpu_page_bits) + offset; 368 (static_cast<VAddr>(page_table[page_index]) << cpu_page_bits) + offset;
397 if constexpr (is_safe) { 369 if constexpr (is_safe) {
398 rasterizer->FlushRegion(cpu_addr_base, copy_amount); 370 rasterizer->FlushRegion(cpu_addr_base, copy_amount, which);
399 } 371 }
400 u8* physical = memory.GetPointer(cpu_addr_base); 372 u8* physical = memory.GetPointer(cpu_addr_base);
401 std::memcpy(dest_buffer, physical, copy_amount); 373 std::memcpy(dest_buffer, physical, copy_amount);
@@ -405,7 +377,7 @@ void MemoryManager::ReadBlockImpl(GPUVAddr gpu_src_addr, void* dest_buffer,
405 const VAddr cpu_addr_base = 377 const VAddr cpu_addr_base =
406 (static_cast<VAddr>(big_page_table_cpu[page_index]) << cpu_page_bits) + offset; 378 (static_cast<VAddr>(big_page_table_cpu[page_index]) << cpu_page_bits) + offset;
407 if constexpr (is_safe) { 379 if constexpr (is_safe) {
408 rasterizer->FlushRegion(cpu_addr_base, copy_amount); 380 rasterizer->FlushRegion(cpu_addr_base, copy_amount, which);
409 } 381 }
410 if (!IsBigPageContinous(page_index)) [[unlikely]] { 382 if (!IsBigPageContinous(page_index)) [[unlikely]] {
411 memory.ReadBlockUnsafe(cpu_addr_base, dest_buffer, copy_amount); 383 memory.ReadBlockUnsafe(cpu_addr_base, dest_buffer, copy_amount);
@@ -423,18 +395,19 @@ void MemoryManager::ReadBlockImpl(GPUVAddr gpu_src_addr, void* dest_buffer,
423 MemoryOperation<true>(gpu_src_addr, size, mapped_big, set_to_zero, read_short_pages); 395 MemoryOperation<true>(gpu_src_addr, size, mapped_big, set_to_zero, read_short_pages);
424} 396}
425 397
426void MemoryManager::ReadBlock(GPUVAddr gpu_src_addr, void* dest_buffer, std::size_t size) const { 398void MemoryManager::ReadBlock(GPUVAddr gpu_src_addr, void* dest_buffer, std::size_t size,
427 ReadBlockImpl<true>(gpu_src_addr, dest_buffer, size); 399 VideoCommon::CacheType which) const {
400 ReadBlockImpl<true>(gpu_src_addr, dest_buffer, size, which);
428} 401}
429 402
430void MemoryManager::ReadBlockUnsafe(GPUVAddr gpu_src_addr, void* dest_buffer, 403void MemoryManager::ReadBlockUnsafe(GPUVAddr gpu_src_addr, void* dest_buffer,
431 const std::size_t size) const { 404 const std::size_t size) const {
432 ReadBlockImpl<false>(gpu_src_addr, dest_buffer, size); 405 ReadBlockImpl<false>(gpu_src_addr, dest_buffer, size, VideoCommon::CacheType::None);
433} 406}
434 407
435template <bool is_safe> 408template <bool is_safe>
436void MemoryManager::WriteBlockImpl(GPUVAddr gpu_dest_addr, const void* src_buffer, 409void MemoryManager::WriteBlockImpl(GPUVAddr gpu_dest_addr, const void* src_buffer, std::size_t size,
437 std::size_t size) { 410 [[maybe_unused]] VideoCommon::CacheType which) {
438 auto just_advance = [&]([[maybe_unused]] std::size_t page_index, 411 auto just_advance = [&]([[maybe_unused]] std::size_t page_index,
439 [[maybe_unused]] std::size_t offset, std::size_t copy_amount) { 412 [[maybe_unused]] std::size_t offset, std::size_t copy_amount) {
440 src_buffer = static_cast<const u8*>(src_buffer) + copy_amount; 413 src_buffer = static_cast<const u8*>(src_buffer) + copy_amount;
@@ -443,7 +416,7 @@ void MemoryManager::WriteBlockImpl(GPUVAddr gpu_dest_addr, const void* src_buffe
443 const VAddr cpu_addr_base = 416 const VAddr cpu_addr_base =
444 (static_cast<VAddr>(page_table[page_index]) << cpu_page_bits) + offset; 417 (static_cast<VAddr>(page_table[page_index]) << cpu_page_bits) + offset;
445 if constexpr (is_safe) { 418 if constexpr (is_safe) {
446 rasterizer->InvalidateRegion(cpu_addr_base, copy_amount); 419 rasterizer->InvalidateRegion(cpu_addr_base, copy_amount, which);
447 } 420 }
448 u8* physical = memory.GetPointer(cpu_addr_base); 421 u8* physical = memory.GetPointer(cpu_addr_base);
449 std::memcpy(physical, src_buffer, copy_amount); 422 std::memcpy(physical, src_buffer, copy_amount);
@@ -453,7 +426,7 @@ void MemoryManager::WriteBlockImpl(GPUVAddr gpu_dest_addr, const void* src_buffe
453 const VAddr cpu_addr_base = 426 const VAddr cpu_addr_base =
454 (static_cast<VAddr>(big_page_table_cpu[page_index]) << cpu_page_bits) + offset; 427 (static_cast<VAddr>(big_page_table_cpu[page_index]) << cpu_page_bits) + offset;
455 if constexpr (is_safe) { 428 if constexpr (is_safe) {
456 rasterizer->InvalidateRegion(cpu_addr_base, copy_amount); 429 rasterizer->InvalidateRegion(cpu_addr_base, copy_amount, which);
457 } 430 }
458 if (!IsBigPageContinous(page_index)) [[unlikely]] { 431 if (!IsBigPageContinous(page_index)) [[unlikely]] {
459 memory.WriteBlockUnsafe(cpu_addr_base, src_buffer, copy_amount); 432 memory.WriteBlockUnsafe(cpu_addr_base, src_buffer, copy_amount);
@@ -471,16 +444,18 @@ void MemoryManager::WriteBlockImpl(GPUVAddr gpu_dest_addr, const void* src_buffe
471 MemoryOperation<true>(gpu_dest_addr, size, mapped_big, just_advance, write_short_pages); 444 MemoryOperation<true>(gpu_dest_addr, size, mapped_big, just_advance, write_short_pages);
472} 445}
473 446
474void MemoryManager::WriteBlock(GPUVAddr gpu_dest_addr, const void* src_buffer, std::size_t size) { 447void MemoryManager::WriteBlock(GPUVAddr gpu_dest_addr, const void* src_buffer, std::size_t size,
475 WriteBlockImpl<true>(gpu_dest_addr, src_buffer, size); 448 VideoCommon::CacheType which) {
449 WriteBlockImpl<true>(gpu_dest_addr, src_buffer, size, which);
476} 450}
477 451
478void MemoryManager::WriteBlockUnsafe(GPUVAddr gpu_dest_addr, const void* src_buffer, 452void MemoryManager::WriteBlockUnsafe(GPUVAddr gpu_dest_addr, const void* src_buffer,
479 std::size_t size) { 453 std::size_t size) {
480 WriteBlockImpl<false>(gpu_dest_addr, src_buffer, size); 454 WriteBlockImpl<false>(gpu_dest_addr, src_buffer, size, VideoCommon::CacheType::None);
481} 455}
482 456
483void MemoryManager::FlushRegion(GPUVAddr gpu_addr, size_t size) const { 457void MemoryManager::FlushRegion(GPUVAddr gpu_addr, size_t size,
458 VideoCommon::CacheType which) const {
484 auto do_nothing = [&]([[maybe_unused]] std::size_t page_index, 459 auto do_nothing = [&]([[maybe_unused]] std::size_t page_index,
485 [[maybe_unused]] std::size_t offset, 460 [[maybe_unused]] std::size_t offset,
486 [[maybe_unused]] std::size_t copy_amount) {}; 461 [[maybe_unused]] std::size_t copy_amount) {};
@@ -488,12 +463,12 @@ void MemoryManager::FlushRegion(GPUVAddr gpu_addr, size_t size) const {
488 auto mapped_normal = [&](std::size_t page_index, std::size_t offset, std::size_t copy_amount) { 463 auto mapped_normal = [&](std::size_t page_index, std::size_t offset, std::size_t copy_amount) {
489 const VAddr cpu_addr_base = 464 const VAddr cpu_addr_base =
490 (static_cast<VAddr>(page_table[page_index]) << cpu_page_bits) + offset; 465 (static_cast<VAddr>(page_table[page_index]) << cpu_page_bits) + offset;
491 rasterizer->FlushRegion(cpu_addr_base, copy_amount); 466 rasterizer->FlushRegion(cpu_addr_base, copy_amount, which);
492 }; 467 };
493 auto mapped_big = [&](std::size_t page_index, std::size_t offset, std::size_t copy_amount) { 468 auto mapped_big = [&](std::size_t page_index, std::size_t offset, std::size_t copy_amount) {
494 const VAddr cpu_addr_base = 469 const VAddr cpu_addr_base =
495 (static_cast<VAddr>(big_page_table_cpu[page_index]) << cpu_page_bits) + offset; 470 (static_cast<VAddr>(big_page_table_cpu[page_index]) << cpu_page_bits) + offset;
496 rasterizer->FlushRegion(cpu_addr_base, copy_amount); 471 rasterizer->FlushRegion(cpu_addr_base, copy_amount, which);
497 }; 472 };
498 auto flush_short_pages = [&](std::size_t page_index, std::size_t offset, 473 auto flush_short_pages = [&](std::size_t page_index, std::size_t offset,
499 std::size_t copy_amount) { 474 std::size_t copy_amount) {
@@ -503,7 +478,8 @@ void MemoryManager::FlushRegion(GPUVAddr gpu_addr, size_t size) const {
503 MemoryOperation<true>(gpu_addr, size, mapped_big, do_nothing, flush_short_pages); 478 MemoryOperation<true>(gpu_addr, size, mapped_big, do_nothing, flush_short_pages);
504} 479}
505 480
506bool MemoryManager::IsMemoryDirty(GPUVAddr gpu_addr, size_t size) const { 481bool MemoryManager::IsMemoryDirty(GPUVAddr gpu_addr, size_t size,
482 VideoCommon::CacheType which) const {
507 bool result = false; 483 bool result = false;
508 auto do_nothing = [&]([[maybe_unused]] std::size_t page_index, 484 auto do_nothing = [&]([[maybe_unused]] std::size_t page_index,
509 [[maybe_unused]] std::size_t offset, 485 [[maybe_unused]] std::size_t offset,
@@ -512,13 +488,13 @@ bool MemoryManager::IsMemoryDirty(GPUVAddr gpu_addr, size_t size) const {
512 auto mapped_normal = [&](std::size_t page_index, std::size_t offset, std::size_t copy_amount) { 488 auto mapped_normal = [&](std::size_t page_index, std::size_t offset, std::size_t copy_amount) {
513 const VAddr cpu_addr_base = 489 const VAddr cpu_addr_base =
514 (static_cast<VAddr>(page_table[page_index]) << cpu_page_bits) + offset; 490 (static_cast<VAddr>(page_table[page_index]) << cpu_page_bits) + offset;
515 result |= rasterizer->MustFlushRegion(cpu_addr_base, copy_amount); 491 result |= rasterizer->MustFlushRegion(cpu_addr_base, copy_amount, which);
516 return result; 492 return result;
517 }; 493 };
518 auto mapped_big = [&](std::size_t page_index, std::size_t offset, std::size_t copy_amount) { 494 auto mapped_big = [&](std::size_t page_index, std::size_t offset, std::size_t copy_amount) {
519 const VAddr cpu_addr_base = 495 const VAddr cpu_addr_base =
520 (static_cast<VAddr>(big_page_table_cpu[page_index]) << cpu_page_bits) + offset; 496 (static_cast<VAddr>(big_page_table_cpu[page_index]) << cpu_page_bits) + offset;
521 result |= rasterizer->MustFlushRegion(cpu_addr_base, copy_amount); 497 result |= rasterizer->MustFlushRegion(cpu_addr_base, copy_amount, which);
522 return result; 498 return result;
523 }; 499 };
524 auto check_short_pages = [&](std::size_t page_index, std::size_t offset, 500 auto check_short_pages = [&](std::size_t page_index, std::size_t offset,
@@ -571,7 +547,12 @@ size_t MemoryManager::MaxContinousRange(GPUVAddr gpu_addr, size_t size) const {
571 return range_so_far; 547 return range_so_far;
572} 548}
573 549
574void MemoryManager::InvalidateRegion(GPUVAddr gpu_addr, size_t size) const { 550size_t MemoryManager::GetMemoryLayoutSize(GPUVAddr gpu_addr, size_t max_size) const {
551 return kind_map.GetContinousSizeFrom(gpu_addr);
552}
553
554void MemoryManager::InvalidateRegion(GPUVAddr gpu_addr, size_t size,
555 VideoCommon::CacheType which) const {
575 auto do_nothing = [&]([[maybe_unused]] std::size_t page_index, 556 auto do_nothing = [&]([[maybe_unused]] std::size_t page_index,
576 [[maybe_unused]] std::size_t offset, 557 [[maybe_unused]] std::size_t offset,
577 [[maybe_unused]] std::size_t copy_amount) {}; 558 [[maybe_unused]] std::size_t copy_amount) {};
@@ -579,12 +560,12 @@ void MemoryManager::InvalidateRegion(GPUVAddr gpu_addr, size_t size) const {
579 auto mapped_normal = [&](std::size_t page_index, std::size_t offset, std::size_t copy_amount) { 560 auto mapped_normal = [&](std::size_t page_index, std::size_t offset, std::size_t copy_amount) {
580 const VAddr cpu_addr_base = 561 const VAddr cpu_addr_base =
581 (static_cast<VAddr>(page_table[page_index]) << cpu_page_bits) + offset; 562 (static_cast<VAddr>(page_table[page_index]) << cpu_page_bits) + offset;
582 rasterizer->InvalidateRegion(cpu_addr_base, copy_amount); 563 rasterizer->InvalidateRegion(cpu_addr_base, copy_amount, which);
583 }; 564 };
584 auto mapped_big = [&](std::size_t page_index, std::size_t offset, std::size_t copy_amount) { 565 auto mapped_big = [&](std::size_t page_index, std::size_t offset, std::size_t copy_amount) {
585 const VAddr cpu_addr_base = 566 const VAddr cpu_addr_base =
586 (static_cast<VAddr>(big_page_table_cpu[page_index]) << cpu_page_bits) + offset; 567 (static_cast<VAddr>(big_page_table_cpu[page_index]) << cpu_page_bits) + offset;
587 rasterizer->InvalidateRegion(cpu_addr_base, copy_amount); 568 rasterizer->InvalidateRegion(cpu_addr_base, copy_amount, which);
588 }; 569 };
589 auto invalidate_short_pages = [&](std::size_t page_index, std::size_t offset, 570 auto invalidate_short_pages = [&](std::size_t page_index, std::size_t offset,
590 std::size_t copy_amount) { 571 std::size_t copy_amount) {
@@ -594,14 +575,15 @@ void MemoryManager::InvalidateRegion(GPUVAddr gpu_addr, size_t size) const {
594 MemoryOperation<true>(gpu_addr, size, mapped_big, do_nothing, invalidate_short_pages); 575 MemoryOperation<true>(gpu_addr, size, mapped_big, do_nothing, invalidate_short_pages);
595} 576}
596 577
597void MemoryManager::CopyBlock(GPUVAddr gpu_dest_addr, GPUVAddr gpu_src_addr, std::size_t size) { 578void MemoryManager::CopyBlock(GPUVAddr gpu_dest_addr, GPUVAddr gpu_src_addr, std::size_t size,
579 VideoCommon::CacheType which) {
598 std::vector<u8> tmp_buffer(size); 580 std::vector<u8> tmp_buffer(size);
599 ReadBlock(gpu_src_addr, tmp_buffer.data(), size); 581 ReadBlock(gpu_src_addr, tmp_buffer.data(), size, which);
600 582
601 // The output block must be flushed in case it has data modified from the GPU. 583 // The output block must be flushed in case it has data modified from the GPU.
602 // Fixes NPC geometry in Zombie Panic in Wonderland DX 584 // Fixes NPC geometry in Zombie Panic in Wonderland DX
603 FlushRegion(gpu_dest_addr, size); 585 FlushRegion(gpu_dest_addr, size, which);
604 WriteBlock(gpu_dest_addr, tmp_buffer.data(), size); 586 WriteBlock(gpu_dest_addr, tmp_buffer.data(), size, which);
605} 587}
606 588
607bool MemoryManager::IsGranularRange(GPUVAddr gpu_addr, std::size_t size) const { 589bool MemoryManager::IsGranularRange(GPUVAddr gpu_addr, std::size_t size) const {
diff --git a/src/video_core/memory_manager.h b/src/video_core/memory_manager.h
index ab4bc9ec6..828e13439 100644
--- a/src/video_core/memory_manager.h
+++ b/src/video_core/memory_manager.h
@@ -10,7 +10,9 @@
10 10
11#include "common/common_types.h" 11#include "common/common_types.h"
12#include "common/multi_level_page_table.h" 12#include "common/multi_level_page_table.h"
13#include "common/range_map.h"
13#include "common/virtual_buffer.h" 14#include "common/virtual_buffer.h"
15#include "video_core/cache_types.h"
14#include "video_core/pte_kind.h" 16#include "video_core/pte_kind.h"
15 17
16namespace VideoCore { 18namespace VideoCore {
@@ -59,9 +61,12 @@ public:
59 * in the Host Memory counterpart. Note: This functions cause Host GPU Memory 61 * in the Host Memory counterpart. Note: This functions cause Host GPU Memory
60 * Flushes and Invalidations, respectively to each operation. 62 * Flushes and Invalidations, respectively to each operation.
61 */ 63 */
62 void ReadBlock(GPUVAddr gpu_src_addr, void* dest_buffer, std::size_t size) const; 64 void ReadBlock(GPUVAddr gpu_src_addr, void* dest_buffer, std::size_t size,
63 void WriteBlock(GPUVAddr gpu_dest_addr, const void* src_buffer, std::size_t size); 65 VideoCommon::CacheType which = VideoCommon::CacheType::All) const;
64 void CopyBlock(GPUVAddr gpu_dest_addr, GPUVAddr gpu_src_addr, std::size_t size); 66 void WriteBlock(GPUVAddr gpu_dest_addr, const void* src_buffer, std::size_t size,
67 VideoCommon::CacheType which = VideoCommon::CacheType::All);
68 void CopyBlock(GPUVAddr gpu_dest_addr, GPUVAddr gpu_src_addr, std::size_t size,
69 VideoCommon::CacheType which = VideoCommon::CacheType::All);
65 70
66 /** 71 /**
67 * ReadBlockUnsafe and WriteBlockUnsafe are special versions of ReadBlock and 72 * ReadBlockUnsafe and WriteBlockUnsafe are special versions of ReadBlock and
@@ -104,11 +109,14 @@ public:
104 GPUVAddr MapSparse(GPUVAddr gpu_addr, std::size_t size, bool is_big_pages = true); 109 GPUVAddr MapSparse(GPUVAddr gpu_addr, std::size_t size, bool is_big_pages = true);
105 void Unmap(GPUVAddr gpu_addr, std::size_t size); 110 void Unmap(GPUVAddr gpu_addr, std::size_t size);
106 111
107 void FlushRegion(GPUVAddr gpu_addr, size_t size) const; 112 void FlushRegion(GPUVAddr gpu_addr, size_t size,
113 VideoCommon::CacheType which = VideoCommon::CacheType::All) const;
108 114
109 void InvalidateRegion(GPUVAddr gpu_addr, size_t size) const; 115 void InvalidateRegion(GPUVAddr gpu_addr, size_t size,
116 VideoCommon::CacheType which = VideoCommon::CacheType::All) const;
110 117
111 bool IsMemoryDirty(GPUVAddr gpu_addr, size_t size) const; 118 bool IsMemoryDirty(GPUVAddr gpu_addr, size_t size,
119 VideoCommon::CacheType which = VideoCommon::CacheType::All) const;
112 120
113 size_t MaxContinousRange(GPUVAddr gpu_addr, size_t size) const; 121 size_t MaxContinousRange(GPUVAddr gpu_addr, size_t size) const;
114 122
@@ -118,16 +126,21 @@ public:
118 126
119 PTEKind GetPageKind(GPUVAddr gpu_addr) const; 127 PTEKind GetPageKind(GPUVAddr gpu_addr) const;
120 128
129 size_t GetMemoryLayoutSize(GPUVAddr gpu_addr,
130 size_t max_size = std::numeric_limits<size_t>::max()) const;
131
121private: 132private:
122 template <bool is_big_pages, typename FuncMapped, typename FuncReserved, typename FuncUnmapped> 133 template <bool is_big_pages, typename FuncMapped, typename FuncReserved, typename FuncUnmapped>
123 inline void MemoryOperation(GPUVAddr gpu_src_addr, std::size_t size, FuncMapped&& func_mapped, 134 inline void MemoryOperation(GPUVAddr gpu_src_addr, std::size_t size, FuncMapped&& func_mapped,
124 FuncReserved&& func_reserved, FuncUnmapped&& func_unmapped) const; 135 FuncReserved&& func_reserved, FuncUnmapped&& func_unmapped) const;
125 136
126 template <bool is_safe> 137 template <bool is_safe>
127 void ReadBlockImpl(GPUVAddr gpu_src_addr, void* dest_buffer, std::size_t size) const; 138 void ReadBlockImpl(GPUVAddr gpu_src_addr, void* dest_buffer, std::size_t size,
139 VideoCommon::CacheType which) const;
128 140
129 template <bool is_safe> 141 template <bool is_safe>
130 void WriteBlockImpl(GPUVAddr gpu_dest_addr, const void* src_buffer, std::size_t size); 142 void WriteBlockImpl(GPUVAddr gpu_dest_addr, const void* src_buffer, std::size_t size,
143 VideoCommon::CacheType which);
131 144
132 template <bool is_big_page> 145 template <bool is_big_page>
133 [[nodiscard]] std::size_t PageEntryIndex(GPUVAddr gpu_addr) const { 146 [[nodiscard]] std::size_t PageEntryIndex(GPUVAddr gpu_addr) const {
@@ -183,16 +196,8 @@ private:
183 template <bool is_big_page> 196 template <bool is_big_page>
184 inline void SetEntry(size_t position, EntryType entry); 197 inline void SetEntry(size_t position, EntryType entry);
185 198
186 std::vector<std::array<PTEKind, 32>> kinds;
187 std::vector<std::array<PTEKind, 32>> big_kinds;
188
189 template <bool is_big_page>
190 inline PTEKind GetKind(size_t position) const;
191
192 template <bool is_big_page>
193 inline void SetKind(size_t position, PTEKind kind);
194
195 Common::MultiLevelPageTable<u32> page_table; 199 Common::MultiLevelPageTable<u32> page_table;
200 Common::RangeMap<GPUVAddr, PTEKind> kind_map;
196 Common::VirtualBuffer<u32> big_page_table_cpu; 201 Common::VirtualBuffer<u32> big_page_table_cpu;
197 202
198 std::vector<u64> big_page_continous; 203 std::vector<u64> big_page_continous;
diff --git a/src/video_core/rasterizer_interface.h b/src/video_core/rasterizer_interface.h
index b6907463c..f44c7df50 100644
--- a/src/video_core/rasterizer_interface.h
+++ b/src/video_core/rasterizer_interface.h
@@ -8,6 +8,7 @@
8#include <span> 8#include <span>
9#include "common/common_types.h" 9#include "common/common_types.h"
10#include "common/polyfill_thread.h" 10#include "common/polyfill_thread.h"
11#include "video_core/cache_types.h"
11#include "video_core/engines/fermi_2d.h" 12#include "video_core/engines/fermi_2d.h"
12#include "video_core/gpu.h" 13#include "video_core/gpu.h"
13 14
@@ -42,6 +43,9 @@ public:
42 /// Dispatches a draw invocation 43 /// Dispatches a draw invocation
43 virtual void Draw(bool is_indexed, u32 instance_count) = 0; 44 virtual void Draw(bool is_indexed, u32 instance_count) = 0;
44 45
46 /// Dispatches an indirect draw invocation
47 virtual void DrawIndirect() {}
48
45 /// Clear the current framebuffer 49 /// Clear the current framebuffer
46 virtual void Clear(u32 layer_count) = 0; 50 virtual void Clear(u32 layer_count) = 0;
47 51
@@ -80,13 +84,16 @@ public:
80 virtual void FlushAll() = 0; 84 virtual void FlushAll() = 0;
81 85
82 /// Notify rasterizer that any caches of the specified region should be flushed to Switch memory 86 /// Notify rasterizer that any caches of the specified region should be flushed to Switch memory
83 virtual void FlushRegion(VAddr addr, u64 size) = 0; 87 virtual void FlushRegion(VAddr addr, u64 size,
88 VideoCommon::CacheType which = VideoCommon::CacheType::All) = 0;
84 89
85 /// Check if the the specified memory area requires flushing to CPU Memory. 90 /// Check if the the specified memory area requires flushing to CPU Memory.
86 virtual bool MustFlushRegion(VAddr addr, u64 size) = 0; 91 virtual bool MustFlushRegion(VAddr addr, u64 size,
92 VideoCommon::CacheType which = VideoCommon::CacheType::All) = 0;
87 93
88 /// Notify rasterizer that any caches of the specified region should be invalidated 94 /// Notify rasterizer that any caches of the specified region should be invalidated
89 virtual void InvalidateRegion(VAddr addr, u64 size) = 0; 95 virtual void InvalidateRegion(VAddr addr, u64 size,
96 VideoCommon::CacheType which = VideoCommon::CacheType::All) = 0;
90 97
91 /// Notify rasterizer that any caches of the specified region are desync with guest 98 /// Notify rasterizer that any caches of the specified region are desync with guest
92 virtual void OnCPUWrite(VAddr addr, u64 size) = 0; 99 virtual void OnCPUWrite(VAddr addr, u64 size) = 0;
@@ -102,7 +109,8 @@ public:
102 109
103 /// Notify rasterizer that any caches of the specified region should be flushed to Switch memory 110 /// Notify rasterizer that any caches of the specified region should be flushed to Switch memory
104 /// and invalidated 111 /// and invalidated
105 virtual void FlushAndInvalidateRegion(VAddr addr, u64 size) = 0; 112 virtual void FlushAndInvalidateRegion(
113 VAddr addr, u64 size, VideoCommon::CacheType which = VideoCommon::CacheType::All) = 0;
106 114
107 /// Notify the host renderer to wait for previous primitive and compute operations. 115 /// Notify the host renderer to wait for previous primitive and compute operations.
108 virtual void WaitForIdle() = 0; 116 virtual void WaitForIdle() = 0;
@@ -119,6 +127,10 @@ public:
119 /// Notify rasterizer that a frame is about to finish 127 /// Notify rasterizer that a frame is about to finish
120 virtual void TickFrame() = 0; 128 virtual void TickFrame() = 0;
121 129
130 virtual bool AccelerateConditionalRendering() {
131 return false;
132 }
133
122 /// Attempt to use a faster method to perform a surface copy 134 /// Attempt to use a faster method to perform a surface copy
123 [[nodiscard]] virtual bool AccelerateSurfaceCopy( 135 [[nodiscard]] virtual bool AccelerateSurfaceCopy(
124 const Tegra::Engines::Fermi2D::Surface& src, const Tegra::Engines::Fermi2D::Surface& dst, 136 const Tegra::Engines::Fermi2D::Surface& src, const Tegra::Engines::Fermi2D::Surface& dst,
diff --git a/src/video_core/renderer_null/null_rasterizer.cpp b/src/video_core/renderer_null/null_rasterizer.cpp
index 9734d84bc..2c11345d7 100644
--- a/src/video_core/renderer_null/null_rasterizer.cpp
+++ b/src/video_core/renderer_null/null_rasterizer.cpp
@@ -39,11 +39,11 @@ void RasterizerNull::BindGraphicsUniformBuffer(size_t stage, u32 index, GPUVAddr
39 u32 size) {} 39 u32 size) {}
40void RasterizerNull::DisableGraphicsUniformBuffer(size_t stage, u32 index) {} 40void RasterizerNull::DisableGraphicsUniformBuffer(size_t stage, u32 index) {}
41void RasterizerNull::FlushAll() {} 41void RasterizerNull::FlushAll() {}
42void RasterizerNull::FlushRegion(VAddr addr, u64 size) {} 42void RasterizerNull::FlushRegion(VAddr addr, u64 size, VideoCommon::CacheType) {}
43bool RasterizerNull::MustFlushRegion(VAddr addr, u64 size) { 43bool RasterizerNull::MustFlushRegion(VAddr addr, u64 size, VideoCommon::CacheType) {
44 return false; 44 return false;
45} 45}
46void RasterizerNull::InvalidateRegion(VAddr addr, u64 size) {} 46void RasterizerNull::InvalidateRegion(VAddr addr, u64 size, VideoCommon::CacheType) {}
47void RasterizerNull::OnCPUWrite(VAddr addr, u64 size) {} 47void RasterizerNull::OnCPUWrite(VAddr addr, u64 size) {}
48void RasterizerNull::InvalidateGPUCache() {} 48void RasterizerNull::InvalidateGPUCache() {}
49void RasterizerNull::UnmapMemory(VAddr addr, u64 size) {} 49void RasterizerNull::UnmapMemory(VAddr addr, u64 size) {}
@@ -61,7 +61,7 @@ void RasterizerNull::SignalSyncPoint(u32 value) {
61} 61}
62void RasterizerNull::SignalReference() {} 62void RasterizerNull::SignalReference() {}
63void RasterizerNull::ReleaseFences() {} 63void RasterizerNull::ReleaseFences() {}
64void RasterizerNull::FlushAndInvalidateRegion(VAddr addr, u64 size) {} 64void RasterizerNull::FlushAndInvalidateRegion(VAddr addr, u64 size, VideoCommon::CacheType) {}
65void RasterizerNull::WaitForIdle() {} 65void RasterizerNull::WaitForIdle() {}
66void RasterizerNull::FragmentBarrier() {} 66void RasterizerNull::FragmentBarrier() {}
67void RasterizerNull::TiledCacheBarrier() {} 67void RasterizerNull::TiledCacheBarrier() {}
diff --git a/src/video_core/renderer_null/null_rasterizer.h b/src/video_core/renderer_null/null_rasterizer.h
index ecf77ba42..2112aa70e 100644
--- a/src/video_core/renderer_null/null_rasterizer.h
+++ b/src/video_core/renderer_null/null_rasterizer.h
@@ -38,9 +38,12 @@ public:
38 void BindGraphicsUniformBuffer(size_t stage, u32 index, GPUVAddr gpu_addr, u32 size) override; 38 void BindGraphicsUniformBuffer(size_t stage, u32 index, GPUVAddr gpu_addr, u32 size) override;
39 void DisableGraphicsUniformBuffer(size_t stage, u32 index) override; 39 void DisableGraphicsUniformBuffer(size_t stage, u32 index) override;
40 void FlushAll() override; 40 void FlushAll() override;
41 void FlushRegion(VAddr addr, u64 size) override; 41 void FlushRegion(VAddr addr, u64 size,
42 bool MustFlushRegion(VAddr addr, u64 size) override; 42 VideoCommon::CacheType which = VideoCommon::CacheType::All) override;
43 void InvalidateRegion(VAddr addr, u64 size) override; 43 bool MustFlushRegion(VAddr addr, u64 size,
44 VideoCommon::CacheType which = VideoCommon::CacheType::All) override;
45 void InvalidateRegion(VAddr addr, u64 size,
46 VideoCommon::CacheType which = VideoCommon::CacheType::All) override;
44 void OnCPUWrite(VAddr addr, u64 size) override; 47 void OnCPUWrite(VAddr addr, u64 size) override;
45 void InvalidateGPUCache() override; 48 void InvalidateGPUCache() override;
46 void UnmapMemory(VAddr addr, u64 size) override; 49 void UnmapMemory(VAddr addr, u64 size) override;
@@ -50,7 +53,8 @@ public:
50 void SignalSyncPoint(u32 value) override; 53 void SignalSyncPoint(u32 value) override;
51 void SignalReference() override; 54 void SignalReference() override;
52 void ReleaseFences() override; 55 void ReleaseFences() override;
53 void FlushAndInvalidateRegion(VAddr addr, u64 size) override; 56 void FlushAndInvalidateRegion(
57 VAddr addr, u64 size, VideoCommon::CacheType which = VideoCommon::CacheType::All) override;
54 void WaitForIdle() override; 58 void WaitForIdle() override;
55 void FragmentBarrier() override; 59 void FragmentBarrier() override;
56 void TiledCacheBarrier() override; 60 void TiledCacheBarrier() override;
diff --git a/src/video_core/renderer_opengl/gl_graphics_pipeline.h b/src/video_core/renderer_opengl/gl_graphics_pipeline.h
index ea53ddb46..1c06b3655 100644
--- a/src/video_core/renderer_opengl/gl_graphics_pipeline.h
+++ b/src/video_core/renderer_opengl/gl_graphics_pipeline.h
@@ -40,6 +40,7 @@ struct GraphicsPipelineKey {
40 BitField<6, 2, Maxwell::Tessellation::DomainType> tessellation_primitive; 40 BitField<6, 2, Maxwell::Tessellation::DomainType> tessellation_primitive;
41 BitField<8, 2, Maxwell::Tessellation::Spacing> tessellation_spacing; 41 BitField<8, 2, Maxwell::Tessellation::Spacing> tessellation_spacing;
42 BitField<10, 1, u32> tessellation_clockwise; 42 BitField<10, 1, u32> tessellation_clockwise;
43 BitField<11, 3, Tegra::Engines::Maxwell3D::EngineHint> app_stage;
43 }; 44 };
44 std::array<u32, 3> padding; 45 std::array<u32, 3> padding;
45 VideoCommon::TransformFeedbackState xfb_state; 46 VideoCommon::TransformFeedbackState xfb_state;
diff --git a/src/video_core/renderer_opengl/gl_rasterizer.cpp b/src/video_core/renderer_opengl/gl_rasterizer.cpp
index a44b8c454..7d48af8e1 100644
--- a/src/video_core/renderer_opengl/gl_rasterizer.cpp
+++ b/src/video_core/renderer_opengl/gl_rasterizer.cpp
@@ -202,7 +202,8 @@ void RasterizerOpenGL::Clear(u32 layer_count) {
202 ++num_queued_commands; 202 ++num_queued_commands;
203} 203}
204 204
205void RasterizerOpenGL::Draw(bool is_indexed, u32 instance_count) { 205template <typename Func>
206void RasterizerOpenGL::PrepareDraw(bool is_indexed, Func&& draw_func) {
206 MICROPROFILE_SCOPE(OpenGL_Drawing); 207 MICROPROFILE_SCOPE(OpenGL_Drawing);
207 208
208 SCOPE_EXIT({ gpu.TickWork(); }); 209 SCOPE_EXIT({ gpu.TickWork(); });
@@ -226,48 +227,97 @@ void RasterizerOpenGL::Draw(bool is_indexed, u32 instance_count) {
226 const GLenum primitive_mode = MaxwellToGL::PrimitiveTopology(draw_state.topology); 227 const GLenum primitive_mode = MaxwellToGL::PrimitiveTopology(draw_state.topology);
227 BeginTransformFeedback(pipeline, primitive_mode); 228 BeginTransformFeedback(pipeline, primitive_mode);
228 229
229 const GLuint base_instance = static_cast<GLuint>(draw_state.base_instance); 230 draw_func(primitive_mode);
230 const GLsizei num_instances = static_cast<GLsizei>(instance_count); 231
231 if (is_indexed) {
232 const GLint base_vertex = static_cast<GLint>(draw_state.base_index);
233 const GLsizei num_vertices = static_cast<GLsizei>(draw_state.index_buffer.count);
234 const GLvoid* const offset = buffer_cache_runtime.IndexOffset();
235 const GLenum format = MaxwellToGL::IndexFormat(draw_state.index_buffer.format);
236 if (num_instances == 1 && base_instance == 0 && base_vertex == 0) {
237 glDrawElements(primitive_mode, num_vertices, format, offset);
238 } else if (num_instances == 1 && base_instance == 0) {
239 glDrawElementsBaseVertex(primitive_mode, num_vertices, format, offset, base_vertex);
240 } else if (base_vertex == 0 && base_instance == 0) {
241 glDrawElementsInstanced(primitive_mode, num_vertices, format, offset, num_instances);
242 } else if (base_vertex == 0) {
243 glDrawElementsInstancedBaseInstance(primitive_mode, num_vertices, format, offset,
244 num_instances, base_instance);
245 } else if (base_instance == 0) {
246 glDrawElementsInstancedBaseVertex(primitive_mode, num_vertices, format, offset,
247 num_instances, base_vertex);
248 } else {
249 glDrawElementsInstancedBaseVertexBaseInstance(primitive_mode, num_vertices, format,
250 offset, num_instances, base_vertex,
251 base_instance);
252 }
253 } else {
254 const GLint base_vertex = static_cast<GLint>(draw_state.vertex_buffer.first);
255 const GLsizei num_vertices = static_cast<GLsizei>(draw_state.vertex_buffer.count);
256 if (num_instances == 1 && base_instance == 0) {
257 glDrawArrays(primitive_mode, base_vertex, num_vertices);
258 } else if (base_instance == 0) {
259 glDrawArraysInstanced(primitive_mode, base_vertex, num_vertices, num_instances);
260 } else {
261 glDrawArraysInstancedBaseInstance(primitive_mode, base_vertex, num_vertices,
262 num_instances, base_instance);
263 }
264 }
265 EndTransformFeedback(); 232 EndTransformFeedback();
266 233
267 ++num_queued_commands; 234 ++num_queued_commands;
268 has_written_global_memory |= pipeline->WritesGlobalMemory(); 235 has_written_global_memory |= pipeline->WritesGlobalMemory();
269} 236}
270 237
238void RasterizerOpenGL::Draw(bool is_indexed, u32 instance_count) {
239 PrepareDraw(is_indexed, [this, is_indexed, instance_count](GLenum primitive_mode) {
240 const auto& draw_state = maxwell3d->draw_manager->GetDrawState();
241 const GLuint base_instance = static_cast<GLuint>(draw_state.base_instance);
242 const GLsizei num_instances = static_cast<GLsizei>(instance_count);
243 if (is_indexed) {
244 const GLint base_vertex = static_cast<GLint>(draw_state.base_index);
245 const GLsizei num_vertices = static_cast<GLsizei>(draw_state.index_buffer.count);
246 const GLvoid* const offset = buffer_cache_runtime.IndexOffset();
247 const GLenum format = MaxwellToGL::IndexFormat(draw_state.index_buffer.format);
248 if (num_instances == 1 && base_instance == 0 && base_vertex == 0) {
249 glDrawElements(primitive_mode, num_vertices, format, offset);
250 } else if (num_instances == 1 && base_instance == 0) {
251 glDrawElementsBaseVertex(primitive_mode, num_vertices, format, offset, base_vertex);
252 } else if (base_vertex == 0 && base_instance == 0) {
253 glDrawElementsInstanced(primitive_mode, num_vertices, format, offset,
254 num_instances);
255 } else if (base_vertex == 0) {
256 glDrawElementsInstancedBaseInstance(primitive_mode, num_vertices, format, offset,
257 num_instances, base_instance);
258 } else if (base_instance == 0) {
259 glDrawElementsInstancedBaseVertex(primitive_mode, num_vertices, format, offset,
260 num_instances, base_vertex);
261 } else {
262 glDrawElementsInstancedBaseVertexBaseInstance(primitive_mode, num_vertices, format,
263 offset, num_instances, base_vertex,
264 base_instance);
265 }
266 } else {
267 const GLint base_vertex = static_cast<GLint>(draw_state.vertex_buffer.first);
268 const GLsizei num_vertices = static_cast<GLsizei>(draw_state.vertex_buffer.count);
269 if (num_instances == 1 && base_instance == 0) {
270 glDrawArrays(primitive_mode, base_vertex, num_vertices);
271 } else if (base_instance == 0) {
272 glDrawArraysInstanced(primitive_mode, base_vertex, num_vertices, num_instances);
273 } else {
274 glDrawArraysInstancedBaseInstance(primitive_mode, base_vertex, num_vertices,
275 num_instances, base_instance);
276 }
277 }
278 });
279}
280
281void RasterizerOpenGL::DrawIndirect() {
282 const auto& params = maxwell3d->draw_manager->GetIndirectParams();
283 buffer_cache.SetDrawIndirect(&params);
284 PrepareDraw(params.is_indexed, [this, &params](GLenum primitive_mode) {
285 const auto [buffer, offset] = buffer_cache.GetDrawIndirectBuffer();
286 const GLvoid* const gl_offset =
287 reinterpret_cast<const GLvoid*>(static_cast<uintptr_t>(offset));
288 glBindBuffer(GL_DRAW_INDIRECT_BUFFER, buffer->Handle());
289 if (params.include_count) {
290 const auto [draw_buffer, offset_base] = buffer_cache.GetDrawIndirectCount();
291 glBindBuffer(GL_PARAMETER_BUFFER, draw_buffer->Handle());
292
293 if (params.is_indexed) {
294 const GLenum format = MaxwellToGL::IndexFormat(maxwell3d->regs.index_buffer.format);
295 glMultiDrawElementsIndirectCount(primitive_mode, format, gl_offset,
296 static_cast<GLintptr>(offset_base),
297 static_cast<GLsizei>(params.max_draw_counts),
298 static_cast<GLsizei>(params.stride));
299 } else {
300 glMultiDrawArraysIndirectCount(primitive_mode, gl_offset,
301 static_cast<GLintptr>(offset_base),
302 static_cast<GLsizei>(params.max_draw_counts),
303 static_cast<GLsizei>(params.stride));
304 }
305 return;
306 }
307 if (params.is_indexed) {
308 const GLenum format = MaxwellToGL::IndexFormat(maxwell3d->regs.index_buffer.format);
309 glMultiDrawElementsIndirect(primitive_mode, format, gl_offset,
310 static_cast<GLsizei>(params.max_draw_counts),
311 static_cast<GLsizei>(params.stride));
312 } else {
313 glMultiDrawArraysIndirect(primitive_mode, gl_offset,
314 static_cast<GLsizei>(params.max_draw_counts),
315 static_cast<GLsizei>(params.stride));
316 }
317 });
318 buffer_cache.SetDrawIndirect(nullptr);
319}
320
271void RasterizerOpenGL::DispatchCompute() { 321void RasterizerOpenGL::DispatchCompute() {
272 ComputePipeline* const pipeline{shader_cache.CurrentComputePipeline()}; 322 ComputePipeline* const pipeline{shader_cache.CurrentComputePipeline()};
273 if (!pipeline) { 323 if (!pipeline) {
@@ -302,46 +352,60 @@ void RasterizerOpenGL::DisableGraphicsUniformBuffer(size_t stage, u32 index) {
302 352
303void RasterizerOpenGL::FlushAll() {} 353void RasterizerOpenGL::FlushAll() {}
304 354
305void RasterizerOpenGL::FlushRegion(VAddr addr, u64 size) { 355void RasterizerOpenGL::FlushRegion(VAddr addr, u64 size, VideoCommon::CacheType which) {
306 MICROPROFILE_SCOPE(OpenGL_CacheManagement); 356 MICROPROFILE_SCOPE(OpenGL_CacheManagement);
307 if (addr == 0 || size == 0) { 357 if (addr == 0 || size == 0) {
308 return; 358 return;
309 } 359 }
310 { 360 if (True(which & VideoCommon::CacheType::TextureCache)) {
311 std::scoped_lock lock{texture_cache.mutex}; 361 std::scoped_lock lock{texture_cache.mutex};
312 texture_cache.DownloadMemory(addr, size); 362 texture_cache.DownloadMemory(addr, size);
313 } 363 }
314 { 364 if ((True(which & VideoCommon::CacheType::BufferCache))) {
315 std::scoped_lock lock{buffer_cache.mutex}; 365 std::scoped_lock lock{buffer_cache.mutex};
316 buffer_cache.DownloadMemory(addr, size); 366 buffer_cache.DownloadMemory(addr, size);
317 } 367 }
318 query_cache.FlushRegion(addr, size); 368 if ((True(which & VideoCommon::CacheType::QueryCache))) {
369 query_cache.FlushRegion(addr, size);
370 }
319} 371}
320 372
321bool RasterizerOpenGL::MustFlushRegion(VAddr addr, u64 size) { 373bool RasterizerOpenGL::MustFlushRegion(VAddr addr, u64 size, VideoCommon::CacheType which) {
322 std::scoped_lock lock{buffer_cache.mutex, texture_cache.mutex}; 374 if ((True(which & VideoCommon::CacheType::BufferCache))) {
375 std::scoped_lock lock{buffer_cache.mutex};
376 if (buffer_cache.IsRegionGpuModified(addr, size)) {
377 return true;
378 }
379 }
323 if (!Settings::IsGPULevelHigh()) { 380 if (!Settings::IsGPULevelHigh()) {
324 return buffer_cache.IsRegionGpuModified(addr, size); 381 return false;
325 } 382 }
326 return texture_cache.IsRegionGpuModified(addr, size) || 383 if (True(which & VideoCommon::CacheType::TextureCache)) {
327 buffer_cache.IsRegionGpuModified(addr, size); 384 std::scoped_lock lock{texture_cache.mutex};
385 return texture_cache.IsRegionGpuModified(addr, size);
386 }
387 return false;
328} 388}
329 389
330void RasterizerOpenGL::InvalidateRegion(VAddr addr, u64 size) { 390void RasterizerOpenGL::InvalidateRegion(VAddr addr, u64 size, VideoCommon::CacheType which) {
331 MICROPROFILE_SCOPE(OpenGL_CacheManagement); 391 MICROPROFILE_SCOPE(OpenGL_CacheManagement);
332 if (addr == 0 || size == 0) { 392 if (addr == 0 || size == 0) {
333 return; 393 return;
334 } 394 }
335 { 395 if (True(which & VideoCommon::CacheType::TextureCache)) {
336 std::scoped_lock lock{texture_cache.mutex}; 396 std::scoped_lock lock{texture_cache.mutex};
337 texture_cache.WriteMemory(addr, size); 397 texture_cache.WriteMemory(addr, size);
338 } 398 }
339 { 399 if (True(which & VideoCommon::CacheType::BufferCache)) {
340 std::scoped_lock lock{buffer_cache.mutex}; 400 std::scoped_lock lock{buffer_cache.mutex};
341 buffer_cache.WriteMemory(addr, size); 401 buffer_cache.WriteMemory(addr, size);
342 } 402 }
343 shader_cache.InvalidateRegion(addr, size); 403 if (True(which & VideoCommon::CacheType::ShaderCache)) {
344 query_cache.InvalidateRegion(addr, size); 404 shader_cache.InvalidateRegion(addr, size);
405 }
406 if (True(which & VideoCommon::CacheType::QueryCache)) {
407 query_cache.InvalidateRegion(addr, size);
408 }
345} 409}
346 410
347void RasterizerOpenGL::OnCPUWrite(VAddr addr, u64 size) { 411void RasterizerOpenGL::OnCPUWrite(VAddr addr, u64 size) {
@@ -408,11 +472,12 @@ void RasterizerOpenGL::ReleaseFences() {
408 fence_manager.WaitPendingFences(); 472 fence_manager.WaitPendingFences();
409} 473}
410 474
411void RasterizerOpenGL::FlushAndInvalidateRegion(VAddr addr, u64 size) { 475void RasterizerOpenGL::FlushAndInvalidateRegion(VAddr addr, u64 size,
476 VideoCommon::CacheType which) {
412 if (Settings::IsGPULevelExtreme()) { 477 if (Settings::IsGPULevelExtreme()) {
413 FlushRegion(addr, size); 478 FlushRegion(addr, size, which);
414 } 479 }
415 InvalidateRegion(addr, size); 480 InvalidateRegion(addr, size, which);
416} 481}
417 482
418void RasterizerOpenGL::WaitForIdle() { 483void RasterizerOpenGL::WaitForIdle() {
@@ -460,6 +525,21 @@ void RasterizerOpenGL::TickFrame() {
460 } 525 }
461} 526}
462 527
528bool RasterizerOpenGL::AccelerateConditionalRendering() {
529 if (Settings::IsGPULevelHigh()) {
530 // Reimplement Host conditional rendering.
531 return false;
532 }
533 // Medium / Low Hack: stub any checks on queries writen into the buffer cache.
534 const GPUVAddr condition_address{maxwell3d->regs.render_enable.Address()};
535 Maxwell::ReportSemaphore::Compare cmp;
536 if (gpu_memory->IsMemoryDirty(condition_address, sizeof(cmp),
537 VideoCommon::CacheType::BufferCache)) {
538 return true;
539 }
540 return false;
541}
542
463bool RasterizerOpenGL::AccelerateSurfaceCopy(const Tegra::Engines::Fermi2D::Surface& src, 543bool RasterizerOpenGL::AccelerateSurfaceCopy(const Tegra::Engines::Fermi2D::Surface& src,
464 const Tegra::Engines::Fermi2D::Surface& dst, 544 const Tegra::Engines::Fermi2D::Surface& dst,
465 const Tegra::Engines::Fermi2D::Config& copy_config) { 545 const Tegra::Engines::Fermi2D::Config& copy_config) {
@@ -481,7 +561,7 @@ void RasterizerOpenGL::AccelerateInlineToMemory(GPUVAddr address, size_t copy_si
481 } 561 }
482 gpu_memory->WriteBlockUnsafe(address, memory.data(), copy_size); 562 gpu_memory->WriteBlockUnsafe(address, memory.data(), copy_size);
483 { 563 {
484 std::unique_lock<std::mutex> lock{buffer_cache.mutex}; 564 std::unique_lock<std::recursive_mutex> lock{buffer_cache.mutex};
485 if (!buffer_cache.InlineMemory(*cpu_addr, copy_size, memory)) { 565 if (!buffer_cache.InlineMemory(*cpu_addr, copy_size, memory)) {
486 buffer_cache.WriteMemory(*cpu_addr, copy_size); 566 buffer_cache.WriteMemory(*cpu_addr, copy_size);
487 } 567 }
diff --git a/src/video_core/renderer_opengl/gl_rasterizer.h b/src/video_core/renderer_opengl/gl_rasterizer.h
index fc183c3ca..be4f76c18 100644
--- a/src/video_core/renderer_opengl/gl_rasterizer.h
+++ b/src/video_core/renderer_opengl/gl_rasterizer.h
@@ -69,6 +69,7 @@ public:
69 ~RasterizerOpenGL() override; 69 ~RasterizerOpenGL() override;
70 70
71 void Draw(bool is_indexed, u32 instance_count) override; 71 void Draw(bool is_indexed, u32 instance_count) override;
72 void DrawIndirect() override;
72 void Clear(u32 layer_count) override; 73 void Clear(u32 layer_count) override;
73 void DispatchCompute() override; 74 void DispatchCompute() override;
74 void ResetCounter(VideoCore::QueryType type) override; 75 void ResetCounter(VideoCore::QueryType type) override;
@@ -76,9 +77,12 @@ public:
76 void BindGraphicsUniformBuffer(size_t stage, u32 index, GPUVAddr gpu_addr, u32 size) override; 77 void BindGraphicsUniformBuffer(size_t stage, u32 index, GPUVAddr gpu_addr, u32 size) override;
77 void DisableGraphicsUniformBuffer(size_t stage, u32 index) override; 78 void DisableGraphicsUniformBuffer(size_t stage, u32 index) override;
78 void FlushAll() override; 79 void FlushAll() override;
79 void FlushRegion(VAddr addr, u64 size) override; 80 void FlushRegion(VAddr addr, u64 size,
80 bool MustFlushRegion(VAddr addr, u64 size) override; 81 VideoCommon::CacheType which = VideoCommon::CacheType::All) override;
81 void InvalidateRegion(VAddr addr, u64 size) override; 82 bool MustFlushRegion(VAddr addr, u64 size,
83 VideoCommon::CacheType which = VideoCommon::CacheType::All) override;
84 void InvalidateRegion(VAddr addr, u64 size,
85 VideoCommon::CacheType which = VideoCommon::CacheType::All) override;
82 void OnCPUWrite(VAddr addr, u64 size) override; 86 void OnCPUWrite(VAddr addr, u64 size) override;
83 void InvalidateGPUCache() override; 87 void InvalidateGPUCache() override;
84 void UnmapMemory(VAddr addr, u64 size) override; 88 void UnmapMemory(VAddr addr, u64 size) override;
@@ -88,12 +92,14 @@ public:
88 void SignalSyncPoint(u32 value) override; 92 void SignalSyncPoint(u32 value) override;
89 void SignalReference() override; 93 void SignalReference() override;
90 void ReleaseFences() override; 94 void ReleaseFences() override;
91 void FlushAndInvalidateRegion(VAddr addr, u64 size) override; 95 void FlushAndInvalidateRegion(
96 VAddr addr, u64 size, VideoCommon::CacheType which = VideoCommon::CacheType::All) override;
92 void WaitForIdle() override; 97 void WaitForIdle() override;
93 void FragmentBarrier() override; 98 void FragmentBarrier() override;
94 void TiledCacheBarrier() override; 99 void TiledCacheBarrier() override;
95 void FlushCommands() override; 100 void FlushCommands() override;
96 void TickFrame() override; 101 void TickFrame() override;
102 bool AccelerateConditionalRendering() override;
97 bool AccelerateSurfaceCopy(const Tegra::Engines::Fermi2D::Surface& src, 103 bool AccelerateSurfaceCopy(const Tegra::Engines::Fermi2D::Surface& src,
98 const Tegra::Engines::Fermi2D::Surface& dst, 104 const Tegra::Engines::Fermi2D::Surface& dst,
99 const Tegra::Engines::Fermi2D::Config& copy_config) override; 105 const Tegra::Engines::Fermi2D::Config& copy_config) override;
@@ -121,6 +127,9 @@ private:
121 static constexpr size_t MAX_IMAGES = 48; 127 static constexpr size_t MAX_IMAGES = 48;
122 static constexpr size_t MAX_IMAGE_VIEWS = MAX_TEXTURES + MAX_IMAGES; 128 static constexpr size_t MAX_IMAGE_VIEWS = MAX_TEXTURES + MAX_IMAGES;
123 129
130 template <typename Func>
131 void PrepareDraw(bool is_indexed, Func&&);
132
124 /// Syncs state to match guest's 133 /// Syncs state to match guest's
125 void SyncState(); 134 void SyncState();
126 135
diff --git a/src/video_core/renderer_opengl/gl_shader_cache.cpp b/src/video_core/renderer_opengl/gl_shader_cache.cpp
index f8868a012..03b6314ff 100644
--- a/src/video_core/renderer_opengl/gl_shader_cache.cpp
+++ b/src/video_core/renderer_opengl/gl_shader_cache.cpp
@@ -51,7 +51,7 @@ using VideoCommon::LoadPipelines;
51using VideoCommon::SerializePipeline; 51using VideoCommon::SerializePipeline;
52using Context = ShaderContext::Context; 52using Context = ShaderContext::Context;
53 53
54constexpr u32 CACHE_VERSION = 7; 54constexpr u32 CACHE_VERSION = 9;
55 55
56template <typename Container> 56template <typename Container>
57auto MakeSpan(Container& container) { 57auto MakeSpan(Container& container) {
@@ -350,6 +350,7 @@ GraphicsPipeline* ShaderCache::CurrentGraphicsPipeline() {
350 regs.tessellation.params.output_primitives.Value() == 350 regs.tessellation.params.output_primitives.Value() ==
351 Maxwell::Tessellation::OutputPrimitives::Triangles_CW); 351 Maxwell::Tessellation::OutputPrimitives::Triangles_CW);
352 graphics_key.xfb_enabled.Assign(regs.transform_feedback_enabled != 0 ? 1 : 0); 352 graphics_key.xfb_enabled.Assign(regs.transform_feedback_enabled != 0 ? 1 : 0);
353 graphics_key.app_stage.Assign(maxwell3d->engine_state);
353 if (graphics_key.xfb_enabled) { 354 if (graphics_key.xfb_enabled) {
354 SetXfbState(graphics_key.xfb_state, regs); 355 SetXfbState(graphics_key.xfb_state, regs);
355 } 356 }
diff --git a/src/video_core/renderer_opengl/gl_texture_cache.h b/src/video_core/renderer_opengl/gl_texture_cache.h
index 113528e9b..5d9d370f2 100644
--- a/src/video_core/renderer_opengl/gl_texture_cache.h
+++ b/src/video_core/renderer_opengl/gl_texture_cache.h
@@ -354,6 +354,7 @@ struct TextureCacheParams {
354 static constexpr bool FRAMEBUFFER_BLITS = true; 354 static constexpr bool FRAMEBUFFER_BLITS = true;
355 static constexpr bool HAS_EMULATED_COPIES = true; 355 static constexpr bool HAS_EMULATED_COPIES = true;
356 static constexpr bool HAS_DEVICE_MEMORY_INFO = true; 356 static constexpr bool HAS_DEVICE_MEMORY_INFO = true;
357 static constexpr bool IMPLEMENTS_ASYNC_DOWNLOADS = false;
357 358
358 using Runtime = OpenGL::TextureCacheRuntime; 359 using Runtime = OpenGL::TextureCacheRuntime;
359 using Image = OpenGL::Image; 360 using Image = OpenGL::Image;
@@ -361,6 +362,7 @@ struct TextureCacheParams {
361 using ImageView = OpenGL::ImageView; 362 using ImageView = OpenGL::ImageView;
362 using Sampler = OpenGL::Sampler; 363 using Sampler = OpenGL::Sampler;
363 using Framebuffer = OpenGL::Framebuffer; 364 using Framebuffer = OpenGL::Framebuffer;
365 using AsyncBuffer = u32;
364}; 366};
365 367
366using TextureCache = VideoCommon::TextureCache<TextureCacheParams>; 368using TextureCache = VideoCommon::TextureCache<TextureCacheParams>;
diff --git a/src/video_core/renderer_vulkan/fixed_pipeline_state.cpp b/src/video_core/renderer_vulkan/fixed_pipeline_state.cpp
index e62b36822..3d328a250 100644
--- a/src/video_core/renderer_vulkan/fixed_pipeline_state.cpp
+++ b/src/video_core/renderer_vulkan/fixed_pipeline_state.cpp
@@ -48,43 +48,30 @@ void RefreshXfbState(VideoCommon::TransformFeedbackState& state, const Maxwell&
48} 48}
49} // Anonymous namespace 49} // Anonymous namespace
50 50
51void FixedPipelineState::Refresh(Tegra::Engines::Maxwell3D& maxwell3d, 51void FixedPipelineState::Refresh(Tegra::Engines::Maxwell3D& maxwell3d, DynamicFeatures& features) {
52 bool has_extended_dynamic_state, bool has_dynamic_vertex_input) {
53 const Maxwell& regs = maxwell3d.regs; 52 const Maxwell& regs = maxwell3d.regs;
54 const auto topology_ = maxwell3d.draw_manager->GetDrawState().topology; 53 const auto topology_ = maxwell3d.draw_manager->GetDrawState().topology;
55 const std::array enabled_lut{
56 regs.polygon_offset_point_enable,
57 regs.polygon_offset_line_enable,
58 regs.polygon_offset_fill_enable,
59 };
60 const u32 topology_index = static_cast<u32>(topology_);
61 54
62 raw1 = 0; 55 raw1 = 0;
63 extended_dynamic_state.Assign(has_extended_dynamic_state ? 1 : 0); 56 extended_dynamic_state.Assign(features.has_extended_dynamic_state ? 1 : 0);
64 dynamic_vertex_input.Assign(has_dynamic_vertex_input ? 1 : 0); 57 extended_dynamic_state_2.Assign(features.has_extended_dynamic_state_2 ? 1 : 0);
58 extended_dynamic_state_2_extra.Assign(features.has_extended_dynamic_state_2_extra ? 1 : 0);
59 extended_dynamic_state_3_blend.Assign(features.has_extended_dynamic_state_3_blend ? 1 : 0);
60 extended_dynamic_state_3_enables.Assign(features.has_extended_dynamic_state_3_enables ? 1 : 0);
61 dynamic_vertex_input.Assign(features.has_dynamic_vertex_input ? 1 : 0);
65 xfb_enabled.Assign(regs.transform_feedback_enabled != 0); 62 xfb_enabled.Assign(regs.transform_feedback_enabled != 0);
66 primitive_restart_enable.Assign(regs.primitive_restart.enabled != 0 ? 1 : 0);
67 depth_bias_enable.Assign(enabled_lut[POLYGON_OFFSET_ENABLE_LUT[topology_index]] != 0 ? 1 : 0);
68 depth_clamp_disabled.Assign(regs.viewport_clip_control.geometry_clip ==
69 Maxwell::ViewportClipControl::GeometryClip::Passthrough ||
70 regs.viewport_clip_control.geometry_clip ==
71 Maxwell::ViewportClipControl::GeometryClip::FrustumXYZ ||
72 regs.viewport_clip_control.geometry_clip ==
73 Maxwell::ViewportClipControl::GeometryClip::FrustumZ);
74 ndc_minus_one_to_one.Assign(regs.depth_mode == Maxwell::DepthMode::MinusOneToOne ? 1 : 0); 63 ndc_minus_one_to_one.Assign(regs.depth_mode == Maxwell::DepthMode::MinusOneToOne ? 1 : 0);
75 polygon_mode.Assign(PackPolygonMode(regs.polygon_mode_front)); 64 polygon_mode.Assign(PackPolygonMode(regs.polygon_mode_front));
76 patch_control_points_minus_one.Assign(regs.patch_vertices - 1);
77 tessellation_primitive.Assign(static_cast<u32>(regs.tessellation.params.domain_type.Value())); 65 tessellation_primitive.Assign(static_cast<u32>(regs.tessellation.params.domain_type.Value()));
78 tessellation_spacing.Assign(static_cast<u32>(regs.tessellation.params.spacing.Value())); 66 tessellation_spacing.Assign(static_cast<u32>(regs.tessellation.params.spacing.Value()));
79 tessellation_clockwise.Assign(regs.tessellation.params.output_primitives.Value() == 67 tessellation_clockwise.Assign(regs.tessellation.params.output_primitives.Value() ==
80 Maxwell::Tessellation::OutputPrimitives::Triangles_CW); 68 Maxwell::Tessellation::OutputPrimitives::Triangles_CW);
81 logic_op_enable.Assign(regs.logic_op.enable != 0 ? 1 : 0); 69 patch_control_points_minus_one.Assign(regs.patch_vertices - 1);
82 logic_op.Assign(PackLogicOp(regs.logic_op.op));
83 topology.Assign(topology_); 70 topology.Assign(topology_);
84 msaa_mode.Assign(regs.anti_alias_samples_mode); 71 msaa_mode.Assign(regs.anti_alias_samples_mode);
85 72
86 raw2 = 0; 73 raw2 = 0;
87 rasterize_enable.Assign(regs.rasterize_enable != 0 ? 1 : 0); 74
88 const auto test_func = 75 const auto test_func =
89 regs.alpha_test_enabled != 0 ? regs.alpha_test_func : Maxwell::ComparisonOp::Always_GL; 76 regs.alpha_test_enabled != 0 ? regs.alpha_test_func : Maxwell::ComparisonOp::Always_GL;
90 alpha_test_func.Assign(PackComparisonOp(test_func)); 77 alpha_test_func.Assign(PackComparisonOp(test_func));
@@ -97,6 +84,7 @@ void FixedPipelineState::Refresh(Tegra::Engines::Maxwell3D& maxwell3d,
97 smooth_lines.Assign(regs.line_anti_alias_enable != 0 ? 1 : 0); 84 smooth_lines.Assign(regs.line_anti_alias_enable != 0 ? 1 : 0);
98 alpha_to_coverage_enabled.Assign(regs.anti_alias_alpha_control.alpha_to_coverage != 0 ? 1 : 0); 85 alpha_to_coverage_enabled.Assign(regs.anti_alias_alpha_control.alpha_to_coverage != 0 ? 1 : 0);
99 alpha_to_one_enabled.Assign(regs.anti_alias_alpha_control.alpha_to_one != 0 ? 1 : 0); 86 alpha_to_one_enabled.Assign(regs.anti_alias_alpha_control.alpha_to_one != 0 ? 1 : 0);
87 app_stage.Assign(maxwell3d.engine_state);
100 88
101 for (size_t i = 0; i < regs.rt.size(); ++i) { 89 for (size_t i = 0; i < regs.rt.size(); ++i) {
102 color_formats[i] = static_cast<u8>(regs.rt[i].format); 90 color_formats[i] = static_cast<u8>(regs.rt[i].format);
@@ -105,7 +93,7 @@ void FixedPipelineState::Refresh(Tegra::Engines::Maxwell3D& maxwell3d,
105 point_size = Common::BitCast<u32>(regs.point_size); 93 point_size = Common::BitCast<u32>(regs.point_size);
106 94
107 if (maxwell3d.dirty.flags[Dirty::VertexInput]) { 95 if (maxwell3d.dirty.flags[Dirty::VertexInput]) {
108 if (has_dynamic_vertex_input) { 96 if (features.has_dynamic_vertex_input) {
109 // Dirty flag will be reset by the command buffer update 97 // Dirty flag will be reset by the command buffer update
110 static constexpr std::array LUT{ 98 static constexpr std::array LUT{
111 0u, // Invalid 99 0u, // Invalid
@@ -144,12 +132,6 @@ void FixedPipelineState::Refresh(Tegra::Engines::Maxwell3D& maxwell3d,
144 } 132 }
145 } 133 }
146 } 134 }
147 if (maxwell3d.dirty.flags[Dirty::Blending]) {
148 maxwell3d.dirty.flags[Dirty::Blending] = false;
149 for (size_t index = 0; index < attachments.size(); ++index) {
150 attachments[index].Refresh(regs, index);
151 }
152 }
153 if (maxwell3d.dirty.flags[Dirty::ViewportSwizzles]) { 135 if (maxwell3d.dirty.flags[Dirty::ViewportSwizzles]) {
154 maxwell3d.dirty.flags[Dirty::ViewportSwizzles] = false; 136 maxwell3d.dirty.flags[Dirty::ViewportSwizzles] = false;
155 const auto& transform = regs.viewport_transform; 137 const auto& transform = regs.viewport_transform;
@@ -157,8 +139,27 @@ void FixedPipelineState::Refresh(Tegra::Engines::Maxwell3D& maxwell3d,
157 return static_cast<u16>(viewport.swizzle.raw); 139 return static_cast<u16>(viewport.swizzle.raw);
158 }); 140 });
159 } 141 }
142 dynamic_state.raw1 = 0;
143 dynamic_state.raw2 = 0;
160 if (!extended_dynamic_state) { 144 if (!extended_dynamic_state) {
161 dynamic_state.Refresh(regs); 145 dynamic_state.Refresh(regs);
146 std::ranges::transform(regs.vertex_streams, vertex_strides.begin(), [](const auto& array) {
147 return static_cast<u16>(array.stride.Value());
148 });
149 }
150 if (!extended_dynamic_state_2_extra) {
151 dynamic_state.Refresh2(regs, topology, extended_dynamic_state_2);
152 }
153 if (!extended_dynamic_state_3_blend) {
154 if (maxwell3d.dirty.flags[Dirty::Blending]) {
155 maxwell3d.dirty.flags[Dirty::Blending] = false;
156 for (size_t index = 0; index < attachments.size(); ++index) {
157 attachments[index].Refresh(regs, index);
158 }
159 }
160 }
161 if (!extended_dynamic_state_3_enables) {
162 dynamic_state.Refresh3(regs);
162 } 163 }
163 if (xfb_enabled) { 164 if (xfb_enabled) {
164 RefreshXfbState(xfb_state, regs); 165 RefreshXfbState(xfb_state, regs);
@@ -175,12 +176,11 @@ void FixedPipelineState::BlendingAttachment::Refresh(const Maxwell& regs, size_t
175 mask_a.Assign(mask.A); 176 mask_a.Assign(mask.A);
176 177
177 // TODO: C++20 Use templated lambda to deduplicate code 178 // TODO: C++20 Use templated lambda to deduplicate code
179 if (!regs.blend.enable[index]) {
180 return;
181 }
178 182
179 if (!regs.blend_per_target_enabled) { 183 const auto setup_blend = [&]<typename T>(const T& src) {
180 if (!regs.blend.enable[index]) {
181 return;
182 }
183 const auto& src = regs.blend;
184 equation_rgb.Assign(PackBlendEquation(src.color_op)); 184 equation_rgb.Assign(PackBlendEquation(src.color_op));
185 equation_a.Assign(PackBlendEquation(src.alpha_op)); 185 equation_a.Assign(PackBlendEquation(src.alpha_op));
186 factor_source_rgb.Assign(PackBlendFactor(src.color_source)); 186 factor_source_rgb.Assign(PackBlendFactor(src.color_source));
@@ -188,20 +188,13 @@ void FixedPipelineState::BlendingAttachment::Refresh(const Maxwell& regs, size_t
188 factor_source_a.Assign(PackBlendFactor(src.alpha_source)); 188 factor_source_a.Assign(PackBlendFactor(src.alpha_source));
189 factor_dest_a.Assign(PackBlendFactor(src.alpha_dest)); 189 factor_dest_a.Assign(PackBlendFactor(src.alpha_dest));
190 enable.Assign(1); 190 enable.Assign(1);
191 return; 191 };
192 }
193 192
194 if (!regs.blend.enable[index]) { 193 if (!regs.blend_per_target_enabled) {
194 setup_blend(regs.blend);
195 return; 195 return;
196 } 196 }
197 const auto& src = regs.blend_per_target[index]; 197 setup_blend(regs.blend_per_target[index]);
198 equation_rgb.Assign(PackBlendEquation(src.color_op));
199 equation_a.Assign(PackBlendEquation(src.alpha_op));
200 factor_source_rgb.Assign(PackBlendFactor(src.color_source));
201 factor_dest_rgb.Assign(PackBlendFactor(src.color_dest));
202 factor_source_a.Assign(PackBlendFactor(src.alpha_source));
203 factor_dest_a.Assign(PackBlendFactor(src.alpha_dest));
204 enable.Assign(1);
205} 198}
206 199
207void FixedPipelineState::DynamicState::Refresh(const Maxwell& regs) { 200void FixedPipelineState::DynamicState::Refresh(const Maxwell& regs) {
@@ -211,8 +204,6 @@ void FixedPipelineState::DynamicState::Refresh(const Maxwell& regs) {
211 packed_front_face = 1 - packed_front_face; 204 packed_front_face = 1 - packed_front_face;
212 } 205 }
213 206
214 raw1 = 0;
215 raw2 = 0;
216 front.action_stencil_fail.Assign(PackStencilOp(regs.stencil_front_op.fail)); 207 front.action_stencil_fail.Assign(PackStencilOp(regs.stencil_front_op.fail));
217 front.action_depth_fail.Assign(PackStencilOp(regs.stencil_front_op.zfail)); 208 front.action_depth_fail.Assign(PackStencilOp(regs.stencil_front_op.zfail));
218 front.action_depth_pass.Assign(PackStencilOp(regs.stencil_front_op.zpass)); 209 front.action_depth_pass.Assign(PackStencilOp(regs.stencil_front_op.zpass));
@@ -236,9 +227,37 @@ void FixedPipelineState::DynamicState::Refresh(const Maxwell& regs) {
236 depth_test_func.Assign(PackComparisonOp(regs.depth_test_func)); 227 depth_test_func.Assign(PackComparisonOp(regs.depth_test_func));
237 cull_face.Assign(PackCullFace(regs.gl_cull_face)); 228 cull_face.Assign(PackCullFace(regs.gl_cull_face));
238 cull_enable.Assign(regs.gl_cull_test_enabled != 0 ? 1 : 0); 229 cull_enable.Assign(regs.gl_cull_test_enabled != 0 ? 1 : 0);
239 std::ranges::transform(regs.vertex_streams, vertex_strides.begin(), [](const auto& array) { 230}
240 return static_cast<u16>(array.stride.Value()); 231
241 }); 232void FixedPipelineState::DynamicState::Refresh2(const Maxwell& regs,
233 Maxwell::PrimitiveTopology topology_,
234 bool base_feautures_supported) {
235 logic_op.Assign(PackLogicOp(regs.logic_op.op));
236
237 if (base_feautures_supported) {
238 return;
239 }
240
241 const std::array enabled_lut{
242 regs.polygon_offset_point_enable,
243 regs.polygon_offset_line_enable,
244 regs.polygon_offset_fill_enable,
245 };
246 const u32 topology_index = static_cast<u32>(topology_);
247
248 rasterize_enable.Assign(regs.rasterize_enable != 0 ? 1 : 0);
249 primitive_restart_enable.Assign(regs.primitive_restart.enabled != 0 ? 1 : 0);
250 depth_bias_enable.Assign(enabled_lut[POLYGON_OFFSET_ENABLE_LUT[topology_index]] != 0 ? 1 : 0);
251}
252
253void FixedPipelineState::DynamicState::Refresh3(const Maxwell& regs) {
254 logic_op_enable.Assign(regs.logic_op.enable != 0 ? 1 : 0);
255 depth_clamp_disabled.Assign(regs.viewport_clip_control.geometry_clip ==
256 Maxwell::ViewportClipControl::GeometryClip::Passthrough ||
257 regs.viewport_clip_control.geometry_clip ==
258 Maxwell::ViewportClipControl::GeometryClip::FrustumXYZ ||
259 regs.viewport_clip_control.geometry_clip ==
260 Maxwell::ViewportClipControl::GeometryClip::FrustumZ);
242} 261}
243 262
244size_t FixedPipelineState::Hash() const noexcept { 263size_t FixedPipelineState::Hash() const noexcept {
diff --git a/src/video_core/renderer_vulkan/fixed_pipeline_state.h b/src/video_core/renderer_vulkan/fixed_pipeline_state.h
index ab79fb8f3..98ea20b42 100644
--- a/src/video_core/renderer_vulkan/fixed_pipeline_state.h
+++ b/src/video_core/renderer_vulkan/fixed_pipeline_state.h
@@ -17,6 +17,15 @@ namespace Vulkan {
17 17
18using Maxwell = Tegra::Engines::Maxwell3D::Regs; 18using Maxwell = Tegra::Engines::Maxwell3D::Regs;
19 19
20struct DynamicFeatures {
21 bool has_extended_dynamic_state;
22 bool has_extended_dynamic_state_2;
23 bool has_extended_dynamic_state_2_extra;
24 bool has_extended_dynamic_state_3_blend;
25 bool has_extended_dynamic_state_3_enables;
26 bool has_dynamic_vertex_input;
27};
28
20struct FixedPipelineState { 29struct FixedPipelineState {
21 static u32 PackComparisonOp(Maxwell::ComparisonOp op) noexcept; 30 static u32 PackComparisonOp(Maxwell::ComparisonOp op) noexcept;
22 static Maxwell::ComparisonOp UnpackComparisonOp(u32 packed) noexcept; 31 static Maxwell::ComparisonOp UnpackComparisonOp(u32 packed) noexcept;
@@ -133,6 +142,17 @@ struct FixedPipelineState {
133 struct DynamicState { 142 struct DynamicState {
134 union { 143 union {
135 u32 raw1; 144 u32 raw1;
145 BitField<0, 2, u32> cull_face;
146 BitField<2, 1, u32> cull_enable;
147 BitField<3, 1, u32> primitive_restart_enable;
148 BitField<4, 1, u32> depth_bias_enable;
149 BitField<5, 1, u32> rasterize_enable;
150 BitField<6, 4, u32> logic_op;
151 BitField<10, 1, u32> logic_op_enable;
152 BitField<11, 1, u32> depth_clamp_disabled;
153 };
154 union {
155 u32 raw2;
136 StencilFace<0> front; 156 StencilFace<0> front;
137 StencilFace<12> back; 157 StencilFace<12> back;
138 BitField<24, 1, u32> stencil_enable; 158 BitField<24, 1, u32> stencil_enable;
@@ -142,15 +162,11 @@ struct FixedPipelineState {
142 BitField<28, 1, u32> front_face; 162 BitField<28, 1, u32> front_face;
143 BitField<29, 3, u32> depth_test_func; 163 BitField<29, 3, u32> depth_test_func;
144 }; 164 };
145 union {
146 u32 raw2;
147 BitField<0, 2, u32> cull_face;
148 BitField<2, 1, u32> cull_enable;
149 };
150 // Vertex stride is a 12 bits value, we have 4 bits to spare per element
151 std::array<u16, Maxwell::NumVertexArrays> vertex_strides;
152 165
153 void Refresh(const Maxwell& regs); 166 void Refresh(const Maxwell& regs);
167 void Refresh2(const Maxwell& regs, Maxwell::PrimitiveTopology topology,
168 bool base_feautures_supported);
169 void Refresh3(const Maxwell& regs);
154 170
155 Maxwell::ComparisonOp DepthTestFunc() const noexcept { 171 Maxwell::ComparisonOp DepthTestFunc() const noexcept {
156 return UnpackComparisonOp(depth_test_func); 172 return UnpackComparisonOp(depth_test_func);
@@ -168,25 +184,24 @@ struct FixedPipelineState {
168 union { 184 union {
169 u32 raw1; 185 u32 raw1;
170 BitField<0, 1, u32> extended_dynamic_state; 186 BitField<0, 1, u32> extended_dynamic_state;
171 BitField<1, 1, u32> dynamic_vertex_input; 187 BitField<1, 1, u32> extended_dynamic_state_2;
172 BitField<2, 1, u32> xfb_enabled; 188 BitField<2, 1, u32> extended_dynamic_state_2_extra;
173 BitField<3, 1, u32> primitive_restart_enable; 189 BitField<3, 1, u32> extended_dynamic_state_3_blend;
174 BitField<4, 1, u32> depth_bias_enable; 190 BitField<4, 1, u32> extended_dynamic_state_3_enables;
175 BitField<5, 1, u32> depth_clamp_disabled; 191 BitField<5, 1, u32> dynamic_vertex_input;
176 BitField<6, 1, u32> ndc_minus_one_to_one; 192 BitField<6, 1, u32> xfb_enabled;
177 BitField<7, 2, u32> polygon_mode; 193 BitField<7, 1, u32> ndc_minus_one_to_one;
178 BitField<9, 5, u32> patch_control_points_minus_one; 194 BitField<8, 2, u32> polygon_mode;
179 BitField<14, 2, u32> tessellation_primitive; 195 BitField<10, 2, u32> tessellation_primitive;
180 BitField<16, 2, u32> tessellation_spacing; 196 BitField<12, 2, u32> tessellation_spacing;
181 BitField<18, 1, u32> tessellation_clockwise; 197 BitField<14, 1, u32> tessellation_clockwise;
182 BitField<19, 1, u32> logic_op_enable; 198 BitField<15, 5, u32> patch_control_points_minus_one;
183 BitField<20, 4, u32> logic_op; 199
184 BitField<24, 4, Maxwell::PrimitiveTopology> topology; 200 BitField<24, 4, Maxwell::PrimitiveTopology> topology;
185 BitField<28, 4, Tegra::Texture::MsaaMode> msaa_mode; 201 BitField<28, 4, Tegra::Texture::MsaaMode> msaa_mode;
186 }; 202 };
187 union { 203 union {
188 u32 raw2; 204 u32 raw2;
189 BitField<0, 1, u32> rasterize_enable;
190 BitField<1, 3, u32> alpha_test_func; 205 BitField<1, 3, u32> alpha_test_func;
191 BitField<4, 1, u32> early_z; 206 BitField<4, 1, u32> early_z;
192 BitField<5, 1, u32> depth_enabled; 207 BitField<5, 1, u32> depth_enabled;
@@ -197,25 +212,28 @@ struct FixedPipelineState {
197 BitField<14, 1, u32> smooth_lines; 212 BitField<14, 1, u32> smooth_lines;
198 BitField<15, 1, u32> alpha_to_coverage_enabled; 213 BitField<15, 1, u32> alpha_to_coverage_enabled;
199 BitField<16, 1, u32> alpha_to_one_enabled; 214 BitField<16, 1, u32> alpha_to_one_enabled;
215 BitField<17, 3, Tegra::Engines::Maxwell3D::EngineHint> app_stage;
200 }; 216 };
201 std::array<u8, Maxwell::NumRenderTargets> color_formats; 217 std::array<u8, Maxwell::NumRenderTargets> color_formats;
202 218
203 u32 alpha_test_ref; 219 u32 alpha_test_ref;
204 u32 point_size; 220 u32 point_size;
205 std::array<BlendingAttachment, Maxwell::NumRenderTargets> attachments;
206 std::array<u16, Maxwell::NumViewports> viewport_swizzles; 221 std::array<u16, Maxwell::NumViewports> viewport_swizzles;
207 union { 222 union {
208 u64 attribute_types; // Used with VK_EXT_vertex_input_dynamic_state 223 u64 attribute_types; // Used with VK_EXT_vertex_input_dynamic_state
209 u64 enabled_divisors; 224 u64 enabled_divisors;
210 }; 225 };
226
227 DynamicState dynamic_state;
228 std::array<BlendingAttachment, Maxwell::NumRenderTargets> attachments;
211 std::array<VertexAttribute, Maxwell::NumVertexAttributes> attributes; 229 std::array<VertexAttribute, Maxwell::NumVertexAttributes> attributes;
212 std::array<u32, Maxwell::NumVertexArrays> binding_divisors; 230 std::array<u32, Maxwell::NumVertexArrays> binding_divisors;
231 // Vertex stride is a 12 bits value, we have 4 bits to spare per element
232 std::array<u16, Maxwell::NumVertexArrays> vertex_strides;
213 233
214 DynamicState dynamic_state;
215 VideoCommon::TransformFeedbackState xfb_state; 234 VideoCommon::TransformFeedbackState xfb_state;
216 235
217 void Refresh(Tegra::Engines::Maxwell3D& maxwell3d, bool has_extended_dynamic_state, 236 void Refresh(Tegra::Engines::Maxwell3D& maxwell3d, DynamicFeatures& features);
218 bool has_dynamic_vertex_input);
219 237
220 size_t Hash() const noexcept; 238 size_t Hash() const noexcept;
221 239
@@ -230,13 +248,17 @@ struct FixedPipelineState {
230 // When transform feedback is enabled, use the whole struct 248 // When transform feedback is enabled, use the whole struct
231 return sizeof(*this); 249 return sizeof(*this);
232 } 250 }
233 if (dynamic_vertex_input) { 251 if (dynamic_vertex_input && extended_dynamic_state_3_blend) {
234 // Exclude dynamic state and attributes 252 // Exclude dynamic state and attributes
253 return offsetof(FixedPipelineState, dynamic_state);
254 }
255 if (dynamic_vertex_input) {
256 // Exclude dynamic state
235 return offsetof(FixedPipelineState, attributes); 257 return offsetof(FixedPipelineState, attributes);
236 } 258 }
237 if (extended_dynamic_state) { 259 if (extended_dynamic_state) {
238 // Exclude dynamic state 260 // Exclude dynamic state
239 return offsetof(FixedPipelineState, dynamic_state); 261 return offsetof(FixedPipelineState, vertex_strides);
240 } 262 }
241 // Default 263 // Default
242 return offsetof(FixedPipelineState, xfb_state); 264 return offsetof(FixedPipelineState, xfb_state);
diff --git a/src/video_core/renderer_vulkan/vk_buffer_cache.cpp b/src/video_core/renderer_vulkan/vk_buffer_cache.cpp
index 6b54d7111..487d8b416 100644
--- a/src/video_core/renderer_vulkan/vk_buffer_cache.cpp
+++ b/src/video_core/renderer_vulkan/vk_buffer_cache.cpp
@@ -56,7 +56,8 @@ vk::Buffer CreateBuffer(const Device& device, u64 size) {
56 VK_BUFFER_USAGE_TRANSFER_SRC_BIT | VK_BUFFER_USAGE_TRANSFER_DST_BIT | 56 VK_BUFFER_USAGE_TRANSFER_SRC_BIT | VK_BUFFER_USAGE_TRANSFER_DST_BIT |
57 VK_BUFFER_USAGE_UNIFORM_TEXEL_BUFFER_BIT | VK_BUFFER_USAGE_STORAGE_TEXEL_BUFFER_BIT | 57 VK_BUFFER_USAGE_UNIFORM_TEXEL_BUFFER_BIT | VK_BUFFER_USAGE_STORAGE_TEXEL_BUFFER_BIT |
58 VK_BUFFER_USAGE_UNIFORM_BUFFER_BIT | VK_BUFFER_USAGE_STORAGE_BUFFER_BIT | 58 VK_BUFFER_USAGE_UNIFORM_BUFFER_BIT | VK_BUFFER_USAGE_STORAGE_BUFFER_BIT |
59 VK_BUFFER_USAGE_INDEX_BUFFER_BIT | VK_BUFFER_USAGE_VERTEX_BUFFER_BIT; 59 VK_BUFFER_USAGE_INDEX_BUFFER_BIT | VK_BUFFER_USAGE_VERTEX_BUFFER_BIT |
60 VK_BUFFER_USAGE_INDIRECT_BUFFER_BIT;
60 if (device.IsExtTransformFeedbackSupported()) { 61 if (device.IsExtTransformFeedbackSupported()) {
61 flags |= VK_BUFFER_USAGE_TRANSFORM_FEEDBACK_BUFFER_BIT_EXT; 62 flags |= VK_BUFFER_USAGE_TRANSFORM_FEEDBACK_BUFFER_BIT_EXT;
62 } 63 }
@@ -516,6 +517,7 @@ void BufferCacheRuntime::ReserveNullBuffer() {
516 if (device.IsExtTransformFeedbackSupported()) { 517 if (device.IsExtTransformFeedbackSupported()) {
517 create_info.usage |= VK_BUFFER_USAGE_TRANSFORM_FEEDBACK_BUFFER_BIT_EXT; 518 create_info.usage |= VK_BUFFER_USAGE_TRANSFORM_FEEDBACK_BUFFER_BIT_EXT;
518 } 519 }
520 create_info.usage |= VK_BUFFER_USAGE_INDIRECT_BUFFER_BIT;
519 null_buffer = device.GetLogical().CreateBuffer(create_info); 521 null_buffer = device.GetLogical().CreateBuffer(create_info);
520 if (device.HasDebuggingToolAttached()) { 522 if (device.HasDebuggingToolAttached()) {
521 null_buffer.SetObjectNameEXT("Null buffer"); 523 null_buffer.SetObjectNameEXT("Null buffer");
diff --git a/src/video_core/renderer_vulkan/vk_graphics_pipeline.cpp b/src/video_core/renderer_vulkan/vk_graphics_pipeline.cpp
index 515d8d869..d11383bf1 100644
--- a/src/video_core/renderer_vulkan/vk_graphics_pipeline.cpp
+++ b/src/video_core/renderer_vulkan/vk_graphics_pipeline.cpp
@@ -201,6 +201,22 @@ struct SimpleVertexSpec {
201 static constexpr bool has_images = false; 201 static constexpr bool has_images = false;
202}; 202};
203 203
204struct SimpleStorageSpec {
205 static constexpr std::array<bool, 5> enabled_stages{true, false, false, false, true};
206 static constexpr bool has_storage_buffers = true;
207 static constexpr bool has_texture_buffers = false;
208 static constexpr bool has_image_buffers = false;
209 static constexpr bool has_images = false;
210};
211
212struct SimpleImageSpec {
213 static constexpr std::array<bool, 5> enabled_stages{true, false, false, false, true};
214 static constexpr bool has_storage_buffers = false;
215 static constexpr bool has_texture_buffers = false;
216 static constexpr bool has_image_buffers = false;
217 static constexpr bool has_images = true;
218};
219
204struct DefaultSpec { 220struct DefaultSpec {
205 static constexpr std::array<bool, 5> enabled_stages{true, true, true, true, true}; 221 static constexpr std::array<bool, 5> enabled_stages{true, true, true, true, true};
206 static constexpr bool has_storage_buffers = true; 222 static constexpr bool has_storage_buffers = true;
@@ -211,7 +227,8 @@ struct DefaultSpec {
211 227
212ConfigureFuncPtr ConfigureFunc(const std::array<vk::ShaderModule, NUM_STAGES>& modules, 228ConfigureFuncPtr ConfigureFunc(const std::array<vk::ShaderModule, NUM_STAGES>& modules,
213 const std::array<Shader::Info, NUM_STAGES>& infos) { 229 const std::array<Shader::Info, NUM_STAGES>& infos) {
214 return FindSpec<SimpleVertexSpec, SimpleVertexFragmentSpec, DefaultSpec>(modules, infos); 230 return FindSpec<SimpleVertexSpec, SimpleVertexFragmentSpec, SimpleStorageSpec, SimpleImageSpec,
231 DefaultSpec>(modules, infos);
215} 232}
216} // Anonymous namespace 233} // Anonymous namespace
217 234
@@ -524,6 +541,8 @@ void GraphicsPipeline::MakePipeline(VkRenderPass render_pass) {
524 FixedPipelineState::DynamicState dynamic{}; 541 FixedPipelineState::DynamicState dynamic{};
525 if (!key.state.extended_dynamic_state) { 542 if (!key.state.extended_dynamic_state) {
526 dynamic = key.state.dynamic_state; 543 dynamic = key.state.dynamic_state;
544 } else {
545 dynamic.raw1 = key.state.dynamic_state.raw1;
527 } 546 }
528 static_vector<VkVertexInputBindingDescription, 32> vertex_bindings; 547 static_vector<VkVertexInputBindingDescription, 32> vertex_bindings;
529 static_vector<VkVertexInputBindingDivisorDescriptionEXT, 32> vertex_binding_divisors; 548 static_vector<VkVertexInputBindingDivisorDescriptionEXT, 32> vertex_binding_divisors;
@@ -561,7 +580,7 @@ void GraphicsPipeline::MakePipeline(VkRenderPass render_pass) {
561 instanced ? VK_VERTEX_INPUT_RATE_INSTANCE : VK_VERTEX_INPUT_RATE_VERTEX; 580 instanced ? VK_VERTEX_INPUT_RATE_INSTANCE : VK_VERTEX_INPUT_RATE_VERTEX;
562 vertex_bindings.push_back({ 581 vertex_bindings.push_back({
563 .binding = static_cast<u32>(index), 582 .binding = static_cast<u32>(index),
564 .stride = dynamic.vertex_strides[index], 583 .stride = key.state.vertex_strides[index],
565 .inputRate = rate, 584 .inputRate = rate,
566 }); 585 });
567 if (instanced) { 586 if (instanced) {
@@ -625,7 +644,7 @@ void GraphicsPipeline::MakePipeline(VkRenderPass render_pass) {
625 .pNext = nullptr, 644 .pNext = nullptr,
626 .flags = 0, 645 .flags = 0,
627 .topology = input_assembly_topology, 646 .topology = input_assembly_topology,
628 .primitiveRestartEnable = key.state.primitive_restart_enable != 0 && 647 .primitiveRestartEnable = dynamic.primitive_restart_enable != 0 &&
629 ((input_assembly_topology != VK_PRIMITIVE_TOPOLOGY_PATCH_LIST && 648 ((input_assembly_topology != VK_PRIMITIVE_TOPOLOGY_PATCH_LIST &&
630 device.IsTopologyListPrimitiveRestartSupported()) || 649 device.IsTopologyListPrimitiveRestartSupported()) ||
631 SupportsPrimitiveRestart(input_assembly_topology) || 650 SupportsPrimitiveRestart(input_assembly_topology) ||
@@ -672,15 +691,15 @@ void GraphicsPipeline::MakePipeline(VkRenderPass render_pass) {
672 .pNext = nullptr, 691 .pNext = nullptr,
673 .flags = 0, 692 .flags = 0,
674 .depthClampEnable = 693 .depthClampEnable =
675 static_cast<VkBool32>(key.state.depth_clamp_disabled == 0 ? VK_TRUE : VK_FALSE), 694 static_cast<VkBool32>(dynamic.depth_clamp_disabled == 0 ? VK_TRUE : VK_FALSE),
676 .rasterizerDiscardEnable = 695 .rasterizerDiscardEnable =
677 static_cast<VkBool32>(key.state.rasterize_enable == 0 ? VK_TRUE : VK_FALSE), 696 static_cast<VkBool32>(dynamic.rasterize_enable == 0 ? VK_TRUE : VK_FALSE),
678 .polygonMode = 697 .polygonMode =
679 MaxwellToVK::PolygonMode(FixedPipelineState::UnpackPolygonMode(key.state.polygon_mode)), 698 MaxwellToVK::PolygonMode(FixedPipelineState::UnpackPolygonMode(key.state.polygon_mode)),
680 .cullMode = static_cast<VkCullModeFlags>( 699 .cullMode = static_cast<VkCullModeFlags>(
681 dynamic.cull_enable ? MaxwellToVK::CullFace(dynamic.CullFace()) : VK_CULL_MODE_NONE), 700 dynamic.cull_enable ? MaxwellToVK::CullFace(dynamic.CullFace()) : VK_CULL_MODE_NONE),
682 .frontFace = MaxwellToVK::FrontFace(dynamic.FrontFace()), 701 .frontFace = MaxwellToVK::FrontFace(dynamic.FrontFace()),
683 .depthBiasEnable = key.state.depth_bias_enable, 702 .depthBiasEnable = (dynamic.depth_bias_enable == 0 ? VK_TRUE : VK_FALSE),
684 .depthBiasConstantFactor = 0.0f, 703 .depthBiasConstantFactor = 0.0f,
685 .depthBiasClamp = 0.0f, 704 .depthBiasClamp = 0.0f,
686 .depthBiasSlopeFactor = 0.0f, 705 .depthBiasSlopeFactor = 0.0f,
@@ -782,13 +801,13 @@ void GraphicsPipeline::MakePipeline(VkRenderPass render_pass) {
782 .sType = VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO, 801 .sType = VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO,
783 .pNext = nullptr, 802 .pNext = nullptr,
784 .flags = 0, 803 .flags = 0,
785 .logicOpEnable = key.state.logic_op_enable != 0, 804 .logicOpEnable = dynamic.logic_op_enable != 0,
786 .logicOp = static_cast<VkLogicOp>(key.state.logic_op.Value()), 805 .logicOp = static_cast<VkLogicOp>(dynamic.logic_op.Value()),
787 .attachmentCount = static_cast<u32>(cb_attachments.size()), 806 .attachmentCount = static_cast<u32>(cb_attachments.size()),
788 .pAttachments = cb_attachments.data(), 807 .pAttachments = cb_attachments.data(),
789 .blendConstants = {}, 808 .blendConstants = {},
790 }; 809 };
791 static_vector<VkDynamicState, 19> dynamic_states{ 810 static_vector<VkDynamicState, 28> dynamic_states{
792 VK_DYNAMIC_STATE_VIEWPORT, VK_DYNAMIC_STATE_SCISSOR, 811 VK_DYNAMIC_STATE_VIEWPORT, VK_DYNAMIC_STATE_SCISSOR,
793 VK_DYNAMIC_STATE_DEPTH_BIAS, VK_DYNAMIC_STATE_BLEND_CONSTANTS, 812 VK_DYNAMIC_STATE_DEPTH_BIAS, VK_DYNAMIC_STATE_BLEND_CONSTANTS,
794 VK_DYNAMIC_STATE_DEPTH_BOUNDS, VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK, 813 VK_DYNAMIC_STATE_DEPTH_BOUNDS, VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK,
@@ -811,6 +830,32 @@ void GraphicsPipeline::MakePipeline(VkRenderPass render_pass) {
811 dynamic_states.push_back(VK_DYNAMIC_STATE_VERTEX_INPUT_EXT); 830 dynamic_states.push_back(VK_DYNAMIC_STATE_VERTEX_INPUT_EXT);
812 } 831 }
813 dynamic_states.insert(dynamic_states.end(), extended.begin(), extended.end()); 832 dynamic_states.insert(dynamic_states.end(), extended.begin(), extended.end());
833 if (key.state.extended_dynamic_state_2) {
834 static constexpr std::array extended2{
835 VK_DYNAMIC_STATE_DEPTH_BIAS_ENABLE_EXT,
836 VK_DYNAMIC_STATE_PRIMITIVE_RESTART_ENABLE_EXT,
837 VK_DYNAMIC_STATE_RASTERIZER_DISCARD_ENABLE_EXT,
838 };
839 dynamic_states.insert(dynamic_states.end(), extended2.begin(), extended2.end());
840 }
841 if (key.state.extended_dynamic_state_2_extra) {
842 dynamic_states.push_back(VK_DYNAMIC_STATE_LOGIC_OP_EXT);
843 }
844 if (key.state.extended_dynamic_state_3_blend) {
845 static constexpr std::array extended3{
846 VK_DYNAMIC_STATE_COLOR_BLEND_ENABLE_EXT,
847 VK_DYNAMIC_STATE_COLOR_BLEND_EQUATION_EXT,
848 VK_DYNAMIC_STATE_COLOR_WRITE_MASK_EXT,
849 };
850 dynamic_states.insert(dynamic_states.end(), extended3.begin(), extended3.end());
851 }
852 if (key.state.extended_dynamic_state_3_enables) {
853 static constexpr std::array extended3{
854 VK_DYNAMIC_STATE_DEPTH_CLAMP_ENABLE_EXT,
855 VK_DYNAMIC_STATE_LOGIC_OP_ENABLE_EXT,
856 };
857 dynamic_states.insert(dynamic_states.end(), extended3.begin(), extended3.end());
858 }
814 } 859 }
815 const VkPipelineDynamicStateCreateInfo dynamic_state_ci{ 860 const VkPipelineDynamicStateCreateInfo dynamic_state_ci{
816 .sType = VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO, 861 .sType = VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO,
diff --git a/src/video_core/renderer_vulkan/vk_pipeline_cache.cpp b/src/video_core/renderer_vulkan/vk_pipeline_cache.cpp
index e7262420c..3046b72ab 100644
--- a/src/video_core/renderer_vulkan/vk_pipeline_cache.cpp
+++ b/src/video_core/renderer_vulkan/vk_pipeline_cache.cpp
@@ -54,7 +54,7 @@ using VideoCommon::FileEnvironment;
54using VideoCommon::GenericEnvironment; 54using VideoCommon::GenericEnvironment;
55using VideoCommon::GraphicsEnvironment; 55using VideoCommon::GraphicsEnvironment;
56 56
57constexpr u32 CACHE_VERSION = 8; 57constexpr u32 CACHE_VERSION = 10;
58 58
59template <typename Container> 59template <typename Container>
60auto MakeSpan(Container& container) { 60auto MakeSpan(Container& container) {
@@ -351,6 +351,15 @@ PipelineCache::PipelineCache(RasterizerVulkan& rasterizer_, const Device& device
351 LOG_WARNING(Render_Vulkan, "maxVertexInputBindings is too low: {} < {}", 351 LOG_WARNING(Render_Vulkan, "maxVertexInputBindings is too low: {} < {}",
352 device.GetMaxVertexInputBindings(), Maxwell::NumVertexArrays); 352 device.GetMaxVertexInputBindings(), Maxwell::NumVertexArrays);
353 } 353 }
354
355 dynamic_features = DynamicFeatures{
356 .has_extended_dynamic_state = device.IsExtExtendedDynamicStateSupported(),
357 .has_extended_dynamic_state_2 = device.IsExtExtendedDynamicState2Supported(),
358 .has_extended_dynamic_state_2_extra = device.IsExtExtendedDynamicState2ExtrasSupported(),
359 .has_extended_dynamic_state_3_blend = device.IsExtExtendedDynamicState3BlendingSupported(),
360 .has_extended_dynamic_state_3_enables = device.IsExtExtendedDynamicState3EnablesSupported(),
361 .has_dynamic_vertex_input = device.IsExtVertexInputDynamicStateSupported(),
362 };
354} 363}
355 364
356PipelineCache::~PipelineCache() = default; 365PipelineCache::~PipelineCache() = default;
@@ -362,8 +371,7 @@ GraphicsPipeline* PipelineCache::CurrentGraphicsPipeline() {
362 current_pipeline = nullptr; 371 current_pipeline = nullptr;
363 return nullptr; 372 return nullptr;
364 } 373 }
365 graphics_key.state.Refresh(*maxwell3d, device.IsExtExtendedDynamicStateSupported(), 374 graphics_key.state.Refresh(*maxwell3d, dynamic_features);
366 device.IsExtVertexInputDynamicStateSupported());
367 375
368 if (current_pipeline) { 376 if (current_pipeline) {
369 GraphicsPipeline* const next{current_pipeline->Next(graphics_key)}; 377 GraphicsPipeline* const next{current_pipeline->Next(graphics_key)};
@@ -439,14 +447,21 @@ void PipelineCache::LoadDiskResources(u64 title_id, std::stop_token stop_loading
439 }); 447 });
440 ++state.total; 448 ++state.total;
441 }}; 449 }};
442 const bool extended_dynamic_state = device.IsExtExtendedDynamicStateSupported();
443 const bool dynamic_vertex_input = device.IsExtVertexInputDynamicStateSupported();
444 const auto load_graphics{[&](std::ifstream& file, std::vector<FileEnvironment> envs) { 450 const auto load_graphics{[&](std::ifstream& file, std::vector<FileEnvironment> envs) {
445 GraphicsPipelineCacheKey key; 451 GraphicsPipelineCacheKey key;
446 file.read(reinterpret_cast<char*>(&key), sizeof(key)); 452 file.read(reinterpret_cast<char*>(&key), sizeof(key));
447 453
448 if ((key.state.extended_dynamic_state != 0) != extended_dynamic_state || 454 if ((key.state.extended_dynamic_state != 0) !=
449 (key.state.dynamic_vertex_input != 0) != dynamic_vertex_input) { 455 dynamic_features.has_extended_dynamic_state ||
456 (key.state.extended_dynamic_state_2 != 0) !=
457 dynamic_features.has_extended_dynamic_state_2 ||
458 (key.state.extended_dynamic_state_2_extra != 0) !=
459 dynamic_features.has_extended_dynamic_state_2_extra ||
460 (key.state.extended_dynamic_state_3_blend != 0) !=
461 dynamic_features.has_extended_dynamic_state_3_blend ||
462 (key.state.extended_dynamic_state_3_enables != 0) !=
463 dynamic_features.has_extended_dynamic_state_3_enables ||
464 (key.state.dynamic_vertex_input != 0) != dynamic_features.has_dynamic_vertex_input) {
450 return; 465 return;
451 } 466 }
452 workers.QueueWork([this, key, envs = std::move(envs), &state, &callback]() mutable { 467 workers.QueueWork([this, key, envs = std::move(envs), &state, &callback]() mutable {
diff --git a/src/video_core/renderer_vulkan/vk_pipeline_cache.h b/src/video_core/renderer_vulkan/vk_pipeline_cache.h
index 61f9e9366..b4f593ef5 100644
--- a/src/video_core/renderer_vulkan/vk_pipeline_cache.h
+++ b/src/video_core/renderer_vulkan/vk_pipeline_cache.h
@@ -160,6 +160,7 @@ private:
160 160
161 Common::ThreadWorker workers; 161 Common::ThreadWorker workers;
162 Common::ThreadWorker serialization_thread; 162 Common::ThreadWorker serialization_thread;
163 DynamicFeatures dynamic_features;
163}; 164};
164 165
165} // namespace Vulkan 166} // namespace Vulkan
diff --git a/src/video_core/renderer_vulkan/vk_rasterizer.cpp b/src/video_core/renderer_vulkan/vk_rasterizer.cpp
index ac1eb9895..242bf9602 100644
--- a/src/video_core/renderer_vulkan/vk_rasterizer.cpp
+++ b/src/video_core/renderer_vulkan/vk_rasterizer.cpp
@@ -180,7 +180,8 @@ RasterizerVulkan::RasterizerVulkan(Core::Frontend::EmuWindow& emu_window_, Tegra
180 180
181RasterizerVulkan::~RasterizerVulkan() = default; 181RasterizerVulkan::~RasterizerVulkan() = default;
182 182
183void RasterizerVulkan::Draw(bool is_indexed, u32 instance_count) { 183template <typename Func>
184void RasterizerVulkan::PrepareDraw(bool is_indexed, Func&& draw_func) {
184 MICROPROFILE_SCOPE(Vulkan_Drawing); 185 MICROPROFILE_SCOPE(Vulkan_Drawing);
185 186
186 SCOPE_EXIT({ gpu.TickWork(); }); 187 SCOPE_EXIT({ gpu.TickWork(); });
@@ -201,20 +202,67 @@ void RasterizerVulkan::Draw(bool is_indexed, u32 instance_count) {
201 202
202 UpdateDynamicStates(); 203 UpdateDynamicStates();
203 204
204 const auto& draw_state = maxwell3d->draw_manager->GetDrawState(); 205 draw_func();
205 const u32 num_instances{instance_count}; 206
206 const DrawParams draw_params{MakeDrawParams(draw_state, num_instances, is_indexed)}; 207 EndTransformFeedback();
207 scheduler.Record([draw_params](vk::CommandBuffer cmdbuf) { 208}
208 if (draw_params.is_indexed) { 209
209 cmdbuf.DrawIndexed(draw_params.num_vertices, draw_params.num_instances, 210void RasterizerVulkan::Draw(bool is_indexed, u32 instance_count) {
210 draw_params.first_index, draw_params.base_vertex, 211 PrepareDraw(is_indexed, [this, is_indexed, instance_count] {
211 draw_params.base_instance); 212 const auto& draw_state = maxwell3d->draw_manager->GetDrawState();
212 } else { 213 const u32 num_instances{instance_count};
213 cmdbuf.Draw(draw_params.num_vertices, draw_params.num_instances, 214 const DrawParams draw_params{MakeDrawParams(draw_state, num_instances, is_indexed)};
214 draw_params.base_vertex, draw_params.base_instance); 215 scheduler.Record([draw_params](vk::CommandBuffer cmdbuf) {
216 if (draw_params.is_indexed) {
217 cmdbuf.DrawIndexed(draw_params.num_vertices, draw_params.num_instances,
218 draw_params.first_index, draw_params.base_vertex,
219 draw_params.base_instance);
220 } else {
221 cmdbuf.Draw(draw_params.num_vertices, draw_params.num_instances,
222 draw_params.base_vertex, draw_params.base_instance);
223 }
224 });
225 });
226}
227
228void RasterizerVulkan::DrawIndirect() {
229 const auto& params = maxwell3d->draw_manager->GetIndirectParams();
230 buffer_cache.SetDrawIndirect(&params);
231 PrepareDraw(params.is_indexed, [this, &params] {
232 const auto indirect_buffer = buffer_cache.GetDrawIndirectBuffer();
233 const auto& buffer = indirect_buffer.first;
234 const auto& offset = indirect_buffer.second;
235 if (params.include_count) {
236 const auto count = buffer_cache.GetDrawIndirectCount();
237 const auto& draw_buffer = count.first;
238 const auto& offset_base = count.second;
239 scheduler.Record([draw_buffer_obj = draw_buffer->Handle(),
240 buffer_obj = buffer->Handle(), offset_base, offset,
241 params](vk::CommandBuffer cmdbuf) {
242 if (params.is_indexed) {
243 cmdbuf.DrawIndexedIndirectCount(
244 buffer_obj, offset, draw_buffer_obj, offset_base,
245 static_cast<u32>(params.max_draw_counts), static_cast<u32>(params.stride));
246 } else {
247 cmdbuf.DrawIndirectCount(buffer_obj, offset, draw_buffer_obj, offset_base,
248 static_cast<u32>(params.max_draw_counts),
249 static_cast<u32>(params.stride));
250 }
251 });
252 return;
215 } 253 }
254 scheduler.Record([buffer_obj = buffer->Handle(), offset, params](vk::CommandBuffer cmdbuf) {
255 if (params.is_indexed) {
256 cmdbuf.DrawIndexedIndirect(buffer_obj, offset,
257 static_cast<u32>(params.max_draw_counts),
258 static_cast<u32>(params.stride));
259 } else {
260 cmdbuf.DrawIndirect(buffer_obj, offset, static_cast<u32>(params.max_draw_counts),
261 static_cast<u32>(params.stride));
262 }
263 });
216 }); 264 });
217 EndTransformFeedback(); 265 buffer_cache.SetDrawIndirect(nullptr);
218} 266}
219 267
220void RasterizerVulkan::Clear(u32 layer_count) { 268void RasterizerVulkan::Clear(u32 layer_count) {
@@ -379,44 +427,58 @@ void Vulkan::RasterizerVulkan::DisableGraphicsUniformBuffer(size_t stage, u32 in
379 427
380void RasterizerVulkan::FlushAll() {} 428void RasterizerVulkan::FlushAll() {}
381 429
382void RasterizerVulkan::FlushRegion(VAddr addr, u64 size) { 430void RasterizerVulkan::FlushRegion(VAddr addr, u64 size, VideoCommon::CacheType which) {
383 if (addr == 0 || size == 0) { 431 if (addr == 0 || size == 0) {
384 return; 432 return;
385 } 433 }
386 { 434 if (True(which & VideoCommon::CacheType::TextureCache)) {
387 std::scoped_lock lock{texture_cache.mutex}; 435 std::scoped_lock lock{texture_cache.mutex};
388 texture_cache.DownloadMemory(addr, size); 436 texture_cache.DownloadMemory(addr, size);
389 } 437 }
390 { 438 if ((True(which & VideoCommon::CacheType::BufferCache))) {
391 std::scoped_lock lock{buffer_cache.mutex}; 439 std::scoped_lock lock{buffer_cache.mutex};
392 buffer_cache.DownloadMemory(addr, size); 440 buffer_cache.DownloadMemory(addr, size);
393 } 441 }
394 query_cache.FlushRegion(addr, size); 442 if ((True(which & VideoCommon::CacheType::QueryCache))) {
443 query_cache.FlushRegion(addr, size);
444 }
395} 445}
396 446
397bool RasterizerVulkan::MustFlushRegion(VAddr addr, u64 size) { 447bool RasterizerVulkan::MustFlushRegion(VAddr addr, u64 size, VideoCommon::CacheType which) {
398 std::scoped_lock lock{texture_cache.mutex, buffer_cache.mutex}; 448 if ((True(which & VideoCommon::CacheType::BufferCache))) {
449 std::scoped_lock lock{buffer_cache.mutex};
450 if (buffer_cache.IsRegionGpuModified(addr, size)) {
451 return true;
452 }
453 }
399 if (!Settings::IsGPULevelHigh()) { 454 if (!Settings::IsGPULevelHigh()) {
400 return buffer_cache.IsRegionGpuModified(addr, size); 455 return false;
456 }
457 if (True(which & VideoCommon::CacheType::TextureCache)) {
458 std::scoped_lock lock{texture_cache.mutex};
459 return texture_cache.IsRegionGpuModified(addr, size);
401 } 460 }
402 return texture_cache.IsRegionGpuModified(addr, size) || 461 return false;
403 buffer_cache.IsRegionGpuModified(addr, size);
404} 462}
405 463
406void RasterizerVulkan::InvalidateRegion(VAddr addr, u64 size) { 464void RasterizerVulkan::InvalidateRegion(VAddr addr, u64 size, VideoCommon::CacheType which) {
407 if (addr == 0 || size == 0) { 465 if (addr == 0 || size == 0) {
408 return; 466 return;
409 } 467 }
410 { 468 if (True(which & VideoCommon::CacheType::TextureCache)) {
411 std::scoped_lock lock{texture_cache.mutex}; 469 std::scoped_lock lock{texture_cache.mutex};
412 texture_cache.WriteMemory(addr, size); 470 texture_cache.WriteMemory(addr, size);
413 } 471 }
414 { 472 if ((True(which & VideoCommon::CacheType::BufferCache))) {
415 std::scoped_lock lock{buffer_cache.mutex}; 473 std::scoped_lock lock{buffer_cache.mutex};
416 buffer_cache.WriteMemory(addr, size); 474 buffer_cache.WriteMemory(addr, size);
417 } 475 }
418 pipeline_cache.InvalidateRegion(addr, size); 476 if ((True(which & VideoCommon::CacheType::QueryCache))) {
419 query_cache.InvalidateRegion(addr, size); 477 query_cache.InvalidateRegion(addr, size);
478 }
479 if ((True(which & VideoCommon::CacheType::ShaderCache))) {
480 pipeline_cache.InvalidateRegion(addr, size);
481 }
420} 482}
421 483
422void RasterizerVulkan::OnCPUWrite(VAddr addr, u64 size) { 484void RasterizerVulkan::OnCPUWrite(VAddr addr, u64 size) {
@@ -481,11 +543,12 @@ void RasterizerVulkan::ReleaseFences() {
481 fence_manager.WaitPendingFences(); 543 fence_manager.WaitPendingFences();
482} 544}
483 545
484void RasterizerVulkan::FlushAndInvalidateRegion(VAddr addr, u64 size) { 546void RasterizerVulkan::FlushAndInvalidateRegion(VAddr addr, u64 size,
547 VideoCommon::CacheType which) {
485 if (Settings::IsGPULevelExtreme()) { 548 if (Settings::IsGPULevelExtreme()) {
486 FlushRegion(addr, size); 549 FlushRegion(addr, size, which);
487 } 550 }
488 InvalidateRegion(addr, size); 551 InvalidateRegion(addr, size, which);
489} 552}
490 553
491void RasterizerVulkan::WaitForIdle() { 554void RasterizerVulkan::WaitForIdle() {
@@ -541,6 +604,21 @@ void RasterizerVulkan::TickFrame() {
541 } 604 }
542} 605}
543 606
607bool RasterizerVulkan::AccelerateConditionalRendering() {
608 if (Settings::IsGPULevelHigh()) {
609 // TODO(Blinkhawk): Reimplement Host conditional rendering.
610 return false;
611 }
612 // Medium / Low Hack: stub any checks on queries writen into the buffer cache.
613 const GPUVAddr condition_address{maxwell3d->regs.render_enable.Address()};
614 Maxwell::ReportSemaphore::Compare cmp;
615 if (gpu_memory->IsMemoryDirty(condition_address, sizeof(cmp),
616 VideoCommon::CacheType::BufferCache)) {
617 return true;
618 }
619 return false;
620}
621
544bool RasterizerVulkan::AccelerateSurfaceCopy(const Tegra::Engines::Fermi2D::Surface& src, 622bool RasterizerVulkan::AccelerateSurfaceCopy(const Tegra::Engines::Fermi2D::Surface& src,
545 const Tegra::Engines::Fermi2D::Surface& dst, 623 const Tegra::Engines::Fermi2D::Surface& dst,
546 const Tegra::Engines::Fermi2D::Config& copy_config) { 624 const Tegra::Engines::Fermi2D::Config& copy_config) {
@@ -561,7 +639,7 @@ void RasterizerVulkan::AccelerateInlineToMemory(GPUVAddr address, size_t copy_si
561 } 639 }
562 gpu_memory->WriteBlockUnsafe(address, memory.data(), copy_size); 640 gpu_memory->WriteBlockUnsafe(address, memory.data(), copy_size);
563 { 641 {
564 std::unique_lock<std::mutex> lock{buffer_cache.mutex}; 642 std::unique_lock<std::recursive_mutex> lock{buffer_cache.mutex};
565 if (!buffer_cache.InlineMemory(*cpu_addr, copy_size, memory)) { 643 if (!buffer_cache.InlineMemory(*cpu_addr, copy_size, memory)) {
566 buffer_cache.WriteMemory(*cpu_addr, copy_size); 644 buffer_cache.WriteMemory(*cpu_addr, copy_size);
567 } 645 }
@@ -639,16 +717,35 @@ void RasterizerVulkan::UpdateDynamicStates() {
639 UpdateLineWidth(regs); 717 UpdateLineWidth(regs);
640 if (device.IsExtExtendedDynamicStateSupported()) { 718 if (device.IsExtExtendedDynamicStateSupported()) {
641 UpdateCullMode(regs); 719 UpdateCullMode(regs);
642 UpdateDepthBoundsTestEnable(regs);
643 UpdateDepthTestEnable(regs);
644 UpdateDepthWriteEnable(regs);
645 UpdateDepthCompareOp(regs); 720 UpdateDepthCompareOp(regs);
646 UpdateFrontFace(regs); 721 UpdateFrontFace(regs);
647 UpdateStencilOp(regs); 722 UpdateStencilOp(regs);
648 UpdateStencilTestEnable(regs); 723
649 if (device.IsExtVertexInputDynamicStateSupported()) { 724 if (device.IsExtVertexInputDynamicStateSupported()) {
650 UpdateVertexInput(regs); 725 UpdateVertexInput(regs);
651 } 726 }
727
728 if (state_tracker.TouchStateEnable()) {
729 UpdateDepthBoundsTestEnable(regs);
730 UpdateDepthTestEnable(regs);
731 UpdateDepthWriteEnable(regs);
732 UpdateStencilTestEnable(regs);
733 if (device.IsExtExtendedDynamicState2Supported()) {
734 UpdatePrimitiveRestartEnable(regs);
735 UpdateRasterizerDiscardEnable(regs);
736 UpdateDepthBiasEnable(regs);
737 }
738 if (device.IsExtExtendedDynamicState3EnablesSupported()) {
739 UpdateLogicOpEnable(regs);
740 UpdateDepthClampEnable(regs);
741 }
742 }
743 if (device.IsExtExtendedDynamicState2ExtrasSupported()) {
744 UpdateLogicOp(regs);
745 }
746 if (device.IsExtExtendedDynamicState3Supported()) {
747 UpdateBlending(regs);
748 }
652 } 749 }
653} 750}
654 751
@@ -789,32 +886,92 @@ void RasterizerVulkan::UpdateStencilFaces(Tegra::Engines::Maxwell3D::Regs& regs)
789 if (!state_tracker.TouchStencilProperties()) { 886 if (!state_tracker.TouchStencilProperties()) {
790 return; 887 return;
791 } 888 }
792 if (regs.stencil_two_side_enable) { 889 bool update_references = state_tracker.TouchStencilReference();
793 // Separate values per face 890 bool update_write_mask = state_tracker.TouchStencilWriteMask();
794 scheduler.Record( 891 bool update_compare_masks = state_tracker.TouchStencilCompare();
795 [front_ref = regs.stencil_front_ref, front_write_mask = regs.stencil_front_mask, 892 if (state_tracker.TouchStencilSide(regs.stencil_two_side_enable != 0)) {
796 front_test_mask = regs.stencil_front_func_mask, back_ref = regs.stencil_back_ref, 893 update_references = true;
797 back_write_mask = regs.stencil_back_mask, 894 update_write_mask = true;
798 back_test_mask = regs.stencil_back_func_mask](vk::CommandBuffer cmdbuf) { 895 update_compare_masks = true;
896 }
897 if (update_references) {
898 [&]() {
899 if (regs.stencil_two_side_enable) {
900 if (!state_tracker.CheckStencilReferenceFront(regs.stencil_front_ref) &&
901 !state_tracker.CheckStencilReferenceBack(regs.stencil_back_ref)) {
902 return;
903 }
904 } else {
905 if (!state_tracker.CheckStencilReferenceFront(regs.stencil_front_ref)) {
906 return;
907 }
908 }
909 scheduler.Record([front_ref = regs.stencil_front_ref, back_ref = regs.stencil_back_ref,
910 two_sided = regs.stencil_two_side_enable](vk::CommandBuffer cmdbuf) {
911 const bool set_back = two_sided && front_ref != back_ref;
799 // Front face 912 // Front face
800 cmdbuf.SetStencilReference(VK_STENCIL_FACE_FRONT_BIT, front_ref); 913 cmdbuf.SetStencilReference(set_back ? VK_STENCIL_FACE_FRONT_BIT
801 cmdbuf.SetStencilWriteMask(VK_STENCIL_FACE_FRONT_BIT, front_write_mask); 914 : VK_STENCIL_FACE_FRONT_AND_BACK,
802 cmdbuf.SetStencilCompareMask(VK_STENCIL_FACE_FRONT_BIT, front_test_mask); 915 front_ref);
803 916 if (set_back) {
804 // Back face 917 cmdbuf.SetStencilReference(VK_STENCIL_FACE_BACK_BIT, back_ref);
805 cmdbuf.SetStencilReference(VK_STENCIL_FACE_BACK_BIT, back_ref); 918 }
806 cmdbuf.SetStencilWriteMask(VK_STENCIL_FACE_BACK_BIT, back_write_mask);
807 cmdbuf.SetStencilCompareMask(VK_STENCIL_FACE_BACK_BIT, back_test_mask);
808 }); 919 });
809 } else { 920 }();
810 // Front face defines both faces 921 }
811 scheduler.Record([ref = regs.stencil_front_ref, write_mask = regs.stencil_front_mask, 922 if (update_write_mask) {
812 test_mask = regs.stencil_front_func_mask](vk::CommandBuffer cmdbuf) { 923 [&]() {
813 cmdbuf.SetStencilReference(VK_STENCIL_FACE_FRONT_AND_BACK, ref); 924 if (regs.stencil_two_side_enable) {
814 cmdbuf.SetStencilWriteMask(VK_STENCIL_FACE_FRONT_AND_BACK, write_mask); 925 if (!state_tracker.CheckStencilWriteMaskFront(regs.stencil_front_mask) &&
815 cmdbuf.SetStencilCompareMask(VK_STENCIL_FACE_FRONT_AND_BACK, test_mask); 926 !state_tracker.CheckStencilWriteMaskBack(regs.stencil_back_mask)) {
816 }); 927 return;
928 }
929 } else {
930 if (!state_tracker.CheckStencilWriteMaskFront(regs.stencil_front_mask)) {
931 return;
932 }
933 }
934 scheduler.Record([front_write_mask = regs.stencil_front_mask,
935 back_write_mask = regs.stencil_back_mask,
936 two_sided = regs.stencil_two_side_enable](vk::CommandBuffer cmdbuf) {
937 const bool set_back = two_sided && front_write_mask != back_write_mask;
938 // Front face
939 cmdbuf.SetStencilWriteMask(set_back ? VK_STENCIL_FACE_FRONT_BIT
940 : VK_STENCIL_FACE_FRONT_AND_BACK,
941 front_write_mask);
942 if (set_back) {
943 cmdbuf.SetStencilWriteMask(VK_STENCIL_FACE_BACK_BIT, back_write_mask);
944 }
945 });
946 }();
947 }
948 if (update_compare_masks) {
949 [&]() {
950 if (regs.stencil_two_side_enable) {
951 if (!state_tracker.CheckStencilCompareMaskFront(regs.stencil_front_func_mask) &&
952 !state_tracker.CheckStencilCompareMaskBack(regs.stencil_back_func_mask)) {
953 return;
954 }
955 } else {
956 if (!state_tracker.CheckStencilCompareMaskFront(regs.stencil_front_func_mask)) {
957 return;
958 }
959 }
960 scheduler.Record([front_test_mask = regs.stencil_front_func_mask,
961 back_test_mask = regs.stencil_back_func_mask,
962 two_sided = regs.stencil_two_side_enable](vk::CommandBuffer cmdbuf) {
963 const bool set_back = two_sided && front_test_mask != back_test_mask;
964 // Front face
965 cmdbuf.SetStencilCompareMask(set_back ? VK_STENCIL_FACE_FRONT_BIT
966 : VK_STENCIL_FACE_FRONT_AND_BACK,
967 front_test_mask);
968 if (set_back) {
969 cmdbuf.SetStencilCompareMask(VK_STENCIL_FACE_BACK_BIT, back_test_mask);
970 }
971 });
972 }();
817 } 973 }
974 state_tracker.ClearStencilReset();
818} 975}
819 976
820void RasterizerVulkan::UpdateLineWidth(Tegra::Engines::Maxwell3D::Regs& regs) { 977void RasterizerVulkan::UpdateLineWidth(Tegra::Engines::Maxwell3D::Regs& regs) {
@@ -868,6 +1025,82 @@ void RasterizerVulkan::UpdateDepthWriteEnable(Tegra::Engines::Maxwell3D::Regs& r
868 }); 1025 });
869} 1026}
870 1027
1028void RasterizerVulkan::UpdatePrimitiveRestartEnable(Tegra::Engines::Maxwell3D::Regs& regs) {
1029 if (!state_tracker.TouchPrimitiveRestartEnable()) {
1030 return;
1031 }
1032 scheduler.Record([enable = regs.primitive_restart.enabled](vk::CommandBuffer cmdbuf) {
1033 cmdbuf.SetPrimitiveRestartEnableEXT(enable);
1034 });
1035}
1036
1037void RasterizerVulkan::UpdateRasterizerDiscardEnable(Tegra::Engines::Maxwell3D::Regs& regs) {
1038 if (!state_tracker.TouchRasterizerDiscardEnable()) {
1039 return;
1040 }
1041 scheduler.Record([disable = regs.rasterize_enable](vk::CommandBuffer cmdbuf) {
1042 cmdbuf.SetRasterizerDiscardEnableEXT(disable == 0);
1043 });
1044}
1045
1046void RasterizerVulkan::UpdateDepthBiasEnable(Tegra::Engines::Maxwell3D::Regs& regs) {
1047 if (!state_tracker.TouchDepthBiasEnable()) {
1048 return;
1049 }
1050 constexpr size_t POINT = 0;
1051 constexpr size_t LINE = 1;
1052 constexpr size_t POLYGON = 2;
1053 static constexpr std::array POLYGON_OFFSET_ENABLE_LUT = {
1054 POINT, // Points
1055 LINE, // Lines
1056 LINE, // LineLoop
1057 LINE, // LineStrip
1058 POLYGON, // Triangles
1059 POLYGON, // TriangleStrip
1060 POLYGON, // TriangleFan
1061 POLYGON, // Quads
1062 POLYGON, // QuadStrip
1063 POLYGON, // Polygon
1064 LINE, // LinesAdjacency
1065 LINE, // LineStripAdjacency
1066 POLYGON, // TrianglesAdjacency
1067 POLYGON, // TriangleStripAdjacency
1068 POLYGON, // Patches
1069 };
1070 const std::array enabled_lut{
1071 regs.polygon_offset_point_enable,
1072 regs.polygon_offset_line_enable,
1073 regs.polygon_offset_fill_enable,
1074 };
1075 const u32 topology_index = static_cast<u32>(maxwell3d->draw_manager->GetDrawState().topology);
1076 const u32 enable = enabled_lut[POLYGON_OFFSET_ENABLE_LUT[topology_index]];
1077 scheduler.Record(
1078 [enable](vk::CommandBuffer cmdbuf) { cmdbuf.SetDepthBiasEnableEXT(enable != 0); });
1079}
1080
1081void RasterizerVulkan::UpdateLogicOpEnable(Tegra::Engines::Maxwell3D::Regs& regs) {
1082 if (!state_tracker.TouchLogicOpEnable()) {
1083 return;
1084 }
1085 scheduler.Record([enable = regs.logic_op.enable](vk::CommandBuffer cmdbuf) {
1086 cmdbuf.SetLogicOpEnableEXT(enable != 0);
1087 });
1088}
1089
1090void RasterizerVulkan::UpdateDepthClampEnable(Tegra::Engines::Maxwell3D::Regs& regs) {
1091 if (!state_tracker.TouchDepthClampEnable()) {
1092 return;
1093 }
1094 bool is_enabled = !(regs.viewport_clip_control.geometry_clip ==
1095 Maxwell::ViewportClipControl::GeometryClip::Passthrough ||
1096 regs.viewport_clip_control.geometry_clip ==
1097 Maxwell::ViewportClipControl::GeometryClip::FrustumXYZ ||
1098 regs.viewport_clip_control.geometry_clip ==
1099 Maxwell::ViewportClipControl::GeometryClip::FrustumZ);
1100 scheduler.Record(
1101 [is_enabled](vk::CommandBuffer cmdbuf) { cmdbuf.SetDepthClampEnableEXT(is_enabled); });
1102}
1103
871void RasterizerVulkan::UpdateDepthCompareOp(Tegra::Engines::Maxwell3D::Regs& regs) { 1104void RasterizerVulkan::UpdateDepthCompareOp(Tegra::Engines::Maxwell3D::Regs& regs) {
872 if (!state_tracker.TouchDepthCompareOp()) { 1105 if (!state_tracker.TouchDepthCompareOp()) {
873 return; 1106 return;
@@ -925,6 +1158,78 @@ void RasterizerVulkan::UpdateStencilOp(Tegra::Engines::Maxwell3D::Regs& regs) {
925 } 1158 }
926} 1159}
927 1160
1161void RasterizerVulkan::UpdateLogicOp(Tegra::Engines::Maxwell3D::Regs& regs) {
1162 if (!state_tracker.TouchLogicOp()) {
1163 return;
1164 }
1165 const auto op_value = static_cast<u32>(regs.logic_op.op);
1166 auto op = op_value >= 0x1500 && op_value < 0x1510 ? static_cast<VkLogicOp>(op_value - 0x1500)
1167 : VK_LOGIC_OP_NO_OP;
1168 scheduler.Record([op](vk::CommandBuffer cmdbuf) { cmdbuf.SetLogicOpEXT(op); });
1169}
1170
1171void RasterizerVulkan::UpdateBlending(Tegra::Engines::Maxwell3D::Regs& regs) {
1172 if (!state_tracker.TouchBlending()) {
1173 return;
1174 }
1175
1176 if (state_tracker.TouchColorMask()) {
1177 std::array<VkColorComponentFlags, Maxwell::NumRenderTargets> setup_masks{};
1178 for (size_t index = 0; index < Maxwell::NumRenderTargets; index++) {
1179 const auto& mask = regs.color_mask[regs.color_mask_common ? 0 : index];
1180 auto& current = setup_masks[index];
1181 if (mask.R) {
1182 current |= VK_COLOR_COMPONENT_R_BIT;
1183 }
1184 if (mask.G) {
1185 current |= VK_COLOR_COMPONENT_G_BIT;
1186 }
1187 if (mask.B) {
1188 current |= VK_COLOR_COMPONENT_B_BIT;
1189 }
1190 if (mask.A) {
1191 current |= VK_COLOR_COMPONENT_A_BIT;
1192 }
1193 }
1194 scheduler.Record([setup_masks](vk::CommandBuffer cmdbuf) {
1195 cmdbuf.SetColorWriteMaskEXT(0, setup_masks);
1196 });
1197 }
1198
1199 if (state_tracker.TouchBlendEnable()) {
1200 std::array<VkBool32, Maxwell::NumRenderTargets> setup_enables{};
1201 std::ranges::transform(
1202 regs.blend.enable, setup_enables.begin(),
1203 [&](const auto& is_enabled) { return is_enabled != 0 ? VK_TRUE : VK_FALSE; });
1204 scheduler.Record([setup_enables](vk::CommandBuffer cmdbuf) {
1205 cmdbuf.SetColorBlendEnableEXT(0, setup_enables);
1206 });
1207 }
1208
1209 if (state_tracker.TouchBlendEquations()) {
1210 std::array<VkColorBlendEquationEXT, Maxwell::NumRenderTargets> setup_blends{};
1211 for (size_t index = 0; index < Maxwell::NumRenderTargets; index++) {
1212 const auto blend_setup = [&]<typename T>(const T& guest_blend) {
1213 auto& host_blend = setup_blends[index];
1214 host_blend.srcColorBlendFactor = MaxwellToVK::BlendFactor(guest_blend.color_source);
1215 host_blend.dstColorBlendFactor = MaxwellToVK::BlendFactor(guest_blend.color_dest);
1216 host_blend.colorBlendOp = MaxwellToVK::BlendEquation(guest_blend.color_op);
1217 host_blend.srcAlphaBlendFactor = MaxwellToVK::BlendFactor(guest_blend.alpha_source);
1218 host_blend.dstAlphaBlendFactor = MaxwellToVK::BlendFactor(guest_blend.alpha_dest);
1219 host_blend.alphaBlendOp = MaxwellToVK::BlendEquation(guest_blend.alpha_op);
1220 };
1221 if (!regs.blend_per_target_enabled) {
1222 blend_setup(regs.blend);
1223 continue;
1224 }
1225 blend_setup(regs.blend_per_target[index]);
1226 }
1227 scheduler.Record([setup_blends](vk::CommandBuffer cmdbuf) {
1228 cmdbuf.SetColorBlendEquationEXT(0, setup_blends);
1229 });
1230 }
1231}
1232
928void RasterizerVulkan::UpdateStencilTestEnable(Tegra::Engines::Maxwell3D::Regs& regs) { 1233void RasterizerVulkan::UpdateStencilTestEnable(Tegra::Engines::Maxwell3D::Regs& regs) {
929 if (!state_tracker.TouchStencilTestEnable()) { 1234 if (!state_tracker.TouchStencilTestEnable()) {
930 return; 1235 return;
diff --git a/src/video_core/renderer_vulkan/vk_rasterizer.h b/src/video_core/renderer_vulkan/vk_rasterizer.h
index ee483cfd9..c661e5b19 100644
--- a/src/video_core/renderer_vulkan/vk_rasterizer.h
+++ b/src/video_core/renderer_vulkan/vk_rasterizer.h
@@ -65,6 +65,7 @@ public:
65 ~RasterizerVulkan() override; 65 ~RasterizerVulkan() override;
66 66
67 void Draw(bool is_indexed, u32 instance_count) override; 67 void Draw(bool is_indexed, u32 instance_count) override;
68 void DrawIndirect() override;
68 void Clear(u32 layer_count) override; 69 void Clear(u32 layer_count) override;
69 void DispatchCompute() override; 70 void DispatchCompute() override;
70 void ResetCounter(VideoCore::QueryType type) override; 71 void ResetCounter(VideoCore::QueryType type) override;
@@ -72,9 +73,12 @@ public:
72 void BindGraphicsUniformBuffer(size_t stage, u32 index, GPUVAddr gpu_addr, u32 size) override; 73 void BindGraphicsUniformBuffer(size_t stage, u32 index, GPUVAddr gpu_addr, u32 size) override;
73 void DisableGraphicsUniformBuffer(size_t stage, u32 index) override; 74 void DisableGraphicsUniformBuffer(size_t stage, u32 index) override;
74 void FlushAll() override; 75 void FlushAll() override;
75 void FlushRegion(VAddr addr, u64 size) override; 76 void FlushRegion(VAddr addr, u64 size,
76 bool MustFlushRegion(VAddr addr, u64 size) override; 77 VideoCommon::CacheType which = VideoCommon::CacheType::All) override;
77 void InvalidateRegion(VAddr addr, u64 size) override; 78 bool MustFlushRegion(VAddr addr, u64 size,
79 VideoCommon::CacheType which = VideoCommon::CacheType::All) override;
80 void InvalidateRegion(VAddr addr, u64 size,
81 VideoCommon::CacheType which = VideoCommon::CacheType::All) override;
78 void OnCPUWrite(VAddr addr, u64 size) override; 82 void OnCPUWrite(VAddr addr, u64 size) override;
79 void InvalidateGPUCache() override; 83 void InvalidateGPUCache() override;
80 void UnmapMemory(VAddr addr, u64 size) override; 84 void UnmapMemory(VAddr addr, u64 size) override;
@@ -84,12 +88,14 @@ public:
84 void SignalSyncPoint(u32 value) override; 88 void SignalSyncPoint(u32 value) override;
85 void SignalReference() override; 89 void SignalReference() override;
86 void ReleaseFences() override; 90 void ReleaseFences() override;
87 void FlushAndInvalidateRegion(VAddr addr, u64 size) override; 91 void FlushAndInvalidateRegion(
92 VAddr addr, u64 size, VideoCommon::CacheType which = VideoCommon::CacheType::All) override;
88 void WaitForIdle() override; 93 void WaitForIdle() override;
89 void FragmentBarrier() override; 94 void FragmentBarrier() override;
90 void TiledCacheBarrier() override; 95 void TiledCacheBarrier() override;
91 void FlushCommands() override; 96 void FlushCommands() override;
92 void TickFrame() override; 97 void TickFrame() override;
98 bool AccelerateConditionalRendering() override;
93 bool AccelerateSurfaceCopy(const Tegra::Engines::Fermi2D::Surface& src, 99 bool AccelerateSurfaceCopy(const Tegra::Engines::Fermi2D::Surface& src,
94 const Tegra::Engines::Fermi2D::Surface& dst, 100 const Tegra::Engines::Fermi2D::Surface& dst,
95 const Tegra::Engines::Fermi2D::Config& copy_config) override; 101 const Tegra::Engines::Fermi2D::Config& copy_config) override;
@@ -114,6 +120,9 @@ private:
114 120
115 static constexpr VkDeviceSize DEFAULT_BUFFER_SIZE = 4 * sizeof(float); 121 static constexpr VkDeviceSize DEFAULT_BUFFER_SIZE = 4 * sizeof(float);
116 122
123 template <typename Func>
124 void PrepareDraw(bool is_indexed, Func&&);
125
117 void FlushWork(); 126 void FlushWork();
118 127
119 void UpdateDynamicStates(); 128 void UpdateDynamicStates();
@@ -135,9 +144,16 @@ private:
135 void UpdateDepthTestEnable(Tegra::Engines::Maxwell3D::Regs& regs); 144 void UpdateDepthTestEnable(Tegra::Engines::Maxwell3D::Regs& regs);
136 void UpdateDepthWriteEnable(Tegra::Engines::Maxwell3D::Regs& regs); 145 void UpdateDepthWriteEnable(Tegra::Engines::Maxwell3D::Regs& regs);
137 void UpdateDepthCompareOp(Tegra::Engines::Maxwell3D::Regs& regs); 146 void UpdateDepthCompareOp(Tegra::Engines::Maxwell3D::Regs& regs);
147 void UpdatePrimitiveRestartEnable(Tegra::Engines::Maxwell3D::Regs& regs);
148 void UpdateRasterizerDiscardEnable(Tegra::Engines::Maxwell3D::Regs& regs);
149 void UpdateDepthBiasEnable(Tegra::Engines::Maxwell3D::Regs& regs);
150 void UpdateLogicOpEnable(Tegra::Engines::Maxwell3D::Regs& regs);
151 void UpdateDepthClampEnable(Tegra::Engines::Maxwell3D::Regs& regs);
138 void UpdateFrontFace(Tegra::Engines::Maxwell3D::Regs& regs); 152 void UpdateFrontFace(Tegra::Engines::Maxwell3D::Regs& regs);
139 void UpdateStencilOp(Tegra::Engines::Maxwell3D::Regs& regs); 153 void UpdateStencilOp(Tegra::Engines::Maxwell3D::Regs& regs);
140 void UpdateStencilTestEnable(Tegra::Engines::Maxwell3D::Regs& regs); 154 void UpdateStencilTestEnable(Tegra::Engines::Maxwell3D::Regs& regs);
155 void UpdateLogicOp(Tegra::Engines::Maxwell3D::Regs& regs);
156 void UpdateBlending(Tegra::Engines::Maxwell3D::Regs& regs);
141 157
142 void UpdateVertexInput(Tegra::Engines::Maxwell3D::Regs& regs); 158 void UpdateVertexInput(Tegra::Engines::Maxwell3D::Regs& regs);
143 159
diff --git a/src/video_core/renderer_vulkan/vk_staging_buffer_pool.cpp b/src/video_core/renderer_vulkan/vk_staging_buffer_pool.cpp
index 06f68d09a..74ca77216 100644
--- a/src/video_core/renderer_vulkan/vk_staging_buffer_pool.cpp
+++ b/src/video_core/renderer_vulkan/vk_staging_buffer_pool.cpp
@@ -1,5 +1,5 @@
1// SPDX-FileCopyrightText: Copyright 2019 yuzu Emulator Project 1// SPDX-FileCopyrightText: Copyright 2022 yuzu Emulator Project
2// SPDX-License-Identifier: GPL-2.0-or-later 2// SPDX-License-Identifier: GPL-3.0-or-later
3 3
4#include <algorithm> 4#include <algorithm>
5#include <utility> 5#include <utility>
@@ -94,7 +94,8 @@ StagingBufferPool::StagingBufferPool(const Device& device_, MemoryAllocator& mem
94 .flags = 0, 94 .flags = 0,
95 .size = STREAM_BUFFER_SIZE, 95 .size = STREAM_BUFFER_SIZE,
96 .usage = VK_BUFFER_USAGE_TRANSFER_SRC_BIT | VK_BUFFER_USAGE_UNIFORM_BUFFER_BIT | 96 .usage = VK_BUFFER_USAGE_TRANSFER_SRC_BIT | VK_BUFFER_USAGE_UNIFORM_BUFFER_BIT |
97 VK_BUFFER_USAGE_INDEX_BUFFER_BIT | VK_BUFFER_USAGE_STORAGE_BUFFER_BIT, 97 VK_BUFFER_USAGE_INDEX_BUFFER_BIT | VK_BUFFER_USAGE_STORAGE_BUFFER_BIT |
98 VK_BUFFER_USAGE_TRANSFORM_FEEDBACK_BUFFER_BIT_EXT,
98 .sharingMode = VK_SHARING_MODE_EXCLUSIVE, 99 .sharingMode = VK_SHARING_MODE_EXCLUSIVE,
99 .queueFamilyIndexCount = 0, 100 .queueFamilyIndexCount = 0,
100 .pQueueFamilyIndices = nullptr, 101 .pQueueFamilyIndices = nullptr,
@@ -142,11 +143,23 @@ StagingBufferPool::StagingBufferPool(const Device& device_, MemoryAllocator& mem
142 143
143StagingBufferPool::~StagingBufferPool() = default; 144StagingBufferPool::~StagingBufferPool() = default;
144 145
145StagingBufferRef StagingBufferPool::Request(size_t size, MemoryUsage usage) { 146StagingBufferRef StagingBufferPool::Request(size_t size, MemoryUsage usage, bool deferred) {
146 if (usage == MemoryUsage::Upload && size <= MAX_STREAM_BUFFER_REQUEST_SIZE) { 147 if (!deferred && usage == MemoryUsage::Upload && size <= MAX_STREAM_BUFFER_REQUEST_SIZE) {
147 return GetStreamBuffer(size); 148 return GetStreamBuffer(size);
148 } 149 }
149 return GetStagingBuffer(size, usage); 150 return GetStagingBuffer(size, usage, deferred);
151}
152
153void StagingBufferPool::FreeDeferred(StagingBufferRef& ref) {
154 auto& entries = GetCache(ref.usage)[ref.log2_level].entries;
155 const auto is_this_one = [&ref](const StagingBuffer& entry) {
156 return entry.index == ref.index;
157 };
158 auto it = std::find_if(entries.begin(), entries.end(), is_this_one);
159 ASSERT(it != entries.end());
160 ASSERT(it->deferred);
161 it->tick = scheduler.CurrentTick();
162 it->deferred = false;
150} 163}
151 164
152void StagingBufferPool::TickFrame() { 165void StagingBufferPool::TickFrame() {
@@ -187,6 +200,9 @@ StagingBufferRef StagingBufferPool::GetStreamBuffer(size_t size) {
187 .buffer = *stream_buffer, 200 .buffer = *stream_buffer,
188 .offset = static_cast<VkDeviceSize>(offset), 201 .offset = static_cast<VkDeviceSize>(offset),
189 .mapped_span = std::span<u8>(stream_pointer + offset, size), 202 .mapped_span = std::span<u8>(stream_pointer + offset, size),
203 .usage{},
204 .log2_level{},
205 .index{},
190 }; 206 };
191} 207}
192 208
@@ -196,19 +212,21 @@ bool StagingBufferPool::AreRegionsActive(size_t region_begin, size_t region_end)
196 [gpu_tick](u64 sync_tick) { return gpu_tick < sync_tick; }); 212 [gpu_tick](u64 sync_tick) { return gpu_tick < sync_tick; });
197}; 213};
198 214
199StagingBufferRef StagingBufferPool::GetStagingBuffer(size_t size, MemoryUsage usage) { 215StagingBufferRef StagingBufferPool::GetStagingBuffer(size_t size, MemoryUsage usage,
200 if (const std::optional<StagingBufferRef> ref = TryGetReservedBuffer(size, usage)) { 216 bool deferred) {
217 if (const std::optional<StagingBufferRef> ref = TryGetReservedBuffer(size, usage, deferred)) {
201 return *ref; 218 return *ref;
202 } 219 }
203 return CreateStagingBuffer(size, usage); 220 return CreateStagingBuffer(size, usage, deferred);
204} 221}
205 222
206std::optional<StagingBufferRef> StagingBufferPool::TryGetReservedBuffer(size_t size, 223std::optional<StagingBufferRef> StagingBufferPool::TryGetReservedBuffer(size_t size,
207 MemoryUsage usage) { 224 MemoryUsage usage,
225 bool deferred) {
208 StagingBuffers& cache_level = GetCache(usage)[Common::Log2Ceil64(size)]; 226 StagingBuffers& cache_level = GetCache(usage)[Common::Log2Ceil64(size)];
209 227
210 const auto is_free = [this](const StagingBuffer& entry) { 228 const auto is_free = [this](const StagingBuffer& entry) {
211 return scheduler.IsFree(entry.tick); 229 return !entry.deferred && scheduler.IsFree(entry.tick);
212 }; 230 };
213 auto& entries = cache_level.entries; 231 auto& entries = cache_level.entries;
214 const auto hint_it = entries.begin() + cache_level.iterate_index; 232 const auto hint_it = entries.begin() + cache_level.iterate_index;
@@ -220,11 +238,14 @@ std::optional<StagingBufferRef> StagingBufferPool::TryGetReservedBuffer(size_t s
220 } 238 }
221 } 239 }
222 cache_level.iterate_index = std::distance(entries.begin(), it) + 1; 240 cache_level.iterate_index = std::distance(entries.begin(), it) + 1;
223 it->tick = scheduler.CurrentTick(); 241 it->tick = deferred ? std::numeric_limits<u64>::max() : scheduler.CurrentTick();
242 ASSERT(!it->deferred);
243 it->deferred = deferred;
224 return it->Ref(); 244 return it->Ref();
225} 245}
226 246
227StagingBufferRef StagingBufferPool::CreateStagingBuffer(size_t size, MemoryUsage usage) { 247StagingBufferRef StagingBufferPool::CreateStagingBuffer(size_t size, MemoryUsage usage,
248 bool deferred) {
228 const u32 log2 = Common::Log2Ceil64(size); 249 const u32 log2 = Common::Log2Ceil64(size);
229 vk::Buffer buffer = device.GetLogical().CreateBuffer({ 250 vk::Buffer buffer = device.GetLogical().CreateBuffer({
230 .sType = VK_STRUCTURE_TYPE_BUFFER_CREATE_INFO, 251 .sType = VK_STRUCTURE_TYPE_BUFFER_CREATE_INFO,
@@ -233,7 +254,8 @@ StagingBufferRef StagingBufferPool::CreateStagingBuffer(size_t size, MemoryUsage
233 .size = 1ULL << log2, 254 .size = 1ULL << log2,
234 .usage = VK_BUFFER_USAGE_TRANSFER_SRC_BIT | VK_BUFFER_USAGE_TRANSFER_DST_BIT | 255 .usage = VK_BUFFER_USAGE_TRANSFER_SRC_BIT | VK_BUFFER_USAGE_TRANSFER_DST_BIT |
235 VK_BUFFER_USAGE_UNIFORM_BUFFER_BIT | VK_BUFFER_USAGE_STORAGE_BUFFER_BIT | 256 VK_BUFFER_USAGE_UNIFORM_BUFFER_BIT | VK_BUFFER_USAGE_STORAGE_BUFFER_BIT |
236 VK_BUFFER_USAGE_INDEX_BUFFER_BIT | VK_BUFFER_USAGE_VERTEX_BUFFER_BIT, 257 VK_BUFFER_USAGE_INDEX_BUFFER_BIT | VK_BUFFER_USAGE_VERTEX_BUFFER_BIT |
258 VK_BUFFER_USAGE_TRANSFORM_FEEDBACK_BUFFER_BIT_EXT,
237 .sharingMode = VK_SHARING_MODE_EXCLUSIVE, 259 .sharingMode = VK_SHARING_MODE_EXCLUSIVE,
238 .queueFamilyIndexCount = 0, 260 .queueFamilyIndexCount = 0,
239 .pQueueFamilyIndices = nullptr, 261 .pQueueFamilyIndices = nullptr,
@@ -249,7 +271,11 @@ StagingBufferRef StagingBufferPool::CreateStagingBuffer(size_t size, MemoryUsage
249 .buffer = std::move(buffer), 271 .buffer = std::move(buffer),
250 .commit = std::move(commit), 272 .commit = std::move(commit),
251 .mapped_span = mapped_span, 273 .mapped_span = mapped_span,
252 .tick = scheduler.CurrentTick(), 274 .usage = usage,
275 .log2_level = log2,
276 .index = unique_ids++,
277 .tick = deferred ? std::numeric_limits<u64>::max() : scheduler.CurrentTick(),
278 .deferred = deferred,
253 }); 279 });
254 return entry.Ref(); 280 return entry.Ref();
255} 281}
diff --git a/src/video_core/renderer_vulkan/vk_staging_buffer_pool.h b/src/video_core/renderer_vulkan/vk_staging_buffer_pool.h
index 91dc84da8..4fd15f11a 100644
--- a/src/video_core/renderer_vulkan/vk_staging_buffer_pool.h
+++ b/src/video_core/renderer_vulkan/vk_staging_buffer_pool.h
@@ -1,5 +1,5 @@
1// SPDX-FileCopyrightText: Copyright 2019 yuzu Emulator Project 1// SPDX-FileCopyrightText: Copyright 2022 yuzu Emulator Project
2// SPDX-License-Identifier: GPL-2.0-or-later 2// SPDX-License-Identifier: GPL-3.0-or-later
3 3
4#pragma once 4#pragma once
5 5
@@ -20,6 +20,9 @@ struct StagingBufferRef {
20 VkBuffer buffer; 20 VkBuffer buffer;
21 VkDeviceSize offset; 21 VkDeviceSize offset;
22 std::span<u8> mapped_span; 22 std::span<u8> mapped_span;
23 MemoryUsage usage;
24 u32 log2_level;
25 u64 index;
23}; 26};
24 27
25class StagingBufferPool { 28class StagingBufferPool {
@@ -30,7 +33,8 @@ public:
30 Scheduler& scheduler); 33 Scheduler& scheduler);
31 ~StagingBufferPool(); 34 ~StagingBufferPool();
32 35
33 StagingBufferRef Request(size_t size, MemoryUsage usage); 36 StagingBufferRef Request(size_t size, MemoryUsage usage, bool deferred = false);
37 void FreeDeferred(StagingBufferRef& ref);
34 38
35 void TickFrame(); 39 void TickFrame();
36 40
@@ -44,13 +48,20 @@ private:
44 vk::Buffer buffer; 48 vk::Buffer buffer;
45 MemoryCommit commit; 49 MemoryCommit commit;
46 std::span<u8> mapped_span; 50 std::span<u8> mapped_span;
51 MemoryUsage usage;
52 u32 log2_level;
53 u64 index;
47 u64 tick = 0; 54 u64 tick = 0;
55 bool deferred{};
48 56
49 StagingBufferRef Ref() const noexcept { 57 StagingBufferRef Ref() const noexcept {
50 return { 58 return {
51 .buffer = *buffer, 59 .buffer = *buffer,
52 .offset = 0, 60 .offset = 0,
53 .mapped_span = mapped_span, 61 .mapped_span = mapped_span,
62 .usage = usage,
63 .log2_level = log2_level,
64 .index = index,
54 }; 65 };
55 } 66 }
56 }; 67 };
@@ -68,11 +79,12 @@ private:
68 79
69 bool AreRegionsActive(size_t region_begin, size_t region_end) const; 80 bool AreRegionsActive(size_t region_begin, size_t region_end) const;
70 81
71 StagingBufferRef GetStagingBuffer(size_t size, MemoryUsage usage); 82 StagingBufferRef GetStagingBuffer(size_t size, MemoryUsage usage, bool deferred = false);
72 83
73 std::optional<StagingBufferRef> TryGetReservedBuffer(size_t size, MemoryUsage usage); 84 std::optional<StagingBufferRef> TryGetReservedBuffer(size_t size, MemoryUsage usage,
85 bool deferred);
74 86
75 StagingBufferRef CreateStagingBuffer(size_t size, MemoryUsage usage); 87 StagingBufferRef CreateStagingBuffer(size_t size, MemoryUsage usage, bool deferred);
76 88
77 StagingBuffersCache& GetCache(MemoryUsage usage); 89 StagingBuffersCache& GetCache(MemoryUsage usage);
78 90
@@ -99,6 +111,7 @@ private:
99 111
100 size_t current_delete_level = 0; 112 size_t current_delete_level = 0;
101 u64 buffer_index = 0; 113 u64 buffer_index = 0;
114 u64 unique_ids{};
102}; 115};
103 116
104} // namespace Vulkan 117} // namespace Vulkan
diff --git a/src/video_core/renderer_vulkan/vk_state_tracker.cpp b/src/video_core/renderer_vulkan/vk_state_tracker.cpp
index edb41b171..d56558a83 100644
--- a/src/video_core/renderer_vulkan/vk_state_tracker.cpp
+++ b/src/video_core/renderer_vulkan/vk_state_tracker.cpp
@@ -27,10 +27,37 @@ using Flags = Maxwell3D::DirtyState::Flags;
27 27
28Flags MakeInvalidationFlags() { 28Flags MakeInvalidationFlags() {
29 static constexpr int INVALIDATION_FLAGS[]{ 29 static constexpr int INVALIDATION_FLAGS[]{
30 Viewports, Scissors, DepthBias, BlendConstants, DepthBounds, 30 Viewports,
31 StencilProperties, LineWidth, CullMode, DepthBoundsEnable, DepthTestEnable, 31 Scissors,
32 DepthWriteEnable, DepthCompareOp, FrontFace, StencilOp, StencilTestEnable, 32 DepthBias,
33 VertexBuffers, VertexInput, 33 BlendConstants,
34 DepthBounds,
35 StencilProperties,
36 StencilReference,
37 StencilWriteMask,
38 StencilCompare,
39 LineWidth,
40 CullMode,
41 DepthBoundsEnable,
42 DepthTestEnable,
43 DepthWriteEnable,
44 DepthCompareOp,
45 FrontFace,
46 StencilOp,
47 StencilTestEnable,
48 VertexBuffers,
49 VertexInput,
50 StateEnable,
51 PrimitiveRestartEnable,
52 RasterizerDiscardEnable,
53 DepthBiasEnable,
54 LogicOpEnable,
55 DepthClampEnable,
56 LogicOp,
57 Blending,
58 ColorMask,
59 BlendEquations,
60 BlendEnable,
34 }; 61 };
35 Flags flags{}; 62 Flags flags{};
36 for (const int flag : INVALIDATION_FLAGS) { 63 for (const int flag : INVALIDATION_FLAGS) {
@@ -75,14 +102,17 @@ void SetupDirtyDepthBounds(Tables& tables) {
75} 102}
76 103
77void SetupDirtyStencilProperties(Tables& tables) { 104void SetupDirtyStencilProperties(Tables& tables) {
78 auto& table = tables[0]; 105 const auto setup = [&](size_t position, u8 flag) {
79 table[OFF(stencil_two_side_enable)] = StencilProperties; 106 tables[0][position] = flag;
80 table[OFF(stencil_front_ref)] = StencilProperties; 107 tables[1][position] = StencilProperties;
81 table[OFF(stencil_front_mask)] = StencilProperties; 108 };
82 table[OFF(stencil_front_func_mask)] = StencilProperties; 109 tables[0][OFF(stencil_two_side_enable)] = StencilProperties;
83 table[OFF(stencil_back_ref)] = StencilProperties; 110 setup(OFF(stencil_front_ref), StencilReference);
84 table[OFF(stencil_back_mask)] = StencilProperties; 111 setup(OFF(stencil_front_mask), StencilWriteMask);
85 table[OFF(stencil_back_func_mask)] = StencilProperties; 112 setup(OFF(stencil_front_func_mask), StencilCompare);
113 setup(OFF(stencil_back_ref), StencilReference);
114 setup(OFF(stencil_back_mask), StencilWriteMask);
115 setup(OFF(stencil_back_func_mask), StencilCompare);
86} 116}
87 117
88void SetupDirtyLineWidth(Tables& tables) { 118void SetupDirtyLineWidth(Tables& tables) {
@@ -96,16 +126,22 @@ void SetupDirtyCullMode(Tables& tables) {
96 table[OFF(gl_cull_test_enabled)] = CullMode; 126 table[OFF(gl_cull_test_enabled)] = CullMode;
97} 127}
98 128
99void SetupDirtyDepthBoundsEnable(Tables& tables) { 129void SetupDirtyStateEnable(Tables& tables) {
100 tables[0][OFF(depth_bounds_enable)] = DepthBoundsEnable; 130 const auto setup = [&](size_t position, u8 flag) {
101} 131 tables[0][position] = flag;
102 132 tables[1][position] = StateEnable;
103void SetupDirtyDepthTestEnable(Tables& tables) { 133 };
104 tables[0][OFF(depth_test_enable)] = DepthTestEnable; 134 setup(OFF(depth_bounds_enable), DepthBoundsEnable);
105} 135 setup(OFF(depth_test_enable), DepthTestEnable);
106 136 setup(OFF(depth_write_enabled), DepthWriteEnable);
107void SetupDirtyDepthWriteEnable(Tables& tables) { 137 setup(OFF(stencil_enable), StencilTestEnable);
108 tables[0][OFF(depth_write_enabled)] = DepthWriteEnable; 138 setup(OFF(primitive_restart.enabled), PrimitiveRestartEnable);
139 setup(OFF(rasterize_enable), RasterizerDiscardEnable);
140 setup(OFF(polygon_offset_point_enable), DepthBiasEnable);
141 setup(OFF(polygon_offset_line_enable), DepthBiasEnable);
142 setup(OFF(polygon_offset_fill_enable), DepthBiasEnable);
143 setup(OFF(logic_op.enable), LogicOpEnable);
144 setup(OFF(viewport_clip_control.geometry_clip), DepthClampEnable);
109} 145}
110 146
111void SetupDirtyDepthCompareOp(Tables& tables) { 147void SetupDirtyDepthCompareOp(Tables& tables) {
@@ -133,16 +169,22 @@ void SetupDirtyStencilOp(Tables& tables) {
133 tables[1][OFF(stencil_two_side_enable)] = StencilOp; 169 tables[1][OFF(stencil_two_side_enable)] = StencilOp;
134} 170}
135 171
136void SetupDirtyStencilTestEnable(Tables& tables) {
137 tables[0][OFF(stencil_enable)] = StencilTestEnable;
138}
139
140void SetupDirtyBlending(Tables& tables) { 172void SetupDirtyBlending(Tables& tables) {
141 tables[0][OFF(color_mask_common)] = Blending; 173 tables[0][OFF(color_mask_common)] = Blending;
174 tables[1][OFF(color_mask_common)] = ColorMask;
142 tables[0][OFF(blend_per_target_enabled)] = Blending; 175 tables[0][OFF(blend_per_target_enabled)] = Blending;
176 tables[1][OFF(blend_per_target_enabled)] = BlendEquations;
143 FillBlock(tables[0], OFF(color_mask), NUM(color_mask), Blending); 177 FillBlock(tables[0], OFF(color_mask), NUM(color_mask), Blending);
178 FillBlock(tables[1], OFF(color_mask), NUM(color_mask), ColorMask);
144 FillBlock(tables[0], OFF(blend), NUM(blend), Blending); 179 FillBlock(tables[0], OFF(blend), NUM(blend), Blending);
180 FillBlock(tables[1], OFF(blend), NUM(blend), BlendEquations);
181 FillBlock(tables[1], OFF(blend.enable), NUM(blend.enable), BlendEnable);
145 FillBlock(tables[0], OFF(blend_per_target), NUM(blend_per_target), Blending); 182 FillBlock(tables[0], OFF(blend_per_target), NUM(blend_per_target), Blending);
183 FillBlock(tables[1], OFF(blend_per_target), NUM(blend_per_target), BlendEquations);
184}
185
186void SetupDirtySpecialOps(Tables& tables) {
187 tables[0][OFF(logic_op.op)] = LogicOp;
146} 188}
147 189
148void SetupDirtyViewportSwizzles(Tables& tables) { 190void SetupDirtyViewportSwizzles(Tables& tables) {
@@ -185,17 +227,15 @@ void StateTracker::SetupTables(Tegra::Control::ChannelState& channel_state) {
185 SetupDirtyStencilProperties(tables); 227 SetupDirtyStencilProperties(tables);
186 SetupDirtyLineWidth(tables); 228 SetupDirtyLineWidth(tables);
187 SetupDirtyCullMode(tables); 229 SetupDirtyCullMode(tables);
188 SetupDirtyDepthBoundsEnable(tables); 230 SetupDirtyStateEnable(tables);
189 SetupDirtyDepthTestEnable(tables);
190 SetupDirtyDepthWriteEnable(tables);
191 SetupDirtyDepthCompareOp(tables); 231 SetupDirtyDepthCompareOp(tables);
192 SetupDirtyFrontFace(tables); 232 SetupDirtyFrontFace(tables);
193 SetupDirtyStencilOp(tables); 233 SetupDirtyStencilOp(tables);
194 SetupDirtyStencilTestEnable(tables);
195 SetupDirtyBlending(tables); 234 SetupDirtyBlending(tables);
196 SetupDirtyViewportSwizzles(tables); 235 SetupDirtyViewportSwizzles(tables);
197 SetupDirtyVertexAttributes(tables); 236 SetupDirtyVertexAttributes(tables);
198 SetupDirtyVertexBindings(tables); 237 SetupDirtyVertexBindings(tables);
238 SetupDirtySpecialOps(tables);
199} 239}
200 240
201void StateTracker::ChangeChannel(Tegra::Control::ChannelState& channel_state) { 241void StateTracker::ChangeChannel(Tegra::Control::ChannelState& channel_state) {
@@ -204,6 +244,8 @@ void StateTracker::ChangeChannel(Tegra::Control::ChannelState& channel_state) {
204 244
205void StateTracker::InvalidateState() { 245void StateTracker::InvalidateState() {
206 flags->set(); 246 flags->set();
247 current_topology = INVALID_TOPOLOGY;
248 stencil_reset = true;
207} 249}
208 250
209StateTracker::StateTracker() 251StateTracker::StateTracker()
diff --git a/src/video_core/renderer_vulkan/vk_state_tracker.h b/src/video_core/renderer_vulkan/vk_state_tracker.h
index 2296dea60..8010ad26c 100644
--- a/src/video_core/renderer_vulkan/vk_state_tracker.h
+++ b/src/video_core/renderer_vulkan/vk_state_tracker.h
@@ -35,6 +35,9 @@ enum : u8 {
35 BlendConstants, 35 BlendConstants,
36 DepthBounds, 36 DepthBounds,
37 StencilProperties, 37 StencilProperties,
38 StencilReference,
39 StencilWriteMask,
40 StencilCompare,
38 LineWidth, 41 LineWidth,
39 42
40 CullMode, 43 CullMode,
@@ -45,8 +48,18 @@ enum : u8 {
45 FrontFace, 48 FrontFace,
46 StencilOp, 49 StencilOp,
47 StencilTestEnable, 50 StencilTestEnable,
51 PrimitiveRestartEnable,
52 RasterizerDiscardEnable,
53 DepthBiasEnable,
54 StateEnable,
55 LogicOp,
56 LogicOpEnable,
57 DepthClampEnable,
48 58
49 Blending, 59 Blending,
60 BlendEnable,
61 BlendEquations,
62 ColorMask,
50 ViewportSwizzles, 63 ViewportSwizzles,
51 64
52 Last, 65 Last,
@@ -64,6 +77,7 @@ public:
64 void InvalidateCommandBufferState() { 77 void InvalidateCommandBufferState() {
65 (*flags) |= invalidation_flags; 78 (*flags) |= invalidation_flags;
66 current_topology = INVALID_TOPOLOGY; 79 current_topology = INVALID_TOPOLOGY;
80 stencil_reset = true;
67 } 81 }
68 82
69 void InvalidateViewports() { 83 void InvalidateViewports() {
@@ -103,6 +117,57 @@ public:
103 return Exchange(Dirty::StencilProperties, false); 117 return Exchange(Dirty::StencilProperties, false);
104 } 118 }
105 119
120 bool TouchStencilReference() {
121 return Exchange(Dirty::StencilReference, false);
122 }
123
124 bool TouchStencilWriteMask() {
125 return Exchange(Dirty::StencilWriteMask, false);
126 }
127
128 bool TouchStencilCompare() {
129 return Exchange(Dirty::StencilCompare, false);
130 }
131
132 template <typename T>
133 bool ExchangeCheck(T& old_value, T new_value) {
134 bool result = old_value != new_value;
135 old_value = new_value;
136 return result;
137 }
138
139 bool TouchStencilSide(bool two_sided_stencil_new) {
140 return ExchangeCheck(two_sided_stencil, two_sided_stencil_new) || stencil_reset;
141 }
142
143 bool CheckStencilReferenceFront(u32 new_value) {
144 return ExchangeCheck(front.ref, new_value) || stencil_reset;
145 }
146
147 bool CheckStencilReferenceBack(u32 new_value) {
148 return ExchangeCheck(back.ref, new_value) || stencil_reset;
149 }
150
151 bool CheckStencilWriteMaskFront(u32 new_value) {
152 return ExchangeCheck(front.write_mask, new_value) || stencil_reset;
153 }
154
155 bool CheckStencilWriteMaskBack(u32 new_value) {
156 return ExchangeCheck(back.write_mask, new_value) || stencil_reset;
157 }
158
159 bool CheckStencilCompareMaskFront(u32 new_value) {
160 return ExchangeCheck(front.compare_mask, new_value) || stencil_reset;
161 }
162
163 bool CheckStencilCompareMaskBack(u32 new_value) {
164 return ExchangeCheck(back.compare_mask, new_value) || stencil_reset;
165 }
166
167 void ClearStencilReset() {
168 stencil_reset = false;
169 }
170
106 bool TouchLineWidth() const { 171 bool TouchLineWidth() const {
107 return Exchange(Dirty::LineWidth, false); 172 return Exchange(Dirty::LineWidth, false);
108 } 173 }
@@ -111,6 +176,10 @@ public:
111 return Exchange(Dirty::CullMode, false); 176 return Exchange(Dirty::CullMode, false);
112 } 177 }
113 178
179 bool TouchStateEnable() {
180 return Exchange(Dirty::StateEnable, false);
181 }
182
114 bool TouchDepthBoundsTestEnable() { 183 bool TouchDepthBoundsTestEnable() {
115 return Exchange(Dirty::DepthBoundsEnable, false); 184 return Exchange(Dirty::DepthBoundsEnable, false);
116 } 185 }
@@ -123,6 +192,26 @@ public:
123 return Exchange(Dirty::DepthWriteEnable, false); 192 return Exchange(Dirty::DepthWriteEnable, false);
124 } 193 }
125 194
195 bool TouchPrimitiveRestartEnable() {
196 return Exchange(Dirty::PrimitiveRestartEnable, false);
197 }
198
199 bool TouchRasterizerDiscardEnable() {
200 return Exchange(Dirty::RasterizerDiscardEnable, false);
201 }
202
203 bool TouchDepthBiasEnable() {
204 return Exchange(Dirty::DepthBiasEnable, false);
205 }
206
207 bool TouchLogicOpEnable() {
208 return Exchange(Dirty::LogicOpEnable, false);
209 }
210
211 bool TouchDepthClampEnable() {
212 return Exchange(Dirty::DepthClampEnable, false);
213 }
214
126 bool TouchDepthCompareOp() { 215 bool TouchDepthCompareOp() {
127 return Exchange(Dirty::DepthCompareOp, false); 216 return Exchange(Dirty::DepthCompareOp, false);
128 } 217 }
@@ -135,10 +224,30 @@ public:
135 return Exchange(Dirty::StencilOp, false); 224 return Exchange(Dirty::StencilOp, false);
136 } 225 }
137 226
227 bool TouchBlending() {
228 return Exchange(Dirty::Blending, false);
229 }
230
231 bool TouchBlendEnable() {
232 return Exchange(Dirty::BlendEnable, false);
233 }
234
235 bool TouchBlendEquations() {
236 return Exchange(Dirty::BlendEquations, false);
237 }
238
239 bool TouchColorMask() {
240 return Exchange(Dirty::ColorMask, false);
241 }
242
138 bool TouchStencilTestEnable() { 243 bool TouchStencilTestEnable() {
139 return Exchange(Dirty::StencilTestEnable, false); 244 return Exchange(Dirty::StencilTestEnable, false);
140 } 245 }
141 246
247 bool TouchLogicOp() {
248 return Exchange(Dirty::LogicOp, false);
249 }
250
142 bool ChangePrimitiveTopology(Maxwell::PrimitiveTopology new_topology) { 251 bool ChangePrimitiveTopology(Maxwell::PrimitiveTopology new_topology) {
143 const bool has_changed = current_topology != new_topology; 252 const bool has_changed = current_topology != new_topology;
144 current_topology = new_topology; 253 current_topology = new_topology;
@@ -160,10 +269,20 @@ private:
160 return is_dirty; 269 return is_dirty;
161 } 270 }
162 271
272 struct StencilProperties {
273 u32 ref = 0;
274 u32 write_mask = 0;
275 u32 compare_mask = 0;
276 };
277
163 Tegra::Engines::Maxwell3D::DirtyState::Flags* flags; 278 Tegra::Engines::Maxwell3D::DirtyState::Flags* flags;
164 Tegra::Engines::Maxwell3D::DirtyState::Flags default_flags; 279 Tegra::Engines::Maxwell3D::DirtyState::Flags default_flags;
165 Tegra::Engines::Maxwell3D::DirtyState::Flags invalidation_flags; 280 Tegra::Engines::Maxwell3D::DirtyState::Flags invalidation_flags;
166 Maxwell::PrimitiveTopology current_topology = INVALID_TOPOLOGY; 281 Maxwell::PrimitiveTopology current_topology = INVALID_TOPOLOGY;
282 bool two_sided_stencil = false;
283 StencilProperties front{};
284 StencilProperties back{};
285 bool stencil_reset = false;
167}; 286};
168 287
169} // namespace Vulkan 288} // namespace Vulkan
diff --git a/src/video_core/renderer_vulkan/vk_texture_cache.cpp b/src/video_core/renderer_vulkan/vk_texture_cache.cpp
index a65bbeb1c..d39372ec4 100644
--- a/src/video_core/renderer_vulkan/vk_texture_cache.cpp
+++ b/src/video_core/renderer_vulkan/vk_texture_cache.cpp
@@ -812,8 +812,12 @@ StagingBufferRef TextureCacheRuntime::UploadStagingBuffer(size_t size) {
812 return staging_buffer_pool.Request(size, MemoryUsage::Upload); 812 return staging_buffer_pool.Request(size, MemoryUsage::Upload);
813} 813}
814 814
815StagingBufferRef TextureCacheRuntime::DownloadStagingBuffer(size_t size) { 815StagingBufferRef TextureCacheRuntime::DownloadStagingBuffer(size_t size, bool deferred) {
816 return staging_buffer_pool.Request(size, MemoryUsage::Download); 816 return staging_buffer_pool.Request(size, MemoryUsage::Download, deferred);
817}
818
819void TextureCacheRuntime::FreeDeferredStagingBuffer(StagingBufferRef& ref) {
820 staging_buffer_pool.FreeDeferred(ref);
817} 821}
818 822
819bool TextureCacheRuntime::ShouldReinterpret(Image& dst, Image& src) { 823bool TextureCacheRuntime::ShouldReinterpret(Image& dst, Image& src) {
diff --git a/src/video_core/renderer_vulkan/vk_texture_cache.h b/src/video_core/renderer_vulkan/vk_texture_cache.h
index 7ec0df134..1f27a3589 100644
--- a/src/video_core/renderer_vulkan/vk_texture_cache.h
+++ b/src/video_core/renderer_vulkan/vk_texture_cache.h
@@ -51,7 +51,9 @@ public:
51 51
52 StagingBufferRef UploadStagingBuffer(size_t size); 52 StagingBufferRef UploadStagingBuffer(size_t size);
53 53
54 StagingBufferRef DownloadStagingBuffer(size_t size); 54 StagingBufferRef DownloadStagingBuffer(size_t size, bool deferred = false);
55
56 void FreeDeferredStagingBuffer(StagingBufferRef& ref);
55 57
56 void TickFrame(); 58 void TickFrame();
57 59
@@ -347,6 +349,7 @@ struct TextureCacheParams {
347 static constexpr bool FRAMEBUFFER_BLITS = false; 349 static constexpr bool FRAMEBUFFER_BLITS = false;
348 static constexpr bool HAS_EMULATED_COPIES = false; 350 static constexpr bool HAS_EMULATED_COPIES = false;
349 static constexpr bool HAS_DEVICE_MEMORY_INFO = true; 351 static constexpr bool HAS_DEVICE_MEMORY_INFO = true;
352 static constexpr bool IMPLEMENTS_ASYNC_DOWNLOADS = true;
350 353
351 using Runtime = Vulkan::TextureCacheRuntime; 354 using Runtime = Vulkan::TextureCacheRuntime;
352 using Image = Vulkan::Image; 355 using Image = Vulkan::Image;
@@ -354,6 +357,7 @@ struct TextureCacheParams {
354 using ImageView = Vulkan::ImageView; 357 using ImageView = Vulkan::ImageView;
355 using Sampler = Vulkan::Sampler; 358 using Sampler = Vulkan::Sampler;
356 using Framebuffer = Vulkan::Framebuffer; 359 using Framebuffer = Vulkan::Framebuffer;
360 using AsyncBuffer = Vulkan::StagingBufferRef;
357}; 361};
358 362
359using TextureCache = VideoCommon::TextureCache<TextureCacheParams>; 363using TextureCache = VideoCommon::TextureCache<TextureCacheParams>;
diff --git a/src/video_core/shader_environment.cpp b/src/video_core/shader_environment.cpp
index 958810747..574760f80 100644
--- a/src/video_core/shader_environment.cpp
+++ b/src/video_core/shader_environment.cpp
@@ -202,12 +202,15 @@ void GenericEnvironment::Serialize(std::ofstream& file) const {
202 const u64 num_texture_types{static_cast<u64>(texture_types.size())}; 202 const u64 num_texture_types{static_cast<u64>(texture_types.size())};
203 const u64 num_texture_pixel_formats{static_cast<u64>(texture_pixel_formats.size())}; 203 const u64 num_texture_pixel_formats{static_cast<u64>(texture_pixel_formats.size())};
204 const u64 num_cbuf_values{static_cast<u64>(cbuf_values.size())}; 204 const u64 num_cbuf_values{static_cast<u64>(cbuf_values.size())};
205 const u64 num_cbuf_replacement_values{static_cast<u64>(cbuf_replacements.size())};
205 206
206 file.write(reinterpret_cast<const char*>(&code_size), sizeof(code_size)) 207 file.write(reinterpret_cast<const char*>(&code_size), sizeof(code_size))
207 .write(reinterpret_cast<const char*>(&num_texture_types), sizeof(num_texture_types)) 208 .write(reinterpret_cast<const char*>(&num_texture_types), sizeof(num_texture_types))
208 .write(reinterpret_cast<const char*>(&num_texture_pixel_formats), 209 .write(reinterpret_cast<const char*>(&num_texture_pixel_formats),
209 sizeof(num_texture_pixel_formats)) 210 sizeof(num_texture_pixel_formats))
210 .write(reinterpret_cast<const char*>(&num_cbuf_values), sizeof(num_cbuf_values)) 211 .write(reinterpret_cast<const char*>(&num_cbuf_values), sizeof(num_cbuf_values))
212 .write(reinterpret_cast<const char*>(&num_cbuf_replacement_values),
213 sizeof(num_cbuf_replacement_values))
211 .write(reinterpret_cast<const char*>(&local_memory_size), sizeof(local_memory_size)) 214 .write(reinterpret_cast<const char*>(&local_memory_size), sizeof(local_memory_size))
212 .write(reinterpret_cast<const char*>(&texture_bound), sizeof(texture_bound)) 215 .write(reinterpret_cast<const char*>(&texture_bound), sizeof(texture_bound))
213 .write(reinterpret_cast<const char*>(&start_address), sizeof(start_address)) 216 .write(reinterpret_cast<const char*>(&start_address), sizeof(start_address))
@@ -229,6 +232,10 @@ void GenericEnvironment::Serialize(std::ofstream& file) const {
229 file.write(reinterpret_cast<const char*>(&key), sizeof(key)) 232 file.write(reinterpret_cast<const char*>(&key), sizeof(key))
230 .write(reinterpret_cast<const char*>(&type), sizeof(type)); 233 .write(reinterpret_cast<const char*>(&type), sizeof(type));
231 } 234 }
235 for (const auto& [key, type] : cbuf_replacements) {
236 file.write(reinterpret_cast<const char*>(&key), sizeof(key))
237 .write(reinterpret_cast<const char*>(&type), sizeof(type));
238 }
232 if (stage == Shader::Stage::Compute) { 239 if (stage == Shader::Stage::Compute) {
233 file.write(reinterpret_cast<const char*>(&workgroup_size), sizeof(workgroup_size)) 240 file.write(reinterpret_cast<const char*>(&workgroup_size), sizeof(workgroup_size))
234 .write(reinterpret_cast<const char*>(&shared_memory_size), sizeof(shared_memory_size)); 241 .write(reinterpret_cast<const char*>(&shared_memory_size), sizeof(shared_memory_size));
@@ -318,6 +325,9 @@ GraphicsEnvironment::GraphicsEnvironment(Tegra::Engines::Maxwell3D& maxwell3d_,
318 ASSERT(local_size <= std::numeric_limits<u32>::max()); 325 ASSERT(local_size <= std::numeric_limits<u32>::max());
319 local_memory_size = static_cast<u32>(local_size) + sph.common3.shader_local_memory_crs_size; 326 local_memory_size = static_cast<u32>(local_size) + sph.common3.shader_local_memory_crs_size;
320 texture_bound = maxwell3d->regs.bindless_texture_const_buffer_slot; 327 texture_bound = maxwell3d->regs.bindless_texture_const_buffer_slot;
328 is_propietary_driver = texture_bound == 2;
329 has_hle_engine_state =
330 maxwell3d->engine_state == Tegra::Engines::Maxwell3D::EngineHint::OnHLEMacro;
321} 331}
322 332
323u32 GraphicsEnvironment::ReadCbufValue(u32 cbuf_index, u32 cbuf_offset) { 333u32 GraphicsEnvironment::ReadCbufValue(u32 cbuf_index, u32 cbuf_offset) {
@@ -331,6 +341,32 @@ u32 GraphicsEnvironment::ReadCbufValue(u32 cbuf_index, u32 cbuf_offset) {
331 return value; 341 return value;
332} 342}
333 343
344std::optional<Shader::ReplaceConstant> GraphicsEnvironment::GetReplaceConstBuffer(u32 bank,
345 u32 offset) {
346 if (!has_hle_engine_state) {
347 return std::nullopt;
348 }
349 const u64 key = (static_cast<u64>(bank) << 32) | static_cast<u64>(offset);
350 auto it = maxwell3d->replace_table.find(key);
351 if (it == maxwell3d->replace_table.end()) {
352 return std::nullopt;
353 }
354 const auto converted_value = [](Tegra::Engines::Maxwell3D::HLEReplacementAttributeType name) {
355 switch (name) {
356 case Tegra::Engines::Maxwell3D::HLEReplacementAttributeType::BaseVertex:
357 return Shader::ReplaceConstant::BaseVertex;
358 case Tegra::Engines::Maxwell3D::HLEReplacementAttributeType::BaseInstance:
359 return Shader::ReplaceConstant::BaseInstance;
360 case Tegra::Engines::Maxwell3D::HLEReplacementAttributeType::DrawID:
361 return Shader::ReplaceConstant::DrawID;
362 default:
363 UNREACHABLE();
364 }
365 }(it->second);
366 cbuf_replacements.emplace(key, converted_value);
367 return converted_value;
368}
369
334Shader::TextureType GraphicsEnvironment::ReadTextureType(u32 handle) { 370Shader::TextureType GraphicsEnvironment::ReadTextureType(u32 handle) {
335 const auto& regs{maxwell3d->regs}; 371 const auto& regs{maxwell3d->regs};
336 const bool via_header_index{regs.sampler_binding == Maxwell::SamplerBinding::ViaHeaderBinding}; 372 const bool via_header_index{regs.sampler_binding == Maxwell::SamplerBinding::ViaHeaderBinding};
@@ -366,6 +402,7 @@ ComputeEnvironment::ComputeEnvironment(Tegra::Engines::KeplerCompute& kepler_com
366 stage = Shader::Stage::Compute; 402 stage = Shader::Stage::Compute;
367 local_memory_size = qmd.local_pos_alloc + qmd.local_crs_alloc; 403 local_memory_size = qmd.local_pos_alloc + qmd.local_crs_alloc;
368 texture_bound = kepler_compute->regs.tex_cb_index; 404 texture_bound = kepler_compute->regs.tex_cb_index;
405 is_propietary_driver = texture_bound == 2;
369 shared_memory_size = qmd.shared_alloc; 406 shared_memory_size = qmd.shared_alloc;
370 workgroup_size = {qmd.block_dim_x, qmd.block_dim_y, qmd.block_dim_z}; 407 workgroup_size = {qmd.block_dim_x, qmd.block_dim_y, qmd.block_dim_z};
371} 408}
@@ -409,11 +446,14 @@ void FileEnvironment::Deserialize(std::ifstream& file) {
409 u64 num_texture_types{}; 446 u64 num_texture_types{};
410 u64 num_texture_pixel_formats{}; 447 u64 num_texture_pixel_formats{};
411 u64 num_cbuf_values{}; 448 u64 num_cbuf_values{};
449 u64 num_cbuf_replacement_values{};
412 file.read(reinterpret_cast<char*>(&code_size), sizeof(code_size)) 450 file.read(reinterpret_cast<char*>(&code_size), sizeof(code_size))
413 .read(reinterpret_cast<char*>(&num_texture_types), sizeof(num_texture_types)) 451 .read(reinterpret_cast<char*>(&num_texture_types), sizeof(num_texture_types))
414 .read(reinterpret_cast<char*>(&num_texture_pixel_formats), 452 .read(reinterpret_cast<char*>(&num_texture_pixel_formats),
415 sizeof(num_texture_pixel_formats)) 453 sizeof(num_texture_pixel_formats))
416 .read(reinterpret_cast<char*>(&num_cbuf_values), sizeof(num_cbuf_values)) 454 .read(reinterpret_cast<char*>(&num_cbuf_values), sizeof(num_cbuf_values))
455 .read(reinterpret_cast<char*>(&num_cbuf_replacement_values),
456 sizeof(num_cbuf_replacement_values))
417 .read(reinterpret_cast<char*>(&local_memory_size), sizeof(local_memory_size)) 457 .read(reinterpret_cast<char*>(&local_memory_size), sizeof(local_memory_size))
418 .read(reinterpret_cast<char*>(&texture_bound), sizeof(texture_bound)) 458 .read(reinterpret_cast<char*>(&texture_bound), sizeof(texture_bound))
419 .read(reinterpret_cast<char*>(&start_address), sizeof(start_address)) 459 .read(reinterpret_cast<char*>(&start_address), sizeof(start_address))
@@ -444,6 +484,13 @@ void FileEnvironment::Deserialize(std::ifstream& file) {
444 .read(reinterpret_cast<char*>(&value), sizeof(value)); 484 .read(reinterpret_cast<char*>(&value), sizeof(value));
445 cbuf_values.emplace(key, value); 485 cbuf_values.emplace(key, value);
446 } 486 }
487 for (size_t i = 0; i < num_cbuf_replacement_values; ++i) {
488 u64 key;
489 Shader::ReplaceConstant value;
490 file.read(reinterpret_cast<char*>(&key), sizeof(key))
491 .read(reinterpret_cast<char*>(&value), sizeof(value));
492 cbuf_replacements.emplace(key, value);
493 }
447 if (stage == Shader::Stage::Compute) { 494 if (stage == Shader::Stage::Compute) {
448 file.read(reinterpret_cast<char*>(&workgroup_size), sizeof(workgroup_size)) 495 file.read(reinterpret_cast<char*>(&workgroup_size), sizeof(workgroup_size))
449 .read(reinterpret_cast<char*>(&shared_memory_size), sizeof(shared_memory_size)); 496 .read(reinterpret_cast<char*>(&shared_memory_size), sizeof(shared_memory_size));
@@ -455,6 +502,7 @@ void FileEnvironment::Deserialize(std::ifstream& file) {
455 file.read(reinterpret_cast<char*>(&gp_passthrough_mask), sizeof(gp_passthrough_mask)); 502 file.read(reinterpret_cast<char*>(&gp_passthrough_mask), sizeof(gp_passthrough_mask));
456 } 503 }
457 } 504 }
505 is_propietary_driver = texture_bound == 2;
458} 506}
459 507
460void FileEnvironment::Dump(u64 hash) { 508void FileEnvironment::Dump(u64 hash) {
@@ -512,6 +560,16 @@ std::array<u32, 3> FileEnvironment::WorkgroupSize() const {
512 return workgroup_size; 560 return workgroup_size;
513} 561}
514 562
563std::optional<Shader::ReplaceConstant> FileEnvironment::GetReplaceConstBuffer(u32 bank,
564 u32 offset) {
565 const u64 key = (static_cast<u64>(bank) << 32) | static_cast<u64>(offset);
566 auto it = cbuf_replacements.find(key);
567 if (it == cbuf_replacements.end()) {
568 return std::nullopt;
569 }
570 return it->second;
571}
572
515void SerializePipeline(std::span<const char> key, std::span<const GenericEnvironment* const> envs, 573void SerializePipeline(std::span<const char> key, std::span<const GenericEnvironment* const> envs,
516 const std::filesystem::path& filename, u32 cache_version) try { 574 const std::filesystem::path& filename, u32 cache_version) try {
517 std::ofstream file(filename, std::ios::binary | std::ios::ate | std::ios::app); 575 std::ofstream file(filename, std::ios::binary | std::ios::ate | std::ios::app);
diff --git a/src/video_core/shader_environment.h b/src/video_core/shader_environment.h
index 1342fab1e..d75987a52 100644
--- a/src/video_core/shader_environment.h
+++ b/src/video_core/shader_environment.h
@@ -60,6 +60,10 @@ public:
60 60
61 void Serialize(std::ofstream& file) const; 61 void Serialize(std::ofstream& file) const;
62 62
63 bool HasHLEMacroState() const override {
64 return has_hle_engine_state;
65 }
66
63protected: 67protected:
64 std::optional<u64> TryFindSize(); 68 std::optional<u64> TryFindSize();
65 69
@@ -73,6 +77,7 @@ protected:
73 std::unordered_map<u32, Shader::TextureType> texture_types; 77 std::unordered_map<u32, Shader::TextureType> texture_types;
74 std::unordered_map<u32, Shader::TexturePixelFormat> texture_pixel_formats; 78 std::unordered_map<u32, Shader::TexturePixelFormat> texture_pixel_formats;
75 std::unordered_map<u64, u32> cbuf_values; 79 std::unordered_map<u64, u32> cbuf_values;
80 std::unordered_map<u64, Shader::ReplaceConstant> cbuf_replacements;
76 81
77 u32 local_memory_size{}; 82 u32 local_memory_size{};
78 u32 texture_bound{}; 83 u32 texture_bound{};
@@ -89,6 +94,7 @@ protected:
89 u32 viewport_transform_state = 1; 94 u32 viewport_transform_state = 1;
90 95
91 bool has_unbound_instructions = false; 96 bool has_unbound_instructions = false;
97 bool has_hle_engine_state = false;
92}; 98};
93 99
94class GraphicsEnvironment final : public GenericEnvironment { 100class GraphicsEnvironment final : public GenericEnvironment {
@@ -109,6 +115,8 @@ public:
109 115
110 u32 ReadViewportTransformState() override; 116 u32 ReadViewportTransformState() override;
111 117
118 std::optional<Shader::ReplaceConstant> GetReplaceConstBuffer(u32 bank, u32 offset) override;
119
112private: 120private:
113 Tegra::Engines::Maxwell3D* maxwell3d{}; 121 Tegra::Engines::Maxwell3D* maxwell3d{};
114 size_t stage_index{}; 122 size_t stage_index{};
@@ -131,6 +139,11 @@ public:
131 139
132 u32 ReadViewportTransformState() override; 140 u32 ReadViewportTransformState() override;
133 141
142 std::optional<Shader::ReplaceConstant> GetReplaceConstBuffer(
143 [[maybe_unused]] u32 bank, [[maybe_unused]] u32 offset) override {
144 return std::nullopt;
145 }
146
134private: 147private:
135 Tegra::Engines::KeplerCompute* kepler_compute{}; 148 Tegra::Engines::KeplerCompute* kepler_compute{};
136}; 149};
@@ -166,6 +179,13 @@ public:
166 179
167 [[nodiscard]] std::array<u32, 3> WorkgroupSize() const override; 180 [[nodiscard]] std::array<u32, 3> WorkgroupSize() const override;
168 181
182 [[nodiscard]] std::optional<Shader::ReplaceConstant> GetReplaceConstBuffer(u32 bank,
183 u32 offset) override;
184
185 [[nodiscard]] bool HasHLEMacroState() const override {
186 return cbuf_replacements.size() != 0;
187 }
188
169 void Dump(u64 hash) override; 189 void Dump(u64 hash) override;
170 190
171private: 191private:
@@ -173,6 +193,7 @@ private:
173 std::unordered_map<u32, Shader::TextureType> texture_types; 193 std::unordered_map<u32, Shader::TextureType> texture_types;
174 std::unordered_map<u32, Shader::TexturePixelFormat> texture_pixel_formats; 194 std::unordered_map<u32, Shader::TexturePixelFormat> texture_pixel_formats;
175 std::unordered_map<u64, u32> cbuf_values; 195 std::unordered_map<u64, u32> cbuf_values;
196 std::unordered_map<u64, Shader::ReplaceConstant> cbuf_replacements;
176 std::array<u32, 3> workgroup_size{}; 197 std::array<u32, 3> workgroup_size{};
177 u32 local_memory_size{}; 198 u32 local_memory_size{};
178 u32 shared_memory_size{}; 199 u32 shared_memory_size{};
diff --git a/src/video_core/texture_cache/texture_cache.h b/src/video_core/texture_cache/texture_cache.h
index 27c82cd20..87152c8e9 100644
--- a/src/video_core/texture_cache/texture_cache.h
+++ b/src/video_core/texture_cache/texture_cache.h
@@ -646,7 +646,28 @@ bool TextureCache<P>::ShouldWaitAsyncFlushes() const noexcept {
646template <class P> 646template <class P>
647void TextureCache<P>::CommitAsyncFlushes() { 647void TextureCache<P>::CommitAsyncFlushes() {
648 // This is intentionally passing the value by copy 648 // This is intentionally passing the value by copy
649 committed_downloads.push(uncommitted_downloads); 649 if constexpr (IMPLEMENTS_ASYNC_DOWNLOADS) {
650 const std::span<const ImageId> download_ids = uncommitted_downloads;
651 if (download_ids.empty()) {
652 committed_downloads.emplace_back(std::move(uncommitted_downloads));
653 uncommitted_downloads.clear();
654 async_buffers.emplace_back(std::optional<AsyncBuffer>{});
655 return;
656 }
657 size_t total_size_bytes = 0;
658 for (const ImageId image_id : download_ids) {
659 total_size_bytes += slot_images[image_id].unswizzled_size_bytes;
660 }
661 auto download_map = runtime.DownloadStagingBuffer(total_size_bytes, true);
662 for (const ImageId image_id : download_ids) {
663 Image& image = slot_images[image_id];
664 const auto copies = FullDownloadCopies(image.info);
665 image.DownloadMemory(download_map, copies);
666 download_map.offset += Common::AlignUp(image.unswizzled_size_bytes, 64);
667 }
668 async_buffers.emplace_back(download_map);
669 }
670 committed_downloads.emplace_back(std::move(uncommitted_downloads));
650 uncommitted_downloads.clear(); 671 uncommitted_downloads.clear();
651} 672}
652 673
@@ -655,37 +676,58 @@ void TextureCache<P>::PopAsyncFlushes() {
655 if (committed_downloads.empty()) { 676 if (committed_downloads.empty()) {
656 return; 677 return;
657 } 678 }
658 const std::span<const ImageId> download_ids = committed_downloads.front(); 679 if constexpr (IMPLEMENTS_ASYNC_DOWNLOADS) {
659 if (download_ids.empty()) { 680 const std::span<const ImageId> download_ids = committed_downloads.front();
660 committed_downloads.pop(); 681 if (download_ids.empty()) {
661 return; 682 committed_downloads.pop_front();
662 } 683 async_buffers.pop_front();
663 size_t total_size_bytes = 0; 684 return;
664 for (const ImageId image_id : download_ids) { 685 }
665 total_size_bytes += slot_images[image_id].unswizzled_size_bytes; 686 auto download_map = *async_buffers.front();
666 } 687 std::span<u8> download_span = download_map.mapped_span;
667 auto download_map = runtime.DownloadStagingBuffer(total_size_bytes); 688 for (size_t i = download_ids.size(); i > 0; i--) {
668 const size_t original_offset = download_map.offset; 689 const ImageBase& image = slot_images[download_ids[i - 1]];
669 for (const ImageId image_id : download_ids) { 690 const auto copies = FullDownloadCopies(image.info);
670 Image& image = slot_images[image_id]; 691 download_map.offset -= Common::AlignUp(image.unswizzled_size_bytes, 64);
671 const auto copies = FullDownloadCopies(image.info); 692 std::span<u8> download_span_alt = download_span.subspan(download_map.offset);
672 image.DownloadMemory(download_map, copies); 693 SwizzleImage(*gpu_memory, image.gpu_addr, image.info, copies, download_span_alt,
673 download_map.offset += image.unswizzled_size_bytes; 694 swizzle_data_buffer);
674 } 695 }
675 // Wait for downloads to finish 696 runtime.FreeDeferredStagingBuffer(download_map);
676 runtime.Finish(); 697 committed_downloads.pop_front();
677 698 async_buffers.pop_front();
678 download_map.offset = original_offset; 699 } else {
679 std::span<u8> download_span = download_map.mapped_span; 700 const std::span<const ImageId> download_ids = committed_downloads.front();
680 for (const ImageId image_id : download_ids) { 701 if (download_ids.empty()) {
681 const ImageBase& image = slot_images[image_id]; 702 committed_downloads.pop_front();
682 const auto copies = FullDownloadCopies(image.info); 703 return;
683 SwizzleImage(*gpu_memory, image.gpu_addr, image.info, copies, download_span, 704 }
684 swizzle_data_buffer); 705 size_t total_size_bytes = 0;
685 download_map.offset += image.unswizzled_size_bytes; 706 for (const ImageId image_id : download_ids) {
686 download_span = download_span.subspan(image.unswizzled_size_bytes); 707 total_size_bytes += slot_images[image_id].unswizzled_size_bytes;
708 }
709 auto download_map = runtime.DownloadStagingBuffer(total_size_bytes);
710 const size_t original_offset = download_map.offset;
711 for (const ImageId image_id : download_ids) {
712 Image& image = slot_images[image_id];
713 const auto copies = FullDownloadCopies(image.info);
714 image.DownloadMemory(download_map, copies);
715 download_map.offset += image.unswizzled_size_bytes;
716 }
717 // Wait for downloads to finish
718 runtime.Finish();
719 download_map.offset = original_offset;
720 std::span<u8> download_span = download_map.mapped_span;
721 for (const ImageId image_id : download_ids) {
722 const ImageBase& image = slot_images[image_id];
723 const auto copies = FullDownloadCopies(image.info);
724 SwizzleImage(*gpu_memory, image.gpu_addr, image.info, copies, download_span,
725 swizzle_data_buffer);
726 download_map.offset += image.unswizzled_size_bytes;
727 download_span = download_span.subspan(image.unswizzled_size_bytes);
728 }
729 committed_downloads.pop_front();
687 } 730 }
688 committed_downloads.pop();
689} 731}
690 732
691template <class P> 733template <class P>
@@ -740,7 +782,8 @@ void TextureCache<P>::UploadImageContents(Image& image, StagingBuffer& staging)
740 const GPUVAddr gpu_addr = image.gpu_addr; 782 const GPUVAddr gpu_addr = image.gpu_addr;
741 783
742 if (True(image.flags & ImageFlagBits::AcceleratedUpload)) { 784 if (True(image.flags & ImageFlagBits::AcceleratedUpload)) {
743 gpu_memory->ReadBlockUnsafe(gpu_addr, mapped_span.data(), mapped_span.size_bytes()); 785 gpu_memory->ReadBlock(gpu_addr, mapped_span.data(), mapped_span.size_bytes(),
786 VideoCommon::CacheType::NoTextureCache);
744 const auto uploads = FullUploadSwizzles(image.info); 787 const auto uploads = FullUploadSwizzles(image.info);
745 runtime.AccelerateImageUpload(image, staging, uploads); 788 runtime.AccelerateImageUpload(image, staging, uploads);
746 return; 789 return;
diff --git a/src/video_core/texture_cache/texture_cache_base.h b/src/video_core/texture_cache/texture_cache_base.h
index 4fd677a80..4eea1f609 100644
--- a/src/video_core/texture_cache/texture_cache_base.h
+++ b/src/video_core/texture_cache/texture_cache_base.h
@@ -92,6 +92,8 @@ class TextureCache : public VideoCommon::ChannelSetupCaches<TextureCacheChannelI
92 static constexpr bool HAS_EMULATED_COPIES = P::HAS_EMULATED_COPIES; 92 static constexpr bool HAS_EMULATED_COPIES = P::HAS_EMULATED_COPIES;
93 /// True when the API can provide info about the memory of the device. 93 /// True when the API can provide info about the memory of the device.
94 static constexpr bool HAS_DEVICE_MEMORY_INFO = P::HAS_DEVICE_MEMORY_INFO; 94 static constexpr bool HAS_DEVICE_MEMORY_INFO = P::HAS_DEVICE_MEMORY_INFO;
95 /// True when the API can do asynchronous texture downloads.
96 static constexpr bool IMPLEMENTS_ASYNC_DOWNLOADS = P::IMPLEMENTS_ASYNC_DOWNLOADS;
95 97
96 static constexpr size_t UNSET_CHANNEL{std::numeric_limits<size_t>::max()}; 98 static constexpr size_t UNSET_CHANNEL{std::numeric_limits<size_t>::max()};
97 99
@@ -106,6 +108,7 @@ class TextureCache : public VideoCommon::ChannelSetupCaches<TextureCacheChannelI
106 using ImageView = typename P::ImageView; 108 using ImageView = typename P::ImageView;
107 using Sampler = typename P::Sampler; 109 using Sampler = typename P::Sampler;
108 using Framebuffer = typename P::Framebuffer; 110 using Framebuffer = typename P::Framebuffer;
111 using AsyncBuffer = typename P::AsyncBuffer;
109 112
110 struct BlitImages { 113 struct BlitImages {
111 ImageId dst_id; 114 ImageId dst_id;
@@ -203,7 +206,7 @@ public:
203 /// Create channel state. 206 /// Create channel state.
204 void CreateChannel(Tegra::Control::ChannelState& channel) final override; 207 void CreateChannel(Tegra::Control::ChannelState& channel) final override;
205 208
206 std::mutex mutex; 209 std::recursive_mutex mutex;
207 210
208private: 211private:
209 /// Iterate over all page indices in a range 212 /// Iterate over all page indices in a range
@@ -403,7 +406,8 @@ private:
403 406
404 // TODO: This data structure is not optimal and it should be reworked 407 // TODO: This data structure is not optimal and it should be reworked
405 std::vector<ImageId> uncommitted_downloads; 408 std::vector<ImageId> uncommitted_downloads;
406 std::queue<std::vector<ImageId>> committed_downloads; 409 std::deque<std::vector<ImageId>> committed_downloads;
410 std::deque<std::optional<AsyncBuffer>> async_buffers;
407 411
408 struct LRUItemParams { 412 struct LRUItemParams {
409 using ObjectType = ImageId; 413 using ObjectType = ImageId;
diff --git a/src/video_core/vulkan_common/vulkan_device.cpp b/src/video_core/vulkan_common/vulkan_device.cpp
index c4d31681a..5c5bfa18d 100644
--- a/src/video_core/vulkan_common/vulkan_device.cpp
+++ b/src/video_core/vulkan_common/vulkan_device.cpp
@@ -350,8 +350,8 @@ Device::Device(VkInstance instance_, vk::PhysicalDevice physical_, VkSurfaceKHR
350 .sampleRateShading = true, 350 .sampleRateShading = true,
351 .dualSrcBlend = true, 351 .dualSrcBlend = true,
352 .logicOp = true, 352 .logicOp = true,
353 .multiDrawIndirect = false, 353 .multiDrawIndirect = true,
354 .drawIndirectFirstInstance = false, 354 .drawIndirectFirstInstance = true,
355 .depthClamp = true, 355 .depthClamp = true,
356 .depthBiasClamp = true, 356 .depthBiasClamp = true,
357 .fillModeNonSolid = true, 357 .fillModeNonSolid = true,
@@ -569,6 +569,67 @@ Device::Device(VkInstance instance_, vk::PhysicalDevice physical_, VkSurfaceKHR
569 LOG_INFO(Render_Vulkan, "Device doesn't support extended dynamic state"); 569 LOG_INFO(Render_Vulkan, "Device doesn't support extended dynamic state");
570 } 570 }
571 571
572 VkPhysicalDeviceExtendedDynamicState2FeaturesEXT dynamic_state_2;
573 if (ext_extended_dynamic_state_2) {
574 dynamic_state_2 = {
575 .sType = VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_EXTENDED_DYNAMIC_STATE_2_FEATURES_EXT,
576 .pNext = nullptr,
577 .extendedDynamicState2 = VK_TRUE,
578 .extendedDynamicState2LogicOp = ext_extended_dynamic_state_2_extra ? VK_TRUE : VK_FALSE,
579 .extendedDynamicState2PatchControlPoints = VK_FALSE,
580 };
581 SetNext(next, dynamic_state_2);
582 } else {
583 LOG_INFO(Render_Vulkan, "Device doesn't support extended dynamic state 2");
584 }
585
586 VkPhysicalDeviceExtendedDynamicState3FeaturesEXT dynamic_state_3;
587 if (ext_extended_dynamic_state_3) {
588 dynamic_state_3 = {
589 .sType = VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_EXTENDED_DYNAMIC_STATE_3_FEATURES_EXT,
590 .pNext = nullptr,
591 .extendedDynamicState3TessellationDomainOrigin = VK_FALSE,
592 .extendedDynamicState3DepthClampEnable =
593 ext_extended_dynamic_state_3_enables ? VK_TRUE : VK_FALSE,
594 .extendedDynamicState3PolygonMode = VK_FALSE,
595 .extendedDynamicState3RasterizationSamples = VK_FALSE,
596 .extendedDynamicState3SampleMask = VK_FALSE,
597 .extendedDynamicState3AlphaToCoverageEnable = VK_FALSE,
598 .extendedDynamicState3AlphaToOneEnable = VK_FALSE,
599 .extendedDynamicState3LogicOpEnable =
600 ext_extended_dynamic_state_3_enables ? VK_TRUE : VK_FALSE,
601 .extendedDynamicState3ColorBlendEnable =
602 ext_extended_dynamic_state_3_blend ? VK_TRUE : VK_FALSE,
603 .extendedDynamicState3ColorBlendEquation =
604 ext_extended_dynamic_state_3_blend ? VK_TRUE : VK_FALSE,
605 .extendedDynamicState3ColorWriteMask =
606 ext_extended_dynamic_state_3_blend ? VK_TRUE : VK_FALSE,
607 .extendedDynamicState3RasterizationStream = VK_FALSE,
608 .extendedDynamicState3ConservativeRasterizationMode = VK_FALSE,
609 .extendedDynamicState3ExtraPrimitiveOverestimationSize = VK_FALSE,
610 .extendedDynamicState3DepthClipEnable = VK_FALSE,
611 .extendedDynamicState3SampleLocationsEnable = VK_FALSE,
612 .extendedDynamicState3ColorBlendAdvanced = VK_FALSE,
613 .extendedDynamicState3ProvokingVertexMode = VK_FALSE,
614 .extendedDynamicState3LineRasterizationMode = VK_FALSE,
615 .extendedDynamicState3LineStippleEnable = VK_FALSE,
616 .extendedDynamicState3DepthClipNegativeOneToOne = VK_FALSE,
617 .extendedDynamicState3ViewportWScalingEnable = VK_FALSE,
618 .extendedDynamicState3ViewportSwizzle = VK_FALSE,
619 .extendedDynamicState3CoverageToColorEnable = VK_FALSE,
620 .extendedDynamicState3CoverageToColorLocation = VK_FALSE,
621 .extendedDynamicState3CoverageModulationMode = VK_FALSE,
622 .extendedDynamicState3CoverageModulationTableEnable = VK_FALSE,
623 .extendedDynamicState3CoverageModulationTable = VK_FALSE,
624 .extendedDynamicState3CoverageReductionMode = VK_FALSE,
625 .extendedDynamicState3RepresentativeFragmentTestEnable = VK_FALSE,
626 .extendedDynamicState3ShadingRateImageEnable = VK_FALSE,
627 };
628 SetNext(next, dynamic_state_3);
629 } else {
630 LOG_INFO(Render_Vulkan, "Device doesn't support extended dynamic state 3");
631 }
632
572 VkPhysicalDeviceLineRasterizationFeaturesEXT line_raster; 633 VkPhysicalDeviceLineRasterizationFeaturesEXT line_raster;
573 if (ext_line_rasterization) { 634 if (ext_line_rasterization) {
574 line_raster = { 635 line_raster = {
@@ -695,6 +756,8 @@ Device::Device(VkInstance instance_, vk::PhysicalDevice physical_, VkSurfaceKHR
695 CollectToolingInfo(); 756 CollectToolingInfo();
696 757
697 if (driver_id == VK_DRIVER_ID_NVIDIA_PROPRIETARY_KHR) { 758 if (driver_id == VK_DRIVER_ID_NVIDIA_PROPRIETARY_KHR) {
759 const u32 nv_major_version = (properties.driverVersion >> 22) & 0x3ff;
760
698 const auto arch = GetNvidiaArchitecture(physical, supported_extensions); 761 const auto arch = GetNvidiaArchitecture(physical, supported_extensions);
699 switch (arch) { 762 switch (arch) {
700 case NvidiaArchitecture::AmpereOrNewer: 763 case NvidiaArchitecture::AmpereOrNewer:
@@ -704,11 +767,13 @@ Device::Device(VkInstance instance_, vk::PhysicalDevice physical_, VkSurfaceKHR
704 case NvidiaArchitecture::Turing: 767 case NvidiaArchitecture::Turing:
705 break; 768 break;
706 case NvidiaArchitecture::VoltaOrOlder: 769 case NvidiaArchitecture::VoltaOrOlder:
707 LOG_WARNING(Render_Vulkan, "Blacklisting Volta and older from VK_KHR_push_descriptor"); 770 if (nv_major_version < 527) {
708 khr_push_descriptor = false; 771 LOG_WARNING(Render_Vulkan,
772 "Blacklisting Volta and older from VK_KHR_push_descriptor");
773 khr_push_descriptor = false;
774 }
709 break; 775 break;
710 } 776 }
711 const u32 nv_major_version = (properties.driverVersion >> 22) & 0x3ff;
712 if (nv_major_version >= 510) { 777 if (nv_major_version >= 510) {
713 LOG_WARNING(Render_Vulkan, "NVIDIA Drivers >= 510 do not support MSAA image blits"); 778 LOG_WARNING(Render_Vulkan, "NVIDIA Drivers >= 510 do not support MSAA image blits");
714 cant_blit_msaa = true; 779 cant_blit_msaa = true;
@@ -735,6 +800,16 @@ Device::Device(VkInstance instance_, vk::PhysicalDevice physical_, VkSurfaceKHR
735 ext_vertex_input_dynamic_state = false; 800 ext_vertex_input_dynamic_state = false;
736 } 801 }
737 } 802 }
803 if (ext_extended_dynamic_state_2 && is_radv) {
804 const u32 version = (properties.driverVersion << 3) >> 3;
805 if (version < VK_MAKE_API_VERSION(0, 22, 3, 1)) {
806 LOG_WARNING(
807 Render_Vulkan,
808 "RADV versions older than 22.3.1 have broken VK_EXT_extended_dynamic_state2");
809 ext_extended_dynamic_state_2 = false;
810 ext_extended_dynamic_state_2_extra = false;
811 }
812 }
738 sets_per_pool = 64; 813 sets_per_pool = 64;
739 814
740 const bool is_amd = 815 const bool is_amd =
@@ -763,8 +838,11 @@ Device::Device(VkInstance instance_, vk::PhysicalDevice physical_, VkSurfaceKHR
763 const bool is_intel_windows = driver_id == VK_DRIVER_ID_INTEL_PROPRIETARY_WINDOWS; 838 const bool is_intel_windows = driver_id == VK_DRIVER_ID_INTEL_PROPRIETARY_WINDOWS;
764 const bool is_intel_anv = driver_id == VK_DRIVER_ID_INTEL_OPEN_SOURCE_MESA; 839 const bool is_intel_anv = driver_id == VK_DRIVER_ID_INTEL_OPEN_SOURCE_MESA;
765 if (ext_vertex_input_dynamic_state && is_intel_windows) { 840 if (ext_vertex_input_dynamic_state && is_intel_windows) {
766 LOG_WARNING(Render_Vulkan, "Blacklisting Intel for VK_EXT_vertex_input_dynamic_state"); 841 const u32 version = (properties.driverVersion << 3) >> 3;
767 ext_vertex_input_dynamic_state = false; 842 if (version < VK_MAKE_API_VERSION(27, 20, 100, 0)) {
843 LOG_WARNING(Render_Vulkan, "Blacklisting Intel for VK_EXT_vertex_input_dynamic_state");
844 ext_vertex_input_dynamic_state = false;
845 }
768 } 846 }
769 if (is_float16_supported && is_intel_windows) { 847 if (is_float16_supported && is_intel_windows) {
770 // Intel's compiler crashes when using fp16 on Astral Chain, disable it for the time being. 848 // Intel's compiler crashes when using fp16 on Astral Chain, disable it for the time being.
@@ -1024,6 +1102,8 @@ void Device::CheckSuitability(bool requires_swapchain) const {
1024 std::make_pair(features.vertexPipelineStoresAndAtomics, "vertexPipelineStoresAndAtomics"), 1102 std::make_pair(features.vertexPipelineStoresAndAtomics, "vertexPipelineStoresAndAtomics"),
1025 std::make_pair(features.imageCubeArray, "imageCubeArray"), 1103 std::make_pair(features.imageCubeArray, "imageCubeArray"),
1026 std::make_pair(features.independentBlend, "independentBlend"), 1104 std::make_pair(features.independentBlend, "independentBlend"),
1105 std::make_pair(features.multiDrawIndirect, "multiDrawIndirect"),
1106 std::make_pair(features.drawIndirectFirstInstance, "drawIndirectFirstInstance"),
1027 std::make_pair(features.depthClamp, "depthClamp"), 1107 std::make_pair(features.depthClamp, "depthClamp"),
1028 std::make_pair(features.samplerAnisotropy, "samplerAnisotropy"), 1108 std::make_pair(features.samplerAnisotropy, "samplerAnisotropy"),
1029 std::make_pair(features.largePoints, "largePoints"), 1109 std::make_pair(features.largePoints, "largePoints"),
@@ -1089,6 +1169,8 @@ std::vector<const char*> Device::LoadExtensions(bool requires_surface) {
1089 bool has_ext_transform_feedback{}; 1169 bool has_ext_transform_feedback{};
1090 bool has_ext_custom_border_color{}; 1170 bool has_ext_custom_border_color{};
1091 bool has_ext_extended_dynamic_state{}; 1171 bool has_ext_extended_dynamic_state{};
1172 bool has_ext_extended_dynamic_state_2{};
1173 bool has_ext_extended_dynamic_state_3{};
1092 bool has_ext_shader_atomic_int64{}; 1174 bool has_ext_shader_atomic_int64{};
1093 bool has_ext_provoking_vertex{}; 1175 bool has_ext_provoking_vertex{};
1094 bool has_ext_vertex_input_dynamic_state{}; 1176 bool has_ext_vertex_input_dynamic_state{};
@@ -1117,6 +1199,7 @@ std::vector<const char*> Device::LoadExtensions(bool requires_surface) {
1117 test(khr_spirv_1_4, VK_KHR_SPIRV_1_4_EXTENSION_NAME, true); 1199 test(khr_spirv_1_4, VK_KHR_SPIRV_1_4_EXTENSION_NAME, true);
1118 test(khr_push_descriptor, VK_KHR_PUSH_DESCRIPTOR_EXTENSION_NAME, true); 1200 test(khr_push_descriptor, VK_KHR_PUSH_DESCRIPTOR_EXTENSION_NAME, true);
1119 test(has_khr_shader_float16_int8, VK_KHR_SHADER_FLOAT16_INT8_EXTENSION_NAME, false); 1201 test(has_khr_shader_float16_int8, VK_KHR_SHADER_FLOAT16_INT8_EXTENSION_NAME, false);
1202 test(khr_draw_indirect_count, VK_KHR_DRAW_INDIRECT_COUNT_EXTENSION_NAME, true);
1120 test(ext_depth_range_unrestricted, VK_EXT_DEPTH_RANGE_UNRESTRICTED_EXTENSION_NAME, true); 1203 test(ext_depth_range_unrestricted, VK_EXT_DEPTH_RANGE_UNRESTRICTED_EXTENSION_NAME, true);
1121 test(ext_index_type_uint8, VK_EXT_INDEX_TYPE_UINT8_EXTENSION_NAME, true); 1204 test(ext_index_type_uint8, VK_EXT_INDEX_TYPE_UINT8_EXTENSION_NAME, true);
1122 test(has_ext_primitive_topology_list_restart, 1205 test(has_ext_primitive_topology_list_restart,
@@ -1132,6 +1215,10 @@ std::vector<const char*> Device::LoadExtensions(bool requires_surface) {
1132 test(has_ext_transform_feedback, VK_EXT_TRANSFORM_FEEDBACK_EXTENSION_NAME, false); 1215 test(has_ext_transform_feedback, VK_EXT_TRANSFORM_FEEDBACK_EXTENSION_NAME, false);
1133 test(has_ext_custom_border_color, VK_EXT_CUSTOM_BORDER_COLOR_EXTENSION_NAME, false); 1216 test(has_ext_custom_border_color, VK_EXT_CUSTOM_BORDER_COLOR_EXTENSION_NAME, false);
1134 test(has_ext_extended_dynamic_state, VK_EXT_EXTENDED_DYNAMIC_STATE_EXTENSION_NAME, false); 1217 test(has_ext_extended_dynamic_state, VK_EXT_EXTENDED_DYNAMIC_STATE_EXTENSION_NAME, false);
1218 test(has_ext_extended_dynamic_state_2, VK_EXT_EXTENDED_DYNAMIC_STATE_2_EXTENSION_NAME,
1219 false);
1220 test(has_ext_extended_dynamic_state_3, VK_EXT_EXTENDED_DYNAMIC_STATE_3_EXTENSION_NAME,
1221 false);
1135 test(has_ext_subgroup_size_control, VK_EXT_SUBGROUP_SIZE_CONTROL_EXTENSION_NAME, true); 1222 test(has_ext_subgroup_size_control, VK_EXT_SUBGROUP_SIZE_CONTROL_EXTENSION_NAME, true);
1136 test(has_ext_provoking_vertex, VK_EXT_PROVOKING_VERTEX_EXTENSION_NAME, false); 1223 test(has_ext_provoking_vertex, VK_EXT_PROVOKING_VERTEX_EXTENSION_NAME, false);
1137 test(has_ext_vertex_input_dynamic_state, VK_EXT_VERTEX_INPUT_DYNAMIC_STATE_EXTENSION_NAME, 1224 test(has_ext_vertex_input_dynamic_state, VK_EXT_VERTEX_INPUT_DYNAMIC_STATE_EXTENSION_NAME,
@@ -1281,6 +1368,44 @@ std::vector<const char*> Device::LoadExtensions(bool requires_surface) {
1281 ext_extended_dynamic_state = true; 1368 ext_extended_dynamic_state = true;
1282 } 1369 }
1283 } 1370 }
1371 if (has_ext_extended_dynamic_state_2) {
1372 VkPhysicalDeviceExtendedDynamicState2FeaturesEXT extended_dynamic_state_2;
1373 extended_dynamic_state_2.sType =
1374 VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_EXTENDED_DYNAMIC_STATE_2_FEATURES_EXT;
1375 extended_dynamic_state_2.pNext = nullptr;
1376 features.pNext = &extended_dynamic_state_2;
1377 physical.GetFeatures2(features);
1378
1379 if (extended_dynamic_state_2.extendedDynamicState2) {
1380 extensions.push_back(VK_EXT_EXTENDED_DYNAMIC_STATE_2_EXTENSION_NAME);
1381 ext_extended_dynamic_state_2 = true;
1382 ext_extended_dynamic_state_2_extra =
1383 extended_dynamic_state_2.extendedDynamicState2LogicOp;
1384 }
1385 }
1386 if (has_ext_extended_dynamic_state_3) {
1387 VkPhysicalDeviceExtendedDynamicState3FeaturesEXT extended_dynamic_state_3;
1388 extended_dynamic_state_3.sType =
1389 VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_EXTENDED_DYNAMIC_STATE_3_FEATURES_EXT;
1390 extended_dynamic_state_3.pNext = nullptr;
1391 features.pNext = &extended_dynamic_state_3;
1392 physical.GetFeatures2(features);
1393
1394 ext_extended_dynamic_state_3_blend =
1395 extended_dynamic_state_3.extendedDynamicState3ColorBlendEnable &&
1396 extended_dynamic_state_3.extendedDynamicState3ColorBlendEquation &&
1397 extended_dynamic_state_3.extendedDynamicState3ColorWriteMask;
1398
1399 ext_extended_dynamic_state_3_enables =
1400 extended_dynamic_state_3.extendedDynamicState3DepthClampEnable &&
1401 extended_dynamic_state_3.extendedDynamicState3LogicOpEnable;
1402
1403 ext_extended_dynamic_state_3 =
1404 ext_extended_dynamic_state_3_blend || ext_extended_dynamic_state_3_enables;
1405 if (ext_extended_dynamic_state_3) {
1406 extensions.push_back(VK_EXT_EXTENDED_DYNAMIC_STATE_3_EXTENSION_NAME);
1407 }
1408 }
1284 if (has_ext_line_rasterization) { 1409 if (has_ext_line_rasterization) {
1285 VkPhysicalDeviceLineRasterizationFeaturesEXT line_raster; 1410 VkPhysicalDeviceLineRasterizationFeaturesEXT line_raster;
1286 line_raster.sType = VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_LINE_RASTERIZATION_FEATURES_EXT; 1411 line_raster.sType = VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_LINE_RASTERIZATION_FEATURES_EXT;
diff --git a/src/video_core/vulkan_common/vulkan_device.h b/src/video_core/vulkan_common/vulkan_device.h
index 6a26c4e6e..920a8f4e3 100644
--- a/src/video_core/vulkan_common/vulkan_device.h
+++ b/src/video_core/vulkan_common/vulkan_device.h
@@ -286,6 +286,30 @@ public:
286 return ext_extended_dynamic_state; 286 return ext_extended_dynamic_state;
287 } 287 }
288 288
289 /// Returns true if the device supports VK_EXT_extended_dynamic_state2.
290 bool IsExtExtendedDynamicState2Supported() const {
291 return ext_extended_dynamic_state_2;
292 }
293
294 bool IsExtExtendedDynamicState2ExtrasSupported() const {
295 return ext_extended_dynamic_state_2_extra;
296 }
297
298 /// Returns true if the device supports VK_EXT_extended_dynamic_state3.
299 bool IsExtExtendedDynamicState3Supported() const {
300 return ext_extended_dynamic_state_3;
301 }
302
303 /// Returns true if the device supports VK_EXT_extended_dynamic_state3.
304 bool IsExtExtendedDynamicState3BlendingSupported() const {
305 return ext_extended_dynamic_state_3_blend;
306 }
307
308 /// Returns true if the device supports VK_EXT_extended_dynamic_state3.
309 bool IsExtExtendedDynamicState3EnablesSupported() const {
310 return ext_extended_dynamic_state_3_enables;
311 }
312
289 /// Returns true if the device supports VK_EXT_line_rasterization. 313 /// Returns true if the device supports VK_EXT_line_rasterization.
290 bool IsExtLineRasterizationSupported() const { 314 bool IsExtLineRasterizationSupported() const {
291 return ext_line_rasterization; 315 return ext_line_rasterization;
@@ -451,6 +475,7 @@ private:
451 bool nv_viewport_swizzle{}; ///< Support for VK_NV_viewport_swizzle. 475 bool nv_viewport_swizzle{}; ///< Support for VK_NV_viewport_swizzle.
452 bool nv_viewport_array2{}; ///< Support for VK_NV_viewport_array2. 476 bool nv_viewport_array2{}; ///< Support for VK_NV_viewport_array2.
453 bool nv_geometry_shader_passthrough{}; ///< Support for VK_NV_geometry_shader_passthrough. 477 bool nv_geometry_shader_passthrough{}; ///< Support for VK_NV_geometry_shader_passthrough.
478 bool khr_draw_indirect_count{}; ///< Support for VK_KHR_draw_indirect_count.
454 bool khr_uniform_buffer_standard_layout{}; ///< Support for scalar uniform buffer layouts. 479 bool khr_uniform_buffer_standard_layout{}; ///< Support for scalar uniform buffer layouts.
455 bool khr_spirv_1_4{}; ///< Support for VK_KHR_spirv_1_4. 480 bool khr_spirv_1_4{}; ///< Support for VK_KHR_spirv_1_4.
456 bool khr_workgroup_memory_explicit_layout{}; ///< Support for explicit workgroup layouts. 481 bool khr_workgroup_memory_explicit_layout{}; ///< Support for explicit workgroup layouts.
@@ -461,28 +486,33 @@ private:
461 bool ext_sampler_filter_minmax{}; ///< Support for VK_EXT_sampler_filter_minmax. 486 bool ext_sampler_filter_minmax{}; ///< Support for VK_EXT_sampler_filter_minmax.
462 bool ext_depth_clip_control{}; ///< Support for VK_EXT_depth_clip_control 487 bool ext_depth_clip_control{}; ///< Support for VK_EXT_depth_clip_control
463 bool ext_depth_range_unrestricted{}; ///< Support for VK_EXT_depth_range_unrestricted. 488 bool ext_depth_range_unrestricted{}; ///< Support for VK_EXT_depth_range_unrestricted.
464 bool ext_shader_viewport_index_layer{}; ///< Support for VK_EXT_shader_viewport_index_layer. 489 bool ext_shader_viewport_index_layer{}; ///< Support for VK_EXT_shader_viewport_index_layer.
465 bool ext_tooling_info{}; ///< Support for VK_EXT_tooling_info. 490 bool ext_tooling_info{}; ///< Support for VK_EXT_tooling_info.
466 bool ext_subgroup_size_control{}; ///< Support for VK_EXT_subgroup_size_control. 491 bool ext_subgroup_size_control{}; ///< Support for VK_EXT_subgroup_size_control.
467 bool ext_transform_feedback{}; ///< Support for VK_EXT_transform_feedback. 492 bool ext_transform_feedback{}; ///< Support for VK_EXT_transform_feedback.
468 bool ext_custom_border_color{}; ///< Support for VK_EXT_custom_border_color. 493 bool ext_custom_border_color{}; ///< Support for VK_EXT_custom_border_color.
469 bool ext_extended_dynamic_state{}; ///< Support for VK_EXT_extended_dynamic_state. 494 bool ext_extended_dynamic_state{}; ///< Support for VK_EXT_extended_dynamic_state.
470 bool ext_line_rasterization{}; ///< Support for VK_EXT_line_rasterization. 495 bool ext_extended_dynamic_state_2{}; ///< Support for VK_EXT_extended_dynamic_state2.
471 bool ext_vertex_input_dynamic_state{}; ///< Support for VK_EXT_vertex_input_dynamic_state. 496 bool ext_extended_dynamic_state_2_extra{}; ///< Support for VK_EXT_extended_dynamic_state2.
472 bool ext_shader_stencil_export{}; ///< Support for VK_EXT_shader_stencil_export. 497 bool ext_extended_dynamic_state_3{}; ///< Support for VK_EXT_extended_dynamic_state3.
473 bool ext_shader_atomic_int64{}; ///< Support for VK_KHR_shader_atomic_int64. 498 bool ext_extended_dynamic_state_3_blend{}; ///< Support for VK_EXT_extended_dynamic_state3.
474 bool ext_conservative_rasterization{}; ///< Support for VK_EXT_conservative_rasterization. 499 bool ext_extended_dynamic_state_3_enables{}; ///< Support for VK_EXT_extended_dynamic_state3.
475 bool ext_provoking_vertex{}; ///< Support for VK_EXT_provoking_vertex. 500 bool ext_line_rasterization{}; ///< Support for VK_EXT_line_rasterization.
476 bool ext_memory_budget{}; ///< Support for VK_EXT_memory_budget. 501 bool ext_vertex_input_dynamic_state{}; ///< Support for VK_EXT_vertex_input_dynamic_state.
477 bool nv_device_diagnostics_config{}; ///< Support for VK_NV_device_diagnostics_config. 502 bool ext_shader_stencil_export{}; ///< Support for VK_EXT_shader_stencil_export.
478 bool has_broken_cube_compatibility{}; ///< Has broken cube compatiblity bit 503 bool ext_shader_atomic_int64{}; ///< Support for VK_KHR_shader_atomic_int64.
479 bool has_renderdoc{}; ///< Has RenderDoc attached 504 bool ext_conservative_rasterization{}; ///< Support for VK_EXT_conservative_rasterization.
480 bool has_nsight_graphics{}; ///< Has Nsight Graphics attached 505 bool ext_provoking_vertex{}; ///< Support for VK_EXT_provoking_vertex.
481 bool supports_d24_depth{}; ///< Supports D24 depth buffers. 506 bool ext_memory_budget{}; ///< Support for VK_EXT_memory_budget.
482 bool cant_blit_msaa{}; ///< Does not support MSAA<->MSAA blitting. 507 bool nv_device_diagnostics_config{}; ///< Support for VK_NV_device_diagnostics_config.
483 bool must_emulate_bgr565{}; ///< Emulates BGR565 by swizzling RGB565 format. 508 bool has_broken_cube_compatibility{}; ///< Has broken cube compatiblity bit
484 u32 max_vertex_input_attributes{}; ///< Max vertex input attributes in pipeline 509 bool has_renderdoc{}; ///< Has RenderDoc attached
485 u32 max_vertex_input_bindings{}; ///< Max vertex input buffers in pipeline 510 bool has_nsight_graphics{}; ///< Has Nsight Graphics attached
511 bool supports_d24_depth{}; ///< Supports D24 depth buffers.
512 bool cant_blit_msaa{}; ///< Does not support MSAA<->MSAA blitting.
513 bool must_emulate_bgr565{}; ///< Emulates BGR565 by swizzling RGB565 format.
514 u32 max_vertex_input_attributes{}; ///< Max vertex input attributes in pipeline
515 u32 max_vertex_input_bindings{}; ///< Max vertex input buffers in pipeline
486 516
487 // Telemetry parameters 517 // Telemetry parameters
488 std::string vendor_name; ///< Device's driver name. 518 std::string vendor_name; ///< Device's driver name.
diff --git a/src/video_core/vulkan_common/vulkan_wrapper.cpp b/src/video_core/vulkan_common/vulkan_wrapper.cpp
index 7dca7341c..861767c13 100644
--- a/src/video_core/vulkan_common/vulkan_wrapper.cpp
+++ b/src/video_core/vulkan_common/vulkan_wrapper.cpp
@@ -94,6 +94,10 @@ void Load(VkDevice device, DeviceDispatch& dld) noexcept {
94 X(vkCmdDispatch); 94 X(vkCmdDispatch);
95 X(vkCmdDraw); 95 X(vkCmdDraw);
96 X(vkCmdDrawIndexed); 96 X(vkCmdDrawIndexed);
97 X(vkCmdDrawIndirect);
98 X(vkCmdDrawIndexedIndirect);
99 X(vkCmdDrawIndirectCountKHR);
100 X(vkCmdDrawIndexedIndirectCountKHR);
97 X(vkCmdEndQuery); 101 X(vkCmdEndQuery);
98 X(vkCmdEndRenderPass); 102 X(vkCmdEndRenderPass);
99 X(vkCmdEndTransformFeedbackEXT); 103 X(vkCmdEndTransformFeedbackEXT);
@@ -118,12 +122,22 @@ void Load(VkDevice device, DeviceDispatch& dld) noexcept {
118 X(vkCmdSetDepthCompareOpEXT); 122 X(vkCmdSetDepthCompareOpEXT);
119 X(vkCmdSetDepthTestEnableEXT); 123 X(vkCmdSetDepthTestEnableEXT);
120 X(vkCmdSetDepthWriteEnableEXT); 124 X(vkCmdSetDepthWriteEnableEXT);
125 X(vkCmdSetPrimitiveRestartEnableEXT);
126 X(vkCmdSetRasterizerDiscardEnableEXT);
127 X(vkCmdSetDepthBiasEnableEXT);
128 X(vkCmdSetLogicOpEnableEXT);
129 X(vkCmdSetDepthClampEnableEXT);
121 X(vkCmdSetFrontFaceEXT); 130 X(vkCmdSetFrontFaceEXT);
131 X(vkCmdSetLogicOpEXT);
132 X(vkCmdSetPatchControlPointsEXT);
122 X(vkCmdSetLineWidth); 133 X(vkCmdSetLineWidth);
123 X(vkCmdSetPrimitiveTopologyEXT); 134 X(vkCmdSetPrimitiveTopologyEXT);
124 X(vkCmdSetStencilOpEXT); 135 X(vkCmdSetStencilOpEXT);
125 X(vkCmdSetStencilTestEnableEXT); 136 X(vkCmdSetStencilTestEnableEXT);
126 X(vkCmdSetVertexInputEXT); 137 X(vkCmdSetVertexInputEXT);
138 X(vkCmdSetColorWriteMaskEXT);
139 X(vkCmdSetColorBlendEnableEXT);
140 X(vkCmdSetColorBlendEquationEXT);
127 X(vkCmdResolveImage); 141 X(vkCmdResolveImage);
128 X(vkCreateBuffer); 142 X(vkCreateBuffer);
129 X(vkCreateBufferView); 143 X(vkCreateBufferView);
diff --git a/src/video_core/vulkan_common/vulkan_wrapper.h b/src/video_core/vulkan_common/vulkan_wrapper.h
index 8bd4fd4d9..accfad8c1 100644
--- a/src/video_core/vulkan_common/vulkan_wrapper.h
+++ b/src/video_core/vulkan_common/vulkan_wrapper.h
@@ -213,6 +213,10 @@ struct DeviceDispatch : InstanceDispatch {
213 PFN_vkCmdDispatch vkCmdDispatch{}; 213 PFN_vkCmdDispatch vkCmdDispatch{};
214 PFN_vkCmdDraw vkCmdDraw{}; 214 PFN_vkCmdDraw vkCmdDraw{};
215 PFN_vkCmdDrawIndexed vkCmdDrawIndexed{}; 215 PFN_vkCmdDrawIndexed vkCmdDrawIndexed{};
216 PFN_vkCmdDrawIndirect vkCmdDrawIndirect{};
217 PFN_vkCmdDrawIndexedIndirect vkCmdDrawIndexedIndirect{};
218 PFN_vkCmdDrawIndirectCountKHR vkCmdDrawIndirectCountKHR{};
219 PFN_vkCmdDrawIndexedIndirectCountKHR vkCmdDrawIndexedIndirectCountKHR{};
216 PFN_vkCmdEndDebugUtilsLabelEXT vkCmdEndDebugUtilsLabelEXT{}; 220 PFN_vkCmdEndDebugUtilsLabelEXT vkCmdEndDebugUtilsLabelEXT{};
217 PFN_vkCmdEndQuery vkCmdEndQuery{}; 221 PFN_vkCmdEndQuery vkCmdEndQuery{};
218 PFN_vkCmdEndRenderPass vkCmdEndRenderPass{}; 222 PFN_vkCmdEndRenderPass vkCmdEndRenderPass{};
@@ -230,8 +234,15 @@ struct DeviceDispatch : InstanceDispatch {
230 PFN_vkCmdSetDepthCompareOpEXT vkCmdSetDepthCompareOpEXT{}; 234 PFN_vkCmdSetDepthCompareOpEXT vkCmdSetDepthCompareOpEXT{};
231 PFN_vkCmdSetDepthTestEnableEXT vkCmdSetDepthTestEnableEXT{}; 235 PFN_vkCmdSetDepthTestEnableEXT vkCmdSetDepthTestEnableEXT{};
232 PFN_vkCmdSetDepthWriteEnableEXT vkCmdSetDepthWriteEnableEXT{}; 236 PFN_vkCmdSetDepthWriteEnableEXT vkCmdSetDepthWriteEnableEXT{};
237 PFN_vkCmdSetPrimitiveRestartEnableEXT vkCmdSetPrimitiveRestartEnableEXT{};
238 PFN_vkCmdSetRasterizerDiscardEnableEXT vkCmdSetRasterizerDiscardEnableEXT{};
239 PFN_vkCmdSetDepthBiasEnableEXT vkCmdSetDepthBiasEnableEXT{};
240 PFN_vkCmdSetLogicOpEnableEXT vkCmdSetLogicOpEnableEXT{};
241 PFN_vkCmdSetDepthClampEnableEXT vkCmdSetDepthClampEnableEXT{};
233 PFN_vkCmdSetEvent vkCmdSetEvent{}; 242 PFN_vkCmdSetEvent vkCmdSetEvent{};
234 PFN_vkCmdSetFrontFaceEXT vkCmdSetFrontFaceEXT{}; 243 PFN_vkCmdSetFrontFaceEXT vkCmdSetFrontFaceEXT{};
244 PFN_vkCmdSetPatchControlPointsEXT vkCmdSetPatchControlPointsEXT{};
245 PFN_vkCmdSetLogicOpEXT vkCmdSetLogicOpEXT{};
235 PFN_vkCmdSetLineWidth vkCmdSetLineWidth{}; 246 PFN_vkCmdSetLineWidth vkCmdSetLineWidth{};
236 PFN_vkCmdSetPrimitiveTopologyEXT vkCmdSetPrimitiveTopologyEXT{}; 247 PFN_vkCmdSetPrimitiveTopologyEXT vkCmdSetPrimitiveTopologyEXT{};
237 PFN_vkCmdSetScissor vkCmdSetScissor{}; 248 PFN_vkCmdSetScissor vkCmdSetScissor{};
@@ -242,6 +253,9 @@ struct DeviceDispatch : InstanceDispatch {
242 PFN_vkCmdSetStencilWriteMask vkCmdSetStencilWriteMask{}; 253 PFN_vkCmdSetStencilWriteMask vkCmdSetStencilWriteMask{};
243 PFN_vkCmdSetVertexInputEXT vkCmdSetVertexInputEXT{}; 254 PFN_vkCmdSetVertexInputEXT vkCmdSetVertexInputEXT{};
244 PFN_vkCmdSetViewport vkCmdSetViewport{}; 255 PFN_vkCmdSetViewport vkCmdSetViewport{};
256 PFN_vkCmdSetColorWriteMaskEXT vkCmdSetColorWriteMaskEXT{};
257 PFN_vkCmdSetColorBlendEnableEXT vkCmdSetColorBlendEnableEXT{};
258 PFN_vkCmdSetColorBlendEquationEXT vkCmdSetColorBlendEquationEXT{};
245 PFN_vkCmdWaitEvents vkCmdWaitEvents{}; 259 PFN_vkCmdWaitEvents vkCmdWaitEvents{};
246 PFN_vkCreateBuffer vkCreateBuffer{}; 260 PFN_vkCreateBuffer vkCreateBuffer{};
247 PFN_vkCreateBufferView vkCreateBufferView{}; 261 PFN_vkCreateBufferView vkCreateBufferView{};
@@ -1019,6 +1033,29 @@ public:
1019 first_instance); 1033 first_instance);
1020 } 1034 }
1021 1035
1036 void DrawIndirect(VkBuffer src_buffer, VkDeviceSize src_offset, u32 draw_count,
1037 u32 stride) const noexcept {
1038 dld->vkCmdDrawIndirect(handle, src_buffer, src_offset, draw_count, stride);
1039 }
1040
1041 void DrawIndexedIndirect(VkBuffer src_buffer, VkDeviceSize src_offset, u32 draw_count,
1042 u32 stride) const noexcept {
1043 dld->vkCmdDrawIndexedIndirect(handle, src_buffer, src_offset, draw_count, stride);
1044 }
1045
1046 void DrawIndirectCount(VkBuffer src_buffer, VkDeviceSize src_offset, VkBuffer count_buffer,
1047 VkDeviceSize count_offset, u32 draw_count, u32 stride) const noexcept {
1048 dld->vkCmdDrawIndirectCountKHR(handle, src_buffer, src_offset, count_buffer, count_offset,
1049 draw_count, stride);
1050 }
1051
1052 void DrawIndexedIndirectCount(VkBuffer src_buffer, VkDeviceSize src_offset,
1053 VkBuffer count_buffer, VkDeviceSize count_offset, u32 draw_count,
1054 u32 stride) const noexcept {
1055 dld->vkCmdDrawIndexedIndirectCountKHR(handle, src_buffer, src_offset, count_buffer,
1056 count_offset, draw_count, stride);
1057 }
1058
1022 void ClearAttachments(Span<VkClearAttachment> attachments, 1059 void ClearAttachments(Span<VkClearAttachment> attachments,
1023 Span<VkClearRect> rects) const noexcept { 1060 Span<VkClearRect> rects) const noexcept {
1024 dld->vkCmdClearAttachments(handle, attachments.size(), attachments.data(), rects.size(), 1061 dld->vkCmdClearAttachments(handle, attachments.size(), attachments.data(), rects.size(),
@@ -1192,10 +1229,51 @@ public:
1192 dld->vkCmdSetDepthWriteEnableEXT(handle, enable ? VK_TRUE : VK_FALSE); 1229 dld->vkCmdSetDepthWriteEnableEXT(handle, enable ? VK_TRUE : VK_FALSE);
1193 } 1230 }
1194 1231
1232 void SetPrimitiveRestartEnableEXT(bool enable) const noexcept {
1233 dld->vkCmdSetPrimitiveRestartEnableEXT(handle, enable ? VK_TRUE : VK_FALSE);
1234 }
1235
1236 void SetRasterizerDiscardEnableEXT(bool enable) const noexcept {
1237 dld->vkCmdSetRasterizerDiscardEnableEXT(handle, enable ? VK_TRUE : VK_FALSE);
1238 }
1239
1240 void SetDepthBiasEnableEXT(bool enable) const noexcept {
1241 dld->vkCmdSetDepthBiasEnableEXT(handle, enable ? VK_TRUE : VK_FALSE);
1242 }
1243
1244 void SetLogicOpEnableEXT(bool enable) const noexcept {
1245 dld->vkCmdSetLogicOpEnableEXT(handle, enable ? VK_TRUE : VK_FALSE);
1246 }
1247
1248 void SetDepthClampEnableEXT(bool enable) const noexcept {
1249 dld->vkCmdSetDepthClampEnableEXT(handle, enable ? VK_TRUE : VK_FALSE);
1250 }
1251
1195 void SetFrontFaceEXT(VkFrontFace front_face) const noexcept { 1252 void SetFrontFaceEXT(VkFrontFace front_face) const noexcept {
1196 dld->vkCmdSetFrontFaceEXT(handle, front_face); 1253 dld->vkCmdSetFrontFaceEXT(handle, front_face);
1197 } 1254 }
1198 1255
1256 void SetLogicOpEXT(VkLogicOp logic_op) const noexcept {
1257 dld->vkCmdSetLogicOpEXT(handle, logic_op);
1258 }
1259
1260 void SetPatchControlPointsEXT(uint32_t patch_control_points) const noexcept {
1261 dld->vkCmdSetPatchControlPointsEXT(handle, patch_control_points);
1262 }
1263
1264 void SetColorWriteMaskEXT(u32 first, Span<VkColorComponentFlags> masks) const noexcept {
1265 dld->vkCmdSetColorWriteMaskEXT(handle, first, masks.size(), masks.data());
1266 }
1267
1268 void SetColorBlendEnableEXT(u32 first, Span<VkBool32> enables) const noexcept {
1269 dld->vkCmdSetColorBlendEnableEXT(handle, first, enables.size(), enables.data());
1270 }
1271
1272 void SetColorBlendEquationEXT(u32 first,
1273 Span<VkColorBlendEquationEXT> equations) const noexcept {
1274 dld->vkCmdSetColorBlendEquationEXT(handle, first, equations.size(), equations.data());
1275 }
1276
1199 void SetLineWidth(float line_width) const noexcept { 1277 void SetLineWidth(float line_width) const noexcept {
1200 dld->vkCmdSetLineWidth(handle, line_width); 1278 dld->vkCmdSetLineWidth(handle, line_width);
1201 } 1279 }
diff --git a/src/yuzu/configuration/config.cpp b/src/yuzu/configuration/config.cpp
index 3e51426c8..e9425b5bd 100644
--- a/src/yuzu/configuration/config.cpp
+++ b/src/yuzu/configuration/config.cpp
@@ -562,6 +562,7 @@ void Config::ReadDebuggingValues() {
562 ReadBasicSetting(Settings::values.reporting_services); 562 ReadBasicSetting(Settings::values.reporting_services);
563 ReadBasicSetting(Settings::values.quest_flag); 563 ReadBasicSetting(Settings::values.quest_flag);
564 ReadBasicSetting(Settings::values.disable_macro_jit); 564 ReadBasicSetting(Settings::values.disable_macro_jit);
565 ReadBasicSetting(Settings::values.disable_macro_hle);
565 ReadBasicSetting(Settings::values.extended_logging); 566 ReadBasicSetting(Settings::values.extended_logging);
566 ReadBasicSetting(Settings::values.use_debug_asserts); 567 ReadBasicSetting(Settings::values.use_debug_asserts);
567 ReadBasicSetting(Settings::values.use_auto_stub); 568 ReadBasicSetting(Settings::values.use_auto_stub);
@@ -1198,6 +1199,7 @@ void Config::SaveDebuggingValues() {
1198 WriteBasicSetting(Settings::values.quest_flag); 1199 WriteBasicSetting(Settings::values.quest_flag);
1199 WriteBasicSetting(Settings::values.use_debug_asserts); 1200 WriteBasicSetting(Settings::values.use_debug_asserts);
1200 WriteBasicSetting(Settings::values.disable_macro_jit); 1201 WriteBasicSetting(Settings::values.disable_macro_jit);
1202 WriteBasicSetting(Settings::values.disable_macro_hle);
1201 WriteBasicSetting(Settings::values.enable_all_controllers); 1203 WriteBasicSetting(Settings::values.enable_all_controllers);
1202 WriteBasicSetting(Settings::values.create_crash_dumps); 1204 WriteBasicSetting(Settings::values.create_crash_dumps);
1203 WriteBasicSetting(Settings::values.perform_vulkan_check); 1205 WriteBasicSetting(Settings::values.perform_vulkan_check);
diff --git a/src/yuzu/configuration/configure_debug.cpp b/src/yuzu/configuration/configure_debug.cpp
index dacc75a20..cbeb8f168 100644
--- a/src/yuzu/configuration/configure_debug.cpp
+++ b/src/yuzu/configuration/configure_debug.cpp
@@ -73,6 +73,8 @@ void ConfigureDebug::SetConfiguration() {
73 ui->dump_macros->setChecked(Settings::values.dump_macros.GetValue()); 73 ui->dump_macros->setChecked(Settings::values.dump_macros.GetValue());
74 ui->disable_macro_jit->setEnabled(runtime_lock); 74 ui->disable_macro_jit->setEnabled(runtime_lock);
75 ui->disable_macro_jit->setChecked(Settings::values.disable_macro_jit.GetValue()); 75 ui->disable_macro_jit->setChecked(Settings::values.disable_macro_jit.GetValue());
76 ui->disable_macro_hle->setEnabled(runtime_lock);
77 ui->disable_macro_hle->setChecked(Settings::values.disable_macro_hle.GetValue());
76 ui->disable_loop_safety_checks->setEnabled(runtime_lock); 78 ui->disable_loop_safety_checks->setEnabled(runtime_lock);
77 ui->disable_loop_safety_checks->setChecked( 79 ui->disable_loop_safety_checks->setChecked(
78 Settings::values.disable_shader_loop_safety_checks.GetValue()); 80 Settings::values.disable_shader_loop_safety_checks.GetValue());
@@ -117,6 +119,7 @@ void ConfigureDebug::ApplyConfiguration() {
117 Settings::values.disable_shader_loop_safety_checks = 119 Settings::values.disable_shader_loop_safety_checks =
118 ui->disable_loop_safety_checks->isChecked(); 120 ui->disable_loop_safety_checks->isChecked();
119 Settings::values.disable_macro_jit = ui->disable_macro_jit->isChecked(); 121 Settings::values.disable_macro_jit = ui->disable_macro_jit->isChecked();
122 Settings::values.disable_macro_hle = ui->disable_macro_hle->isChecked();
120 Settings::values.extended_logging = ui->extended_logging->isChecked(); 123 Settings::values.extended_logging = ui->extended_logging->isChecked();
121 Settings::values.perform_vulkan_check = ui->perform_vulkan_check->isChecked(); 124 Settings::values.perform_vulkan_check = ui->perform_vulkan_check->isChecked();
122 UISettings::values.disable_web_applet = ui->disable_web_applet->isChecked(); 125 UISettings::values.disable_web_applet = ui->disable_web_applet->isChecked();
diff --git a/src/yuzu/configuration/configure_debug.ui b/src/yuzu/configuration/configure_debug.ui
index 102c8c66c..15acefe33 100644
--- a/src/yuzu/configuration/configure_debug.ui
+++ b/src/yuzu/configuration/configure_debug.ui
@@ -176,7 +176,7 @@
176 </property> 176 </property>
177 </widget> 177 </widget>
178 </item> 178 </item>
179 <item row="0" column="2"> 179 <item row="1" column="2">
180 <widget class="QCheckBox" name="dump_macros"> 180 <widget class="QCheckBox" name="dump_macros">
181 <property name="enabled"> 181 <property name="enabled">
182 <bool>true</bool> 182 <bool>true</bool>
@@ -202,6 +202,19 @@
202 </property> 202 </property>
203 </widget> 203 </widget>
204 </item> 204 </item>
205 <item row="0" column="2">
206 <widget class="QCheckBox" name="disable_macro_hle">
207 <property name="enabled">
208 <bool>true</bool>
209 </property>
210 <property name="toolTip">
211 <string>When checked, it disables the macro HLE functions. Enabling this makes games run slower</string>
212 </property>
213 <property name="text">
214 <string>Disable Macro HLE</string>
215 </property>
216 </widget>
217 </item>
205 <item row="1" column="0"> 218 <item row="1" column="0">
206 <widget class="QCheckBox" name="enable_shader_feedback"> 219 <widget class="QCheckBox" name="enable_shader_feedback">
207 <property name="toolTip"> 220 <property name="toolTip">
diff --git a/src/yuzu_cmd/config.cpp b/src/yuzu_cmd/config.cpp
index de9b220da..1e45e57bc 100644
--- a/src/yuzu_cmd/config.cpp
+++ b/src/yuzu_cmd/config.cpp
@@ -348,6 +348,7 @@ void Config::ReadValues() {
348 ReadSetting("Debugging", Settings::values.use_debug_asserts); 348 ReadSetting("Debugging", Settings::values.use_debug_asserts);
349 ReadSetting("Debugging", Settings::values.use_auto_stub); 349 ReadSetting("Debugging", Settings::values.use_auto_stub);
350 ReadSetting("Debugging", Settings::values.disable_macro_jit); 350 ReadSetting("Debugging", Settings::values.disable_macro_jit);
351 ReadSetting("Debugging", Settings::values.disable_macro_hle);
351 ReadSetting("Debugging", Settings::values.use_gdbstub); 352 ReadSetting("Debugging", Settings::values.use_gdbstub);
352 ReadSetting("Debugging", Settings::values.gdbstub_port); 353 ReadSetting("Debugging", Settings::values.gdbstub_port);
353 354