diff options
| author | 2020-11-23 15:01:40 -0500 | |
|---|---|---|
| committer | 2021-02-13 13:07:53 -0500 | |
| commit | 77564f987cc52ea6d841e7d18ade2646783f3651 (patch) | |
| tree | 6c21f3c58453d3af5fba62b1fa59266d1149c180 | |
| parent | nvdec cleanup (diff) | |
| download | yuzu-77564f987cc52ea6d841e7d18ade2646783f3651.tar.gz yuzu-77564f987cc52ea6d841e7d18ade2646783f3651.tar.xz yuzu-77564f987cc52ea6d841e7d18ade2646783f3651.zip | |
streamline cdma_pusher/command_classes
| -rw-r--r-- | src/video_core/cdma_pusher.cpp | 51 | ||||
| -rw-r--r-- | src/video_core/cdma_pusher.h | 14 | ||||
| -rw-r--r-- | src/video_core/command_classes/nvdec.cpp | 8 | ||||
| -rw-r--r-- | src/video_core/command_classes/nvdec.h | 2 | ||||
| -rw-r--r-- | src/video_core/command_classes/vic.h | 44 |
5 files changed, 34 insertions, 85 deletions
diff --git a/src/video_core/cdma_pusher.cpp b/src/video_core/cdma_pusher.cpp index c725baa98..d80e74225 100644 --- a/src/video_core/cdma_pusher.cpp +++ b/src/video_core/cdma_pusher.cpp | |||
| @@ -38,45 +38,42 @@ CDmaPusher::CDmaPusher(GPU& gpu_) | |||
| 38 | CDmaPusher::~CDmaPusher() = default; | 38 | CDmaPusher::~CDmaPusher() = default; |
| 39 | 39 | ||
| 40 | void CDmaPusher::ProcessEntries(ChCommandHeaderList&& entries) { | 40 | void CDmaPusher::ProcessEntries(ChCommandHeaderList&& entries) { |
| 41 | std::vector<u32> values(entries.size()); | 41 | for (const auto& value : entries) { |
| 42 | std::memcpy(values.data(), entries.data(), entries.size() * sizeof(u32)); | ||
| 43 | |||
| 44 | for (const u32 value : values) { | ||
| 45 | if (mask != 0) { | 42 | if (mask != 0) { |
| 46 | const auto lbs = static_cast<u32>(std::countr_zero(mask)); | 43 | const auto lbs = static_cast<u32>(std::countr_zero(mask)); |
| 47 | mask &= ~(1U << lbs); | 44 | mask &= ~(1U << lbs); |
| 48 | ExecuteCommand(static_cast<u32>(offset + lbs), value); | 45 | ExecuteCommand(offset + lbs, value.raw); |
| 49 | continue; | 46 | continue; |
| 50 | } else if (count != 0) { | 47 | } else if (count != 0) { |
| 51 | --count; | 48 | --count; |
| 52 | ExecuteCommand(static_cast<u32>(offset), value); | 49 | ExecuteCommand(offset, value.raw); |
| 53 | if (incrementing) { | 50 | if (incrementing) { |
| 54 | ++offset; | 51 | ++offset; |
| 55 | } | 52 | } |
| 56 | continue; | 53 | continue; |
| 57 | } | 54 | } |
| 58 | const auto mode = static_cast<ChSubmissionMode>((value >> 28) & 0xf); | 55 | const auto mode = value.submission_mode.Value(); |
| 59 | switch (mode) { | 56 | switch (mode) { |
| 60 | case ChSubmissionMode::SetClass: { | 57 | case ChSubmissionMode::SetClass: { |
| 61 | mask = value & 0x3f; | 58 | mask = value.value & 0x3f; |
| 62 | offset = (value >> 16) & 0xfff; | 59 | offset = value.method_offset; |
| 63 | current_class = static_cast<ChClassId>((value >> 6) & 0x3ff); | 60 | current_class = static_cast<ChClassId>((value.value >> 6) & 0x3ff); |
| 64 | break; | 61 | break; |
| 65 | } | 62 | } |
| 66 | case ChSubmissionMode::Incrementing: | 63 | case ChSubmissionMode::Incrementing: |
| 67 | case ChSubmissionMode::NonIncrementing: | 64 | case ChSubmissionMode::NonIncrementing: |
| 68 | count = value & 0xffff; | 65 | count = value.value; |
| 69 | offset = (value >> 16) & 0xfff; | 66 | offset = value.method_offset; |
| 70 | incrementing = mode == ChSubmissionMode::Incrementing; | 67 | incrementing = mode == ChSubmissionMode::Incrementing; |
| 71 | break; | 68 | break; |
| 72 | case ChSubmissionMode::Mask: | 69 | case ChSubmissionMode::Mask: |
| 73 | mask = value & 0xffff; | 70 | mask = value.value; |
| 74 | offset = (value >> 16) & 0xfff; | 71 | offset = value.method_offset; |
| 75 | break; | 72 | break; |
| 76 | case ChSubmissionMode::Immediate: { | 73 | case ChSubmissionMode::Immediate: { |
| 77 | const u32 data = value & 0xfff; | 74 | const u32 data = value.value & 0xfff; |
| 78 | offset = (value >> 16) & 0xfff; | 75 | offset = value.method_offset; |
| 79 | ExecuteCommand(static_cast<u32>(offset), data); | 76 | ExecuteCommand(offset, data); |
| 80 | break; | 77 | break; |
| 81 | } | 78 | } |
| 82 | default: | 79 | default: |
| @@ -89,8 +86,8 @@ void CDmaPusher::ProcessEntries(ChCommandHeaderList&& entries) { | |||
| 89 | void CDmaPusher::ExecuteCommand(u32 state_offset, u32 data) { | 86 | void CDmaPusher::ExecuteCommand(u32 state_offset, u32 data) { |
| 90 | switch (current_class) { | 87 | switch (current_class) { |
| 91 | case ChClassId::NvDec: | 88 | case ChClassId::NvDec: |
| 92 | ThiStateWrite(nvdec_thi_state, state_offset, {data}); | 89 | ThiStateWrite(nvdec_thi_state, offset, data); |
| 93 | switch (static_cast<ThiMethod>(state_offset)) { | 90 | switch (static_cast<ThiMethod>(offset)) { |
| 94 | case ThiMethod::IncSyncpt: { | 91 | case ThiMethod::IncSyncpt: { |
| 95 | LOG_DEBUG(Service_NVDRV, "NVDEC Class IncSyncpt Method"); | 92 | LOG_DEBUG(Service_NVDRV, "NVDEC Class IncSyncpt Method"); |
| 96 | const auto syncpoint_id = static_cast<u32>(data & 0xFF); | 93 | const auto syncpoint_id = static_cast<u32>(data & 0xFF); |
| @@ -106,8 +103,8 @@ void CDmaPusher::ExecuteCommand(u32 state_offset, u32 data) { | |||
| 106 | case ThiMethod::SetMethod1: | 103 | case ThiMethod::SetMethod1: |
| 107 | LOG_DEBUG(Service_NVDRV, "NVDEC method 0x{:X}", | 104 | LOG_DEBUG(Service_NVDRV, "NVDEC method 0x{:X}", |
| 108 | static_cast<u32>(nvdec_thi_state.method_0)); | 105 | static_cast<u32>(nvdec_thi_state.method_0)); |
| 109 | nvdec_processor->ProcessMethod(static_cast<Nvdec::Method>(nvdec_thi_state.method_0), | 106 | nvdec_processor->ProcessMethod( |
| 110 | {data}); | 107 | static_cast<Tegra::Nvdec::Method>(nvdec_thi_state.method_0), data); |
| 111 | break; | 108 | break; |
| 112 | default: | 109 | default: |
| 113 | break; | 110 | break; |
| @@ -131,7 +128,8 @@ void CDmaPusher::ExecuteCommand(u32 state_offset, u32 data) { | |||
| 131 | case ThiMethod::SetMethod1: | 128 | case ThiMethod::SetMethod1: |
| 132 | LOG_DEBUG(Service_NVDRV, "VIC method 0x{:X}, Args=({})", | 129 | LOG_DEBUG(Service_NVDRV, "VIC method 0x{:X}, Args=({})", |
| 133 | static_cast<u32>(vic_thi_state.method_0), data); | 130 | static_cast<u32>(vic_thi_state.method_0), data); |
| 134 | vic_processor->ProcessMethod(static_cast<Vic::Method>(vic_thi_state.method_0), {data}); | 131 | vic_processor->ProcessMethod(static_cast<Tegra::Vic::Method>(vic_thi_state.method_0), |
| 132 | data); | ||
| 135 | break; | 133 | break; |
| 136 | default: | 134 | default: |
| 137 | break; | 135 | break; |
| @@ -140,7 +138,7 @@ void CDmaPusher::ExecuteCommand(u32 state_offset, u32 data) { | |||
| 140 | case ChClassId::Host1x: | 138 | case ChClassId::Host1x: |
| 141 | // This device is mainly for syncpoint synchronization | 139 | // This device is mainly for syncpoint synchronization |
| 142 | LOG_DEBUG(Service_NVDRV, "Host1X Class Method"); | 140 | LOG_DEBUG(Service_NVDRV, "Host1X Class Method"); |
| 143 | host1x_processor->ProcessMethod(static_cast<Host1x::Method>(state_offset), {data}); | 141 | host1x_processor->ProcessMethod(static_cast<Tegra::Host1x::Method>(offset), data); |
| 144 | break; | 142 | break; |
| 145 | default: | 143 | default: |
| 146 | UNIMPLEMENTED_MSG("Current class not implemented {:X}", static_cast<u32>(current_class)); | 144 | UNIMPLEMENTED_MSG("Current class not implemented {:X}", static_cast<u32>(current_class)); |
| @@ -148,10 +146,9 @@ void CDmaPusher::ExecuteCommand(u32 state_offset, u32 data) { | |||
| 148 | } | 146 | } |
| 149 | } | 147 | } |
| 150 | 148 | ||
| 151 | void CDmaPusher::ThiStateWrite(ThiRegisters& state, u32 state_offset, | 149 | void CDmaPusher::ThiStateWrite(ThiRegisters& state, u32 offset, u32 argument) { |
| 152 | const std::vector<u32>& arguments) { | 150 | u8* const state_offset = reinterpret_cast<u8*>(&state) + sizeof(u32) * offset; |
| 153 | u8* const state_offset_ptr = reinterpret_cast<u8*>(&state) + sizeof(u32) * state_offset; | 151 | std::memcpy(state_offset, &argument, sizeof(u32)); |
| 154 | std::memcpy(state_offset_ptr, arguments.data(), sizeof(u32) * arguments.size()); | ||
| 155 | } | 152 | } |
| 156 | 153 | ||
| 157 | } // namespace Tegra | 154 | } // namespace Tegra |
diff --git a/src/video_core/cdma_pusher.h b/src/video_core/cdma_pusher.h index de7a3a35b..e16eb2254 100644 --- a/src/video_core/cdma_pusher.h +++ b/src/video_core/cdma_pusher.h | |||
| @@ -48,16 +48,10 @@ enum class ChClassId : u32 { | |||
| 48 | NvDec = 0xf0 | 48 | NvDec = 0xf0 |
| 49 | }; | 49 | }; |
| 50 | 50 | ||
| 51 | enum class ChMethod : u32 { | ||
| 52 | Empty = 0, | ||
| 53 | SetMethod = 0x10, | ||
| 54 | SetData = 0x11, | ||
| 55 | }; | ||
| 56 | |||
| 57 | union ChCommandHeader { | 51 | union ChCommandHeader { |
| 58 | u32 raw; | 52 | u32 raw; |
| 59 | BitField<0, 16, u32> value; | 53 | BitField<0, 16, u32> value; |
| 60 | BitField<16, 12, ChMethod> method_offset; | 54 | BitField<16, 12, u32> method_offset; |
| 61 | BitField<28, 4, ChSubmissionMode> submission_mode; | 55 | BitField<28, 4, ChSubmissionMode> submission_mode; |
| 62 | }; | 56 | }; |
| 63 | static_assert(sizeof(ChCommandHeader) == sizeof(u32), "ChCommand header is an invalid size"); | 57 | static_assert(sizeof(ChCommandHeader) == sizeof(u32), "ChCommand header is an invalid size"); |
| @@ -107,7 +101,7 @@ private: | |||
| 107 | void ExecuteCommand(u32 state_offset, u32 data); | 101 | void ExecuteCommand(u32 state_offset, u32 data); |
| 108 | 102 | ||
| 109 | /// Write arguments value to the ThiRegisters member at the specified offset | 103 | /// Write arguments value to the ThiRegisters member at the specified offset |
| 110 | void ThiStateWrite(ThiRegisters& state, u32 state_offset, const std::vector<u32>& arguments); | 104 | void ThiStateWrite(ThiRegisters& state, u32 offset, u32 argument); |
| 111 | 105 | ||
| 112 | GPU& gpu; | 106 | GPU& gpu; |
| 113 | std::shared_ptr<Tegra::Nvdec> nvdec_processor; | 107 | std::shared_ptr<Tegra::Nvdec> nvdec_processor; |
| @@ -118,8 +112,8 @@ private: | |||
| 118 | ThiRegisters vic_thi_state{}; | 112 | ThiRegisters vic_thi_state{}; |
| 119 | ThiRegisters nvdec_thi_state{}; | 113 | ThiRegisters nvdec_thi_state{}; |
| 120 | 114 | ||
| 121 | s32 count{}; | 115 | u32 count{}; |
| 122 | s32 offset{}; | 116 | u32 offset{}; |
| 123 | u32 mask{}; | 117 | u32 mask{}; |
| 124 | bool incrementing{}; | 118 | bool incrementing{}; |
| 125 | }; | 119 | }; |
diff --git a/src/video_core/command_classes/nvdec.cpp b/src/video_core/command_classes/nvdec.cpp index 79e1f4e13..e4f919afd 100644 --- a/src/video_core/command_classes/nvdec.cpp +++ b/src/video_core/command_classes/nvdec.cpp | |||
| @@ -12,16 +12,16 @@ Nvdec::Nvdec(GPU& gpu_) : gpu(gpu_), codec(std::make_unique<Codec>(gpu)) {} | |||
| 12 | 12 | ||
| 13 | Nvdec::~Nvdec() = default; | 13 | Nvdec::~Nvdec() = default; |
| 14 | 14 | ||
| 15 | void Nvdec::ProcessMethod(Method method, const std::vector<u32>& arguments) { | 15 | void Nvdec::ProcessMethod(Method method, u32 argument) { |
| 16 | if (method == Method::SetVideoCodec) { | 16 | if (method == Method::SetVideoCodec) { |
| 17 | codec->StateWrite(static_cast<u32>(method), arguments[0]); | 17 | codec->StateWrite(static_cast<u32>(method), argument); |
| 18 | } else { | 18 | } else { |
| 19 | codec->StateWrite(static_cast<u32>(method), static_cast<u64>(arguments[0]) << 8); | 19 | codec->StateWrite(static_cast<u32>(method), static_cast<u64>(argument) << 8); |
| 20 | } | 20 | } |
| 21 | 21 | ||
| 22 | switch (method) { | 22 | switch (method) { |
| 23 | case Method::SetVideoCodec: | 23 | case Method::SetVideoCodec: |
| 24 | codec->SetTargetCodec(static_cast<NvdecCommon::VideoCodec>(arguments[0])); | 24 | codec->SetTargetCodec(static_cast<NvdecCommon::VideoCodec>(argument)); |
| 25 | break; | 25 | break; |
| 26 | case Method::Execute: | 26 | case Method::Execute: |
| 27 | Execute(); | 27 | Execute(); |
diff --git a/src/video_core/command_classes/nvdec.h b/src/video_core/command_classes/nvdec.h index e4877c533..e66be80b8 100644 --- a/src/video_core/command_classes/nvdec.h +++ b/src/video_core/command_classes/nvdec.h | |||
| @@ -23,7 +23,7 @@ public: | |||
| 23 | ~Nvdec(); | 23 | ~Nvdec(); |
| 24 | 24 | ||
| 25 | /// Writes the method into the state, Invoke Execute() if encountered | 25 | /// Writes the method into the state, Invoke Execute() if encountered |
| 26 | void ProcessMethod(Method method, const std::vector<u32>& arguments); | 26 | void ProcessMethod(Method method, u32 argument); |
| 27 | 27 | ||
| 28 | /// Return most recently decoded frame | 28 | /// Return most recently decoded frame |
| 29 | [[nodiscard]] AVFramePtr GetFrame(); | 29 | [[nodiscard]] AVFramePtr GetFrame(); |
diff --git a/src/video_core/command_classes/vic.h b/src/video_core/command_classes/vic.h index 6eaf72f21..f5a2ed100 100644 --- a/src/video_core/command_classes/vic.h +++ b/src/video_core/command_classes/vic.h | |||
| @@ -15,43 +15,6 @@ namespace Tegra { | |||
| 15 | class GPU; | 15 | class GPU; |
| 16 | class Nvdec; | 16 | class Nvdec; |
| 17 | 17 | ||
| 18 | struct PlaneOffsets { | ||
| 19 | u32 luma_offset{}; | ||
| 20 | u32 chroma_u_offset{}; | ||
| 21 | u32 chroma_v_offset{}; | ||
| 22 | }; | ||
| 23 | |||
| 24 | struct VicRegisters { | ||
| 25 | INSERT_PADDING_WORDS(64); | ||
| 26 | u32 nop{}; | ||
| 27 | INSERT_PADDING_WORDS(15); | ||
| 28 | u32 pm_trigger{}; | ||
| 29 | INSERT_PADDING_WORDS(47); | ||
| 30 | u32 set_application_id{}; | ||
| 31 | u32 set_watchdog_timer{}; | ||
| 32 | INSERT_PADDING_WORDS(17); | ||
| 33 | u32 context_save_area{}; | ||
| 34 | u32 context_switch{}; | ||
| 35 | INSERT_PADDING_WORDS(43); | ||
| 36 | u32 execute{}; | ||
| 37 | INSERT_PADDING_WORDS(63); | ||
| 38 | std::array<std::array<PlaneOffsets, 8>, 8> surfacex_slots{}; | ||
| 39 | u32 picture_index{}; | ||
| 40 | u32 control_params{}; | ||
| 41 | u32 config_struct_offset{}; | ||
| 42 | u32 filter_struct_offset{}; | ||
| 43 | u32 palette_offset{}; | ||
| 44 | u32 hist_offset{}; | ||
| 45 | u32 context_id{}; | ||
| 46 | u32 fce_ucode_size{}; | ||
| 47 | PlaneOffsets output_surface{}; | ||
| 48 | u32 fce_ucode_offset{}; | ||
| 49 | INSERT_PADDING_WORDS(4); | ||
| 50 | std::array<u32, 8> slot_context_id{}; | ||
| 51 | INSERT_PADDING_WORDS(16); | ||
| 52 | }; | ||
| 53 | static_assert(sizeof(VicRegisters) == 0x7A0, "VicRegisters is an invalid size"); | ||
| 54 | |||
| 55 | class Vic { | 18 | class Vic { |
| 56 | public: | 19 | public: |
| 57 | enum class Method : u32 { | 20 | enum class Method : u32 { |
| @@ -67,14 +30,11 @@ public: | |||
| 67 | ~Vic(); | 30 | ~Vic(); |
| 68 | 31 | ||
| 69 | /// Write to the device state. | 32 | /// Write to the device state. |
| 70 | void ProcessMethod(Method method, const std::vector<u32>& arguments); | 33 | void ProcessMethod(Method method, u32 argument); |
| 71 | 34 | ||
| 72 | private: | 35 | private: |
| 73 | void Execute(); | 36 | void Execute(); |
| 74 | 37 | ||
| 75 | void VicStateWrite(u32 offset, u32 arguments); | ||
| 76 | VicRegisters vic_state{}; | ||
| 77 | |||
| 78 | enum class VideoPixelFormat : u64_le { | 38 | enum class VideoPixelFormat : u64_le { |
| 79 | RGBA8 = 0x1f, | 39 | RGBA8 = 0x1f, |
| 80 | BGRA8 = 0x20, | 40 | BGRA8 = 0x20, |
| @@ -88,8 +48,6 @@ private: | |||
| 88 | BitField<9, 2, u64_le> chroma_loc_vert; | 48 | BitField<9, 2, u64_le> chroma_loc_vert; |
| 89 | BitField<11, 4, u64_le> block_linear_kind; | 49 | BitField<11, 4, u64_le> block_linear_kind; |
| 90 | BitField<15, 4, u64_le> block_linear_height_log2; | 50 | BitField<15, 4, u64_le> block_linear_height_log2; |
| 91 | BitField<19, 3, u64_le> reserved0; | ||
| 92 | BitField<22, 10, u64_le> reserved1; | ||
| 93 | BitField<32, 14, u64_le> surface_width_minus1; | 51 | BitField<32, 14, u64_le> surface_width_minus1; |
| 94 | BitField<46, 14, u64_le> surface_height_minus1; | 52 | BitField<46, 14, u64_le> surface_height_minus1; |
| 95 | }; | 53 | }; |