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authorGravatar ReinUsesLisp2021-06-14 02:27:49 -0300
committerGravatar ameerj2021-07-22 21:51:35 -0400
commit61cd7dd30128633b656ce3264da74bef1ba00bb5 (patch)
tree42d0c4e0e5d3a7f3fc581ebb660cd14cdfcf0300
parentshader: Add shader loop safety check settings (diff)
downloadyuzu-61cd7dd30128633b656ce3264da74bef1ba00bb5.tar.gz
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shader: Add logging
-rw-r--r--src/common/logging/filter.cpp4
-rw-r--r--src/common/logging/types.h4
-rw-r--r--src/shader_recompiler/backend/glasm/emit_glasm.cpp2
-rw-r--r--src/shader_recompiler/backend/glasm/emit_glasm_context_get_set.cpp6
-rw-r--r--src/shader_recompiler/backend/glasm/emit_glasm_image.cpp4
-rw-r--r--src/shader_recompiler/backend/glasm/emit_glasm_not_implemented.cpp2
-rw-r--r--src/shader_recompiler/backend/glasm/emit_glasm_warp.cpp8
-rw-r--r--src/shader_recompiler/backend/spirv/emit_spirv.cpp8
-rw-r--r--src/shader_recompiler/backend/spirv/emit_spirv_atomic.cpp6
-rw-r--r--src/shader_recompiler/backend/spirv/emit_spirv_image.cpp4
-rw-r--r--src/shader_recompiler/backend/spirv/emit_spirv_special.cpp4
-rw-r--r--src/shader_recompiler/frontend/ir/ir_emitter.cpp2
-rw-r--r--src/shader_recompiler/frontend/maxwell/translate/impl/internal_stage_buffer_entry_read.cpp2
-rw-r--r--src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp8
-rw-r--r--src/shader_recompiler/frontend/maxwell/translate/impl/vote.cpp2
15 files changed, 38 insertions, 28 deletions
diff --git a/src/common/logging/filter.cpp b/src/common/logging/filter.cpp
index 4f2cc29e1..f055f0e11 100644
--- a/src/common/logging/filter.cpp
+++ b/src/common/logging/filter.cpp
@@ -144,6 +144,10 @@ bool ParseFilterRule(Filter& instance, Iterator begin, Iterator end) {
144 SUB(Render, Software) \ 144 SUB(Render, Software) \
145 SUB(Render, OpenGL) \ 145 SUB(Render, OpenGL) \
146 SUB(Render, Vulkan) \ 146 SUB(Render, Vulkan) \
147 CLS(Shader) \
148 SUB(Shader, SPIRV) \
149 SUB(Shader, GLASM) \
150 SUB(Shader, GLSL) \
147 CLS(Audio) \ 151 CLS(Audio) \
148 SUB(Audio, DSP) \ 152 SUB(Audio, DSP) \
149 SUB(Audio, Sink) \ 153 SUB(Audio, Sink) \
diff --git a/src/common/logging/types.h b/src/common/logging/types.h
index 88b0e9c01..7ad0334fc 100644
--- a/src/common/logging/types.h
+++ b/src/common/logging/types.h
@@ -114,6 +114,10 @@ enum class Class : u8 {
114 Render_Software, ///< Software renderer backend 114 Render_Software, ///< Software renderer backend
115 Render_OpenGL, ///< OpenGL backend 115 Render_OpenGL, ///< OpenGL backend
116 Render_Vulkan, ///< Vulkan backend 116 Render_Vulkan, ///< Vulkan backend
117 Shader, ///< Shader recompiler
118 Shader_SPIRV, ///< Shader SPIR-V code generation
119 Shader_GLASM, ///< Shader GLASM code generation
120 Shader_GLSL, ///< Shader GLSL code generation
117 Audio, ///< Audio emulation 121 Audio, ///< Audio emulation
118 Audio_DSP, ///< The HLE implementation of the DSP 122 Audio_DSP, ///< The HLE implementation of the DSP
119 Audio_Sink, ///< Emulator audio output backend 123 Audio_Sink, ///< Emulator audio output backend
diff --git a/src/shader_recompiler/backend/glasm/emit_glasm.cpp b/src/shader_recompiler/backend/glasm/emit_glasm.cpp
index fc01797b6..832b4fd40 100644
--- a/src/shader_recompiler/backend/glasm/emit_glasm.cpp
+++ b/src/shader_recompiler/backend/glasm/emit_glasm.cpp
@@ -253,7 +253,7 @@ void EmitCode(EmitContext& ctx, const IR::Program& program) {
253 } 253 }
254 } 254 }
255 if (!ctx.reg_alloc.IsEmpty()) { 255 if (!ctx.reg_alloc.IsEmpty()) {
256 // LOG_WARNING ...; 256 LOG_WARNING(Shader_GLASM, "Register leak after generating code");
257 } 257 }
258} 258}
259 259
diff --git a/src/shader_recompiler/backend/glasm/emit_glasm_context_get_set.cpp b/src/shader_recompiler/backend/glasm/emit_glasm_context_get_set.cpp
index c1df7a342..20b925877 100644
--- a/src/shader_recompiler/backend/glasm/emit_glasm_context_get_set.cpp
+++ b/src/shader_recompiler/backend/glasm/emit_glasm_context_get_set.cpp
@@ -145,14 +145,16 @@ void EmitSetAttribute(EmitContext& ctx, IR::Attribute attr, ScalarF32 value,
145 if (ctx.stage == Stage::Geometry || ctx.profile.support_viewport_index_layer_non_geometry) { 145 if (ctx.stage == Stage::Geometry || ctx.profile.support_viewport_index_layer_non_geometry) {
146 ctx.Add("MOV.F result.layer.x,{};", value); 146 ctx.Add("MOV.F result.layer.x,{};", value);
147 } else { 147 } else {
148 // LOG_WARNING 148 LOG_WARNING(Shader_GLASM,
149 "Layer stored outside of geometry shader not supported by device");
149 } 150 }
150 break; 151 break;
151 case IR::Attribute::ViewportIndex: 152 case IR::Attribute::ViewportIndex:
152 if (ctx.stage == Stage::Geometry || ctx.profile.support_viewport_index_layer_non_geometry) { 153 if (ctx.stage == Stage::Geometry || ctx.profile.support_viewport_index_layer_non_geometry) {
153 ctx.Add("MOV.F result.viewport.x,{};", value); 154 ctx.Add("MOV.F result.viewport.x,{};", value);
154 } else { 155 } else {
155 // LOG_WARNING 156 LOG_WARNING(Shader_GLASM,
157 "Viewport stored outside of geometry shader not supported by device");
156 } 158 }
157 break; 159 break;
158 case IR::Attribute::PointSize: 160 case IR::Attribute::PointSize:
diff --git a/src/shader_recompiler/backend/glasm/emit_glasm_image.cpp b/src/shader_recompiler/backend/glasm/emit_glasm_image.cpp
index 81d5fe72c..09e3a9b82 100644
--- a/src/shader_recompiler/backend/glasm/emit_glasm_image.cpp
+++ b/src/shader_recompiler/backend/glasm/emit_glasm_image.cpp
@@ -139,12 +139,12 @@ void SwizzleOffsets(EmitContext& ctx, Register off_x, Register off_y, const IR::
139 139
140std::string GradOffset(const IR::Value& offset) { 140std::string GradOffset(const IR::Value& offset) {
141 if (offset.IsImmediate()) { 141 if (offset.IsImmediate()) {
142 // LOG_WARNING immediate 142 LOG_WARNING(Shader_GLASM, "Gradient offset is a scalar immediate");
143 return ""; 143 return "";
144 } 144 }
145 IR::Inst* const vector{offset.InstRecursive()}; 145 IR::Inst* const vector{offset.InstRecursive()};
146 if (!vector->AreAllArgsImmediates()) { 146 if (!vector->AreAllArgsImmediates()) {
147 // LOG_WARNING elements not immediate 147 LOG_WARNING(Shader_GLASM, "Gradient offset vector is not immediate");
148 return ""; 148 return "";
149 } 149 }
150 switch (vector->NumArgs()) { 150 switch (vector->NumArgs()) {
diff --git a/src/shader_recompiler/backend/glasm/emit_glasm_not_implemented.cpp b/src/shader_recompiler/backend/glasm/emit_glasm_not_implemented.cpp
index 60735fe31..a487a0744 100644
--- a/src/shader_recompiler/backend/glasm/emit_glasm_not_implemented.cpp
+++ b/src/shader_recompiler/backend/glasm/emit_glasm_not_implemented.cpp
@@ -115,7 +115,7 @@ void EmitEmitVertex(EmitContext& ctx, ScalarS32 stream) {
115 115
116void EmitEndPrimitive(EmitContext& ctx, const IR::Value& stream) { 116void EmitEndPrimitive(EmitContext& ctx, const IR::Value& stream) {
117 if (!stream.IsImmediate()) { 117 if (!stream.IsImmediate()) {
118 // LOG_WARNING not immediate 118 LOG_WARNING(Shader_GLASM, "Stream is not immediate");
119 } 119 }
120 ctx.reg_alloc.Consume(stream); 120 ctx.reg_alloc.Consume(stream);
121 ctx.Add("ENDPRIM;"); 121 ctx.Add("ENDPRIM;");
diff --git a/src/shader_recompiler/backend/glasm/emit_glasm_warp.cpp b/src/shader_recompiler/backend/glasm/emit_glasm_warp.cpp
index 8cec5ee7e..544d475b4 100644
--- a/src/shader_recompiler/backend/glasm/emit_glasm_warp.cpp
+++ b/src/shader_recompiler/backend/glasm/emit_glasm_warp.cpp
@@ -115,7 +115,7 @@ void EmitDPdxFine(EmitContext& ctx, IR::Inst& inst, ScalarF32 p) {
115 if (ctx.profile.support_derivative_control) { 115 if (ctx.profile.support_derivative_control) {
116 ctx.Add("DDX.FINE {}.x,{};", inst, p); 116 ctx.Add("DDX.FINE {}.x,{};", inst, p);
117 } else { 117 } else {
118 // LOG_WARNING 118 LOG_WARNING(Shader_GLASM, "Fine derivatives not supported by device");
119 ctx.Add("DDX {}.x,{};", inst, p); 119 ctx.Add("DDX {}.x,{};", inst, p);
120 } 120 }
121} 121}
@@ -124,7 +124,7 @@ void EmitDPdyFine(EmitContext& ctx, IR::Inst& inst, ScalarF32 p) {
124 if (ctx.profile.support_derivative_control) { 124 if (ctx.profile.support_derivative_control) {
125 ctx.Add("DDY.FINE {}.x,{};", inst, p); 125 ctx.Add("DDY.FINE {}.x,{};", inst, p);
126 } else { 126 } else {
127 // LOG_WARNING 127 LOG_WARNING(Shader_GLASM, "Fine derivatives not supported by device");
128 ctx.Add("DDY {}.x,{};", inst, p); 128 ctx.Add("DDY {}.x,{};", inst, p);
129 } 129 }
130} 130}
@@ -133,7 +133,7 @@ void EmitDPdxCoarse(EmitContext& ctx, IR::Inst& inst, ScalarF32 p) {
133 if (ctx.profile.support_derivative_control) { 133 if (ctx.profile.support_derivative_control) {
134 ctx.Add("DDX.COARSE {}.x,{};", inst, p); 134 ctx.Add("DDX.COARSE {}.x,{};", inst, p);
135 } else { 135 } else {
136 // LOG_WARNING 136 LOG_WARNING(Shader_GLASM, "Coarse derivatives not supported by device");
137 ctx.Add("DDX {}.x,{};", inst, p); 137 ctx.Add("DDX {}.x,{};", inst, p);
138 } 138 }
139} 139}
@@ -142,7 +142,7 @@ void EmitDPdyCoarse(EmitContext& ctx, IR::Inst& inst, ScalarF32 p) {
142 if (ctx.profile.support_derivative_control) { 142 if (ctx.profile.support_derivative_control) {
143 ctx.Add("DDY.COARSE {}.x,{};", inst, p); 143 ctx.Add("DDY.COARSE {}.x,{};", inst, p);
144 } else { 144 } else {
145 // LOG_WARNING 145 LOG_WARNING(Shader_GLASM, "Coarse derivatives not supported by device");
146 ctx.Add("DDY {}.x,{};", inst, p); 146 ctx.Add("DDY {}.x,{};", inst, p);
147 } 147 }
148} 148}
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv.cpp b/src/shader_recompiler/backend/spirv/emit_spirv.cpp
index cba420cda..14a99750d 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_spirv.cpp
@@ -294,7 +294,7 @@ void SetupDenormControl(const Profile& profile, const IR::Program& program, Emit
294 Id main_func) { 294 Id main_func) {
295 const Info& info{program.info}; 295 const Info& info{program.info};
296 if (info.uses_fp32_denorms_flush && info.uses_fp32_denorms_preserve) { 296 if (info.uses_fp32_denorms_flush && info.uses_fp32_denorms_preserve) {
297 // LOG_ERROR(HW_GPU, "Fp32 denorm flush and preserve on the same shader"); 297 LOG_ERROR(Shader_SPIRV, "Fp32 denorm flush and preserve on the same shader");
298 } else if (info.uses_fp32_denorms_flush) { 298 } else if (info.uses_fp32_denorms_flush) {
299 if (profile.support_fp32_denorm_flush) { 299 if (profile.support_fp32_denorm_flush) {
300 ctx.AddCapability(spv::Capability::DenormFlushToZero); 300 ctx.AddCapability(spv::Capability::DenormFlushToZero);
@@ -307,7 +307,7 @@ void SetupDenormControl(const Profile& profile, const IR::Program& program, Emit
307 ctx.AddCapability(spv::Capability::DenormPreserve); 307 ctx.AddCapability(spv::Capability::DenormPreserve);
308 ctx.AddExecutionMode(main_func, spv::ExecutionMode::DenormPreserve, 32U); 308 ctx.AddExecutionMode(main_func, spv::ExecutionMode::DenormPreserve, 32U);
309 } else { 309 } else {
310 // LOG_WARNING(HW_GPU, "Fp32 denorm preserve used in shader without host support"); 310 LOG_WARNING(Shader_SPIRV, "Fp32 denorm preserve used in shader without host support");
311 } 311 }
312 } 312 }
313 if (!profile.support_separate_denorm_behavior) { 313 if (!profile.support_separate_denorm_behavior) {
@@ -315,7 +315,7 @@ void SetupDenormControl(const Profile& profile, const IR::Program& program, Emit
315 return; 315 return;
316 } 316 }
317 if (info.uses_fp16_denorms_flush && info.uses_fp16_denorms_preserve) { 317 if (info.uses_fp16_denorms_flush && info.uses_fp16_denorms_preserve) {
318 // LOG_ERROR(HW_GPU, "Fp16 denorm flush and preserve on the same shader"); 318 LOG_ERROR(Shader_SPIRV, "Fp16 denorm flush and preserve on the same shader");
319 } else if (info.uses_fp16_denorms_flush) { 319 } else if (info.uses_fp16_denorms_flush) {
320 if (profile.support_fp16_denorm_flush) { 320 if (profile.support_fp16_denorm_flush) {
321 ctx.AddCapability(spv::Capability::DenormFlushToZero); 321 ctx.AddCapability(spv::Capability::DenormFlushToZero);
@@ -328,7 +328,7 @@ void SetupDenormControl(const Profile& profile, const IR::Program& program, Emit
328 ctx.AddCapability(spv::Capability::DenormPreserve); 328 ctx.AddCapability(spv::Capability::DenormPreserve);
329 ctx.AddExecutionMode(main_func, spv::ExecutionMode::DenormPreserve, 16U); 329 ctx.AddExecutionMode(main_func, spv::ExecutionMode::DenormPreserve, 16U);
330 } else { 330 } else {
331 // LOG_WARNING(HW_GPU, "Fp16 denorm preserve used in shader without host support"); 331 LOG_WARNING(Shader_SPIRV, "Fp16 denorm preserve used in shader without host support");
332 } 332 }
333 } 333 }
334} 334}
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_atomic.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_atomic.cpp
index 053800eb7..9af8bb9e1 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv_atomic.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_spirv_atomic.cpp
@@ -73,7 +73,7 @@ Id StorageAtomicU64(EmitContext& ctx, const IR::Value& binding, const IR::Value&
73 const auto [scope, semantics]{AtomicArgs(ctx)}; 73 const auto [scope, semantics]{AtomicArgs(ctx)};
74 return (ctx.*atomic_func)(ctx.U64, pointer, scope, semantics, value); 74 return (ctx.*atomic_func)(ctx.U64, pointer, scope, semantics, value);
75 } 75 }
76 // LOG_WARNING(..., "Int64 Atomics not supported, fallback to non-atomic"); 76 LOG_ERROR(Shader_SPIRV, "Int64 atomics not supported, fallback to non-atomic");
77 const Id pointer{StoragePointer(ctx, ctx.storage_types.U32x2, &StorageDefinitions::U32x2, 77 const Id pointer{StoragePointer(ctx, ctx.storage_types.U32x2, &StorageDefinitions::U32x2,
78 binding, offset, sizeof(u32[2]))}; 78 binding, offset, sizeof(u32[2]))};
79 const Id original_value{ctx.OpBitcast(ctx.U64, ctx.OpLoad(ctx.U32[2], pointer))}; 79 const Id original_value{ctx.OpBitcast(ctx.U64, ctx.OpLoad(ctx.U32[2], pointer))};
@@ -140,7 +140,7 @@ Id EmitSharedAtomicExchange64(EmitContext& ctx, Id offset, Id value) {
140 const auto [scope, semantics]{AtomicArgs(ctx)}; 140 const auto [scope, semantics]{AtomicArgs(ctx)};
141 return ctx.OpAtomicExchange(ctx.U64, pointer, scope, semantics, value); 141 return ctx.OpAtomicExchange(ctx.U64, pointer, scope, semantics, value);
142 } 142 }
143 // LOG_WARNING("Int64 Atomics not supported, fallback to non-atomic"); 143 LOG_ERROR(Shader_SPIRV, "Int64 atomics not supported, fallback to non-atomic");
144 const Id pointer_1{SharedPointer(ctx, offset, 0)}; 144 const Id pointer_1{SharedPointer(ctx, offset, 0)};
145 const Id pointer_2{SharedPointer(ctx, offset, 1)}; 145 const Id pointer_2{SharedPointer(ctx, offset, 1)};
146 const Id value_1{ctx.OpLoad(ctx.U32[1], pointer_1)}; 146 const Id value_1{ctx.OpLoad(ctx.U32[1], pointer_1)};
@@ -266,7 +266,7 @@ Id EmitStorageAtomicExchange64(EmitContext& ctx, const IR::Value& binding, const
266 const auto [scope, semantics]{AtomicArgs(ctx)}; 266 const auto [scope, semantics]{AtomicArgs(ctx)};
267 return ctx.OpAtomicExchange(ctx.U64, pointer, scope, semantics, value); 267 return ctx.OpAtomicExchange(ctx.U64, pointer, scope, semantics, value);
268 } 268 }
269 // LOG_WARNING(..., "Int64 Atomics not supported, fallback to non-atomic"); 269 LOG_ERROR(Shader_SPIRV, "Int64 atomics not supported, fallback to non-atomic");
270 const Id pointer{StoragePointer(ctx, ctx.storage_types.U32x2, &StorageDefinitions::U32x2, 270 const Id pointer{StoragePointer(ctx, ctx.storage_types.U32x2, &StorageDefinitions::U32x2,
271 binding, offset, sizeof(u32[2]))}; 271 binding, offset, sizeof(u32[2]))};
272 const Id original{ctx.OpBitcast(ctx.U64, ctx.OpLoad(ctx.U32[2], pointer))}; 272 const Id original{ctx.OpBitcast(ctx.U64, ctx.OpLoad(ctx.U32[2], pointer))};
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_image.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_image.cpp
index cf842e1e0..647804814 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv_image.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_spirv_image.cpp
@@ -39,7 +39,7 @@ public:
39 } 39 }
40 const std::array values{offset.InstRecursive(), offset2.InstRecursive()}; 40 const std::array values{offset.InstRecursive(), offset2.InstRecursive()};
41 if (!values[0]->AreAllArgsImmediates() || !values[1]->AreAllArgsImmediates()) { 41 if (!values[0]->AreAllArgsImmediates() || !values[1]->AreAllArgsImmediates()) {
42 // LOG_WARNING("Not all arguments in PTP are immediate, STUBBING"); 42 LOG_WARNING(Shader_SPIRV, "Not all arguments in PTP are immediate, ignoring");
43 return; 43 return;
44 } 44 }
45 const IR::Opcode opcode{values[0]->GetOpcode()}; 45 const IR::Opcode opcode{values[0]->GetOpcode()};
@@ -442,7 +442,7 @@ Id EmitImageGradient(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, I
442Id EmitImageRead(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords) { 442Id EmitImageRead(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords) {
443 const auto info{inst->Flags<IR::TextureInstInfo>()}; 443 const auto info{inst->Flags<IR::TextureInstInfo>()};
444 if (info.image_format == ImageFormat::Typeless && !ctx.profile.support_typeless_image_loads) { 444 if (info.image_format == ImageFormat::Typeless && !ctx.profile.support_typeless_image_loads) {
445 // LOG_WARNING(..., "Typeless image read not supported by host"); 445 LOG_WARNING(Shader_SPIRV, "Typeless image read not supported by host");
446 return ctx.ConstantNull(ctx.U32[4]); 446 return ctx.ConstantNull(ctx.U32[4]);
447 } 447 }
448 return Emit(&EmitContext::OpImageSparseRead, &EmitContext::OpImageRead, ctx, inst, ctx.U32[4], 448 return Emit(&EmitContext::OpImageSparseRead, &EmitContext::OpImageRead, ctx, inst, ctx.U32[4],
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_special.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_special.cpp
index 072a3b1bd..9e7eb3cb1 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv_special.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_spirv_special.cpp
@@ -131,7 +131,7 @@ void EmitEmitVertex(EmitContext& ctx, const IR::Value& stream) {
131 if (stream.IsImmediate()) { 131 if (stream.IsImmediate()) {
132 ctx.OpEmitStreamVertex(ctx.Def(stream)); 132 ctx.OpEmitStreamVertex(ctx.Def(stream));
133 } else { 133 } else {
134 // LOG_WARNING(..., "EmitVertex's stream is not constant"); 134 LOG_WARNING(Shader_SPIRV, "Stream is not immediate");
135 ctx.OpEmitStreamVertex(ctx.u32_zero_value); 135 ctx.OpEmitStreamVertex(ctx.u32_zero_value);
136 } 136 }
137 // Restore fixed pipeline point size after emitting the vertex 137 // Restore fixed pipeline point size after emitting the vertex
@@ -142,7 +142,7 @@ void EmitEndPrimitive(EmitContext& ctx, const IR::Value& stream) {
142 if (stream.IsImmediate()) { 142 if (stream.IsImmediate()) {
143 ctx.OpEndStreamPrimitive(ctx.Def(stream)); 143 ctx.OpEndStreamPrimitive(ctx.Def(stream));
144 } else { 144 } else {
145 // LOG_WARNING(..., "EndPrimitive's stream is not constant"); 145 LOG_WARNING(Shader_SPIRV, "Stream is not immediate");
146 ctx.OpEndStreamPrimitive(ctx.u32_zero_value); 146 ctx.OpEndStreamPrimitive(ctx.u32_zero_value);
147 } 147 }
148} 148}
diff --git a/src/shader_recompiler/frontend/ir/ir_emitter.cpp b/src/shader_recompiler/frontend/ir/ir_emitter.cpp
index 6c37af5e7..d2ac2acac 100644
--- a/src/shader_recompiler/frontend/ir/ir_emitter.cpp
+++ b/src/shader_recompiler/frontend/ir/ir_emitter.cpp
@@ -270,7 +270,7 @@ static U1 GetFlowTest(IREmitter& ir, FlowTest flow_test) {
270 case FlowTest::RGT: 270 case FlowTest::RGT:
271 return ir.LogicalAnd(ir.LogicalNot(ir.GetSFlag()), ir.LogicalNot(ir.GetZFlag())); 271 return ir.LogicalAnd(ir.LogicalNot(ir.GetSFlag()), ir.LogicalNot(ir.GetZFlag()));
272 case FlowTest::FCSM_TR: 272 case FlowTest::FCSM_TR:
273 // LOG_WARNING(ShaderDecompiler, "FCSM_TR CC State (Stubbed)"); 273 LOG_WARNING(Shader, "(STUBBED) FCSM_TR");
274 return ir.Imm1(false); 274 return ir.Imm1(false);
275 case FlowTest::CSM_TA: 275 case FlowTest::CSM_TA:
276 case FlowTest::CSM_TR: 276 case FlowTest::CSM_TR:
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/internal_stage_buffer_entry_read.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/internal_stage_buffer_entry_read.cpp
index edd6220a8..9b85f8059 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/internal_stage_buffer_entry_read.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/internal_stage_buffer_entry_read.cpp
@@ -46,7 +46,7 @@ void TranslatorVisitor::ISBERD(u64 insn) {
46 if (isberd.shift != Shift::Default) { 46 if (isberd.shift != Shift::Default) {
47 throw NotImplementedException("Shift {}", isberd.shift.Value()); 47 throw NotImplementedException("Shift {}", isberd.shift.Value());
48 } 48 }
49 // LOG_WARNING(..., "ISBERD is stubbed"); 49 LOG_WARNING(Shader, "(STUBBED) called");
50 X(isberd.dest_reg, X(isberd.src_reg)); 50 X(isberd.dest_reg, X(isberd.src_reg));
51} 51}
52 52
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp
index fe3cdfa96..20cb2674e 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp
@@ -118,7 +118,7 @@ enum class SpecialRegister : u64 {
118 case SpecialRegister::SR_THREAD_KILL: 118 case SpecialRegister::SR_THREAD_KILL:
119 return IR::U32{ir.Select(ir.IsHelperInvocation(), ir.Imm32(-1), ir.Imm32(0))}; 119 return IR::U32{ir.Select(ir.IsHelperInvocation(), ir.Imm32(-1), ir.Imm32(0))};
120 case SpecialRegister::SR_INVOCATION_INFO: 120 case SpecialRegister::SR_INVOCATION_INFO:
121 // LOG_WARNING(..., "SR_INVOCATION_INFO is stubbed"); 121 LOG_WARNING(Shader, "(STUBBED) SR_INVOCATION_INFO");
122 return ir.Imm32(0x00ff'0000); 122 return ir.Imm32(0x00ff'0000);
123 case SpecialRegister::SR_TID: { 123 case SpecialRegister::SR_TID: {
124 const IR::Value tid{ir.LocalInvocationId()}; 124 const IR::Value tid{ir.LocalInvocationId()};
@@ -140,10 +140,10 @@ enum class SpecialRegister : u64 {
140 case SpecialRegister::SR_CTAID_Z: 140 case SpecialRegister::SR_CTAID_Z:
141 return ir.WorkgroupIdZ(); 141 return ir.WorkgroupIdZ();
142 case SpecialRegister::SR_WSCALEFACTOR_XY: 142 case SpecialRegister::SR_WSCALEFACTOR_XY:
143 // LOG_WARNING(..., "SR_WSCALEFACTOR_XY is stubbed"); 143 LOG_WARNING(Shader, "(STUBBED) SR_WSCALEFACTOR_XY");
144 return ir.Imm32(Common::BitCast<u32>(1.0f)); 144 return ir.Imm32(Common::BitCast<u32>(1.0f));
145 case SpecialRegister::SR_WSCALEFACTOR_Z: 145 case SpecialRegister::SR_WSCALEFACTOR_Z:
146 // LOG_WARNING(..., "SR_WSCALEFACTOR_Z is stubbed"); 146 LOG_WARNING(Shader, "(STUBBED) SR_WSCALEFACTOR_Z");
147 return ir.Imm32(Common::BitCast<u32>(1.0f)); 147 return ir.Imm32(Common::BitCast<u32>(1.0f));
148 case SpecialRegister::SR_LANEID: 148 case SpecialRegister::SR_LANEID:
149 return ir.LaneId(); 149 return ir.LaneId();
@@ -160,7 +160,7 @@ enum class SpecialRegister : u64 {
160 case SpecialRegister::SR_Y_DIRECTION: 160 case SpecialRegister::SR_Y_DIRECTION:
161 return ir.BitCast<IR::U32>(ir.YDirection()); 161 return ir.BitCast<IR::U32>(ir.YDirection());
162 case SpecialRegister::SR_AFFINITY: 162 case SpecialRegister::SR_AFFINITY:
163 // LOG_WARNING(..., "SR_AFFINITY is stubbed"); 163 LOG_WARNING(Shader, "(STUBBED) SR_AFFINITY");
164 return ir.Imm32(0); // This is the default value hardware returns. 164 return ir.Imm32(0); // This is the default value hardware returns.
165 default: 165 default:
166 throw NotImplementedException("S2R special register {}", special_register); 166 throw NotImplementedException("S2R special register {}", special_register);
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/vote.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/vote.cpp
index 0793611ff..7ce370f09 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/vote.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/vote.cpp
@@ -48,7 +48,7 @@ void TranslatorVisitor::VOTE(u64 insn) {
48} 48}
49 49
50void TranslatorVisitor::VOTE_vtg(u64) { 50void TranslatorVisitor::VOTE_vtg(u64) {
51 // LOG_WARNING(ShaderDecompiler, "VOTE.VTG: Stubbed!"); 51 LOG_WARNING(Shader, "(STUBBED) called");
52} 52}
53 53
54} // namespace Shader::Maxwell 54} // namespace Shader::Maxwell