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| author |  Lioncash | 2014-12-14 23:00:29 -0500 |
|---|---|---|
| committer | Lioncash | 2014-12-14 23:00:31 -0500 |
| commit | 2b0acd36e19f27720b2740efbe68d0f7598ee5c5 (patch) | |
| tree | d7ae9aa08cc1f962149340f924e1a90a79a28572 | |
| parent | Merge pull request #276 from lioncash/decrappify (diff) | |
| download | yuzu-2b0acd36e19f27720b2740efbe68d0f7598ee5c5.tar.gz yuzu-2b0acd36e19f27720b2740efbe68d0f7598ee5c5.tar.xz yuzu-2b0acd36e19f27720b2740efbe68d0f7598ee5c5.zip | |
armemu: Fix UXTB16
Rotation bits are 10 and 11, not 9 and 10.
| -rw-r--r-- | src/core/arm/interpreter/armemu.cpp | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp index ec40881f8..33ebc7986 100644 --- a/src/core/arm/interpreter/armemu.cpp +++ b/src/core/arm/interpreter/armemu.cpp | |||
| @@ -6101,18 +6101,18 @@ L_stm_s_takeabort: | |||
| 6101 | 6101 | ||
| 6102 | return 1; | 6102 | return 1; |
| 6103 | } | 6103 | } |
| 6104 | case 0x6c: | 6104 | case 0x6c: |
| 6105 | if ((instr & 0xf03f0) == 0xf0070) { //uxtb16 | 6105 | if ((instr & 0xf03f0) == 0xf0070) { //uxtb16 |
| 6106 | u8 src1 = BITS(0, 3); | 6106 | u8 rm_idx = BITS(0, 3); |
| 6107 | u8 tar = BITS(12, 15); | 6107 | u8 rd_idx = BITS(12, 15); |
| 6108 | u32 base = state->Reg[src1]; | 6108 | u32 rm_val = state->Reg[rm_idx]; |
| 6109 | u32 shamt = BITS(9,10)* 8; | 6109 | u32 rotation = BITS(10, 11) * 8; |
| 6110 | u32 in = ((base << (32 - shamt)) | (base >> shamt)); | 6110 | u32 in = ((rm_val << (32 - rotation)) | (rm_val >> rotation)); |
| 6111 | state->Reg[tar] = in & 0x00FF00FF; | 6111 | state->Reg[rd_idx] = in & 0x00FF00FF; |
| 6112 | return 1; | 6112 | return 1; |
| 6113 | } else | 6113 | } else |
| 6114 | printf ("Unhandled v6 insn: uxtab16\n"); | 6114 | printf ("Unhandled v6 insn: uxtab16\n"); |
| 6115 | break; | 6115 | break; |
| 6116 | case 0x6e: { | 6116 | case 0x6e: { |
| 6117 | ARMword Rm; | 6117 | ARMword Rm; |
| 6118 | int ror = -1; | 6118 | int ror = -1; |