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| author |  Lioncash | 2015-04-05 23:46:10 -0400 |
|---|---|---|
| committer | Lioncash | 2015-04-05 23:49:06 -0400 |
| commit | bb7dac022e9f3ead238d0d213007f21ff29598a3 (patch) | |
| tree | c3bc2b245619a8e9e5d44285529622da58314cc8 | |
| parent | Merge pull request #682 from yuriks/virtmem2 (diff) | |
| download | yuzu-bb7dac022e9f3ead238d0d213007f21ff29598a3.tar.gz yuzu-bb7dac022e9f3ead238d0d213007f21ff29598a3.tar.xz yuzu-bb7dac022e9f3ead238d0d213007f21ff29598a3.zip | |
dyncom: Suppress uninitialized variable warnings
The switch cases will always be hit, but this makes compilers stop complaining.
Diffstat (limited to '')
| -rw-r--r-- | src/core/arm/dyncom/arm_dyncom_interpreter.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp index b0efd7194..8b1232c6c 100644 --- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp +++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp | |||
| @@ -339,7 +339,7 @@ static void LnSWoUB(ScaledRegisterPreIndexed)(ARMul_State* cpu, unsigned int ins | |||
| 339 | unsigned int shift_imm = BITS(inst, 7, 11); | 339 | unsigned int shift_imm = BITS(inst, 7, 11); |
| 340 | unsigned int Rn = BITS(inst, 16, 19); | 340 | unsigned int Rn = BITS(inst, 16, 19); |
| 341 | unsigned int Rm = BITS(inst, 0, 3); | 341 | unsigned int Rm = BITS(inst, 0, 3); |
| 342 | unsigned int index; | 342 | unsigned int index = 0; |
| 343 | unsigned int addr; | 343 | unsigned int addr; |
| 344 | unsigned int rm = CHECK_READ_REG15_WA(cpu, Rm); | 344 | unsigned int rm = CHECK_READ_REG15_WA(cpu, Rm); |
| 345 | unsigned int rn = CHECK_READ_REG15_WA(cpu, Rn); | 345 | unsigned int rn = CHECK_READ_REG15_WA(cpu, Rn); |
| @@ -390,7 +390,7 @@ static void LnSWoUB(ScaledRegisterPostIndexed)(ARMul_State* cpu, unsigned int in | |||
| 390 | unsigned int shift_imm = BITS(inst, 7, 11); | 390 | unsigned int shift_imm = BITS(inst, 7, 11); |
| 391 | unsigned int Rn = BITS(inst, 16, 19); | 391 | unsigned int Rn = BITS(inst, 16, 19); |
| 392 | unsigned int Rm = BITS(inst, 0, 3); | 392 | unsigned int Rm = BITS(inst, 0, 3); |
| 393 | unsigned int index; | 393 | unsigned int index = 0; |
| 394 | unsigned int addr = CHECK_READ_REG15_WA(cpu, Rn); | 394 | unsigned int addr = CHECK_READ_REG15_WA(cpu, Rn); |
| 395 | unsigned int rm = CHECK_READ_REG15_WA(cpu, Rm); | 395 | unsigned int rm = CHECK_READ_REG15_WA(cpu, Rm); |
| 396 | 396 | ||
| @@ -605,7 +605,7 @@ static void LnSWoUB(ScaledRegisterOffset)(ARMul_State* cpu, unsigned int inst, u | |||
| 605 | unsigned int shift_imm = BITS(inst, 7, 11); | 605 | unsigned int shift_imm = BITS(inst, 7, 11); |
| 606 | unsigned int Rn = BITS(inst, 16, 19); | 606 | unsigned int Rn = BITS(inst, 16, 19); |
| 607 | unsigned int Rm = BITS(inst, 0, 3); | 607 | unsigned int Rm = BITS(inst, 0, 3); |
| 608 | unsigned int index; | 608 | unsigned int index = 0; |
| 609 | unsigned int addr; | 609 | unsigned int addr; |
| 610 | unsigned int rm = CHECK_READ_REG15_WA(cpu, Rm); | 610 | unsigned int rm = CHECK_READ_REG15_WA(cpu, Rm); |
| 611 | unsigned int rn = CHECK_READ_REG15_WA(cpu, Rn); | 611 | unsigned int rn = CHECK_READ_REG15_WA(cpu, Rn); |
| @@ -1126,7 +1126,7 @@ int CondPassed(ARMul_State* cpu, unsigned int cond) { | |||
| 1126 | #define CFLAG cpu->CFlag | 1126 | #define CFLAG cpu->CFlag |
| 1127 | #define VFLAG cpu->VFlag | 1127 | #define VFLAG cpu->VFlag |
| 1128 | 1128 | ||
| 1129 | int temp; | 1129 | int temp = 0; |
| 1130 | 1130 | ||
| 1131 | switch (cond) { | 1131 | switch (cond) { |
| 1132 | case 0x0: | 1132 | case 0x0: |