summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorGravatar bunnei2020-07-14 14:04:16 -0400
committerGravatar GitHub2020-07-14 14:04:16 -0400
commit666b37ad56e816cd2bde4a521cba0e63812dc681 (patch)
treec498f364e42006df041ec4bab818edb2c1b23d36
parentMerge pull request #4294 from MerryMage/cpu-opt-settings (diff)
parentvideo_core/textures: Add and use SwizzleSliceToVoxel, and minor style changes (diff)
downloadyuzu-666b37ad56e816cd2bde4a521cba0e63812dc681.tar.gz
yuzu-666b37ad56e816cd2bde4a521cba0e63812dc681.tar.xz
yuzu-666b37ad56e816cd2bde4a521cba0e63812dc681.zip
Merge pull request #4242 from ReinUsesLisp/maxwell-dma
maxwell_dma: Match official doc and support pitch->voxel copies
Diffstat (limited to '')
-rw-r--r--src/video_core/engines/maxwell_dma.cpp300
-rw-r--r--src/video_core/engines/maxwell_dma.h348
-rw-r--r--src/video_core/texture_cache/surface_params.cpp5
-rw-r--r--src/video_core/texture_cache/surface_params.h2
-rw-r--r--src/video_core/textures/decoders.cpp134
-rw-r--r--src/video_core/textures/decoders.h38
6 files changed, 468 insertions, 359 deletions
diff --git a/src/video_core/engines/maxwell_dma.cpp b/src/video_core/engines/maxwell_dma.cpp
index 01d7df405..a2d3d7823 100644
--- a/src/video_core/engines/maxwell_dma.cpp
+++ b/src/video_core/engines/maxwell_dma.cpp
@@ -14,50 +14,45 @@
14 14
15namespace Tegra::Engines { 15namespace Tegra::Engines {
16 16
17using namespace Texture;
18
17MaxwellDMA::MaxwellDMA(Core::System& system, MemoryManager& memory_manager) 19MaxwellDMA::MaxwellDMA(Core::System& system, MemoryManager& memory_manager)
18 : system{system}, memory_manager{memory_manager} {} 20 : system{system}, memory_manager{memory_manager} {}
19 21
20void MaxwellDMA::CallMethod(u32 method, u32 method_argument, bool is_last_call) { 22void MaxwellDMA::CallMethod(u32 method, u32 method_argument, bool is_last_call) {
21 ASSERT_MSG(method < Regs::NUM_REGS, 23 ASSERT_MSG(method < NUM_REGS, "Invalid MaxwellDMA register");
22 "Invalid MaxwellDMA register, increase the size of the Regs structure");
23 24
24 regs.reg_array[method] = method_argument; 25 regs.reg_array[method] = method_argument;
25 26
26#define MAXWELLDMA_REG_INDEX(field_name) \ 27 if (method == offsetof(Regs, launch_dma) / sizeof(u32)) {
27 (offsetof(Tegra::Engines::MaxwellDMA::Regs, field_name) / sizeof(u32)) 28 Launch();
28
29 switch (method) {
30 case MAXWELLDMA_REG_INDEX(exec): {
31 HandleCopy();
32 break;
33 }
34 } 29 }
35
36#undef MAXWELLDMA_REG_INDEX
37} 30}
38 31
39void MaxwellDMA::CallMultiMethod(u32 method, const u32* base_start, u32 amount, 32void MaxwellDMA::CallMultiMethod(u32 method, const u32* base_start, u32 amount,
40 u32 methods_pending) { 33 u32 methods_pending) {
41 for (std::size_t i = 0; i < amount; i++) { 34 for (size_t i = 0; i < amount; ++i) {
42 CallMethod(method, base_start[i], methods_pending - static_cast<u32>(i) <= 1); 35 CallMethod(method, base_start[i], methods_pending - static_cast<u32>(i) <= 1);
43 } 36 }
44} 37}
45 38
46void MaxwellDMA::HandleCopy() { 39void MaxwellDMA::Launch() {
47 LOG_TRACE(HW_GPU, "Requested a DMA copy"); 40 LOG_TRACE(Render_OpenGL, "DMA copy 0x{:x} -> 0x{:x}", static_cast<GPUVAddr>(regs.offset_in),
48 41 static_cast<GPUVAddr>(regs.offset_out));
49 const GPUVAddr source = regs.src_address.Address();
50 const GPUVAddr dest = regs.dst_address.Address();
51 42
52 // TODO(Subv): Perform more research and implement all features of this engine. 43 // TODO(Subv): Perform more research and implement all features of this engine.
53 ASSERT(regs.exec.enable_swizzle == 0); 44 const LaunchDMA& launch = regs.launch_dma;
54 ASSERT(regs.exec.query_mode == Regs::QueryMode::None); 45 ASSERT(launch.remap_enable == 0);
55 ASSERT(regs.exec.query_intr == Regs::QueryIntr::None); 46 ASSERT(launch.semaphore_type == LaunchDMA::SemaphoreType::NONE);
56 ASSERT(regs.exec.copy_mode == Regs::CopyMode::Unk2); 47 ASSERT(launch.interrupt_type == LaunchDMA::InterruptType::NONE);
57 ASSERT(regs.dst_params.pos_x == 0); 48 ASSERT(launch.data_transfer_type == LaunchDMA::DataTransferType::NON_PIPELINED);
58 ASSERT(regs.dst_params.pos_y == 0); 49 ASSERT(regs.dst_params.origin.x == 0);
59 50 ASSERT(regs.dst_params.origin.y == 0);
60 if (!regs.exec.is_dst_linear && !regs.exec.is_src_linear) { 51
52 const bool is_src_pitch = launch.src_memory_layout == LaunchDMA::MemoryLayout::PITCH;
53 const bool is_dst_pitch = launch.dst_memory_layout == LaunchDMA::MemoryLayout::PITCH;
54
55 if (!is_src_pitch && !is_dst_pitch) {
61 // If both the source and the destination are in block layout, assert. 56 // If both the source and the destination are in block layout, assert.
62 UNREACHABLE_MSG("Tiled->Tiled DMA transfers are not yet implemented"); 57 UNREACHABLE_MSG("Tiled->Tiled DMA transfers are not yet implemented");
63 return; 58 return;
@@ -66,144 +61,161 @@ void MaxwellDMA::HandleCopy() {
66 // All copies here update the main memory, so mark all rasterizer states as invalid. 61 // All copies here update the main memory, so mark all rasterizer states as invalid.
67 system.GPU().Maxwell3D().OnMemoryWrite(); 62 system.GPU().Maxwell3D().OnMemoryWrite();
68 63
69 if (regs.exec.is_dst_linear && regs.exec.is_src_linear) { 64 if (is_src_pitch && is_dst_pitch) {
70 // When the enable_2d bit is disabled, the copy is performed as if we were copying a 1D 65 CopyPitchToPitch();
71 // buffer of length `x_count`, otherwise we copy a 2D image of dimensions (x_count, 66 } else {
72 // y_count). 67 ASSERT(launch.multi_line_enable == 1);
73 if (!regs.exec.enable_2d) {
74 memory_manager.CopyBlock(dest, source, regs.x_count);
75 return;
76 }
77 68
78 // If both the source and the destination are in linear layout, perform a line-by-line 69 if (!is_src_pitch && is_dst_pitch) {
79 // copy. We're going to take a subrect of size (x_count, y_count) from the source 70 CopyBlockLinearToPitch();
80 // rectangle. There is no need to manually flush/invalidate the regions because 71 } else {
81 // CopyBlock does that for us. 72 CopyPitchToBlockLinear();
82 for (u32 line = 0; line < regs.y_count; ++line) {
83 const GPUVAddr source_line = source + line * regs.src_pitch;
84 const GPUVAddr dest_line = dest + line * regs.dst_pitch;
85 memory_manager.CopyBlock(dest_line, source_line, regs.x_count);
86 } 73 }
87 return;
88 } 74 }
75}
89 76
90 ASSERT(regs.exec.enable_2d == 1); 77void MaxwellDMA::CopyPitchToPitch() {
91 78 // When `multi_line_enable` bit is disabled the copy is performed as if we were copying a 1D
92 if (regs.exec.is_dst_linear && !regs.exec.is_src_linear) { 79 // buffer of length `line_length_in`.
93 80 // Otherwise we copy a 2D image of dimensions (line_length_in, line_count).
94 ASSERT(regs.src_params.BlockDepth() == 0); 81 if (!regs.launch_dma.multi_line_enable) {
95 // Optimized path for micro copies. 82 memory_manager.CopyBlock(regs.offset_out, regs.offset_in, regs.line_length_in);
96 if (regs.dst_pitch * regs.y_count < Texture::GetGOBSize() && regs.dst_pitch <= 64) { 83 return;
97 const u32 bytes_per_pixel = regs.dst_pitch / regs.x_count; 84 }
98 const std::size_t src_size = Texture::GetGOBSize();
99 const std::size_t dst_size = regs.dst_pitch * regs.y_count;
100 u32 pos_x = regs.src_params.pos_x;
101 u32 pos_y = regs.src_params.pos_y;
102 const u64 offset =
103 Texture::GetGOBOffset(regs.src_params.size_x, regs.src_params.size_y, pos_x, pos_y,
104 regs.src_params.BlockDepth(), bytes_per_pixel);
105 const u32 x_in_gob = 64 / bytes_per_pixel;
106 pos_x = pos_x % x_in_gob;
107 pos_y = pos_y % 8;
108
109 if (read_buffer.size() < src_size) {
110 read_buffer.resize(src_size);
111 }
112
113 if (write_buffer.size() < dst_size) {
114 write_buffer.resize(dst_size);
115 }
116
117 if (Settings::IsGPULevelExtreme()) {
118 memory_manager.ReadBlock(source + offset, read_buffer.data(), src_size);
119 memory_manager.ReadBlock(dest, write_buffer.data(), dst_size);
120 } else {
121 memory_manager.ReadBlockUnsafe(source + offset, read_buffer.data(), src_size);
122 memory_manager.ReadBlockUnsafe(dest, write_buffer.data(), dst_size);
123 }
124
125 Texture::UnswizzleSubrect(regs.x_count, regs.y_count, regs.dst_pitch,
126 regs.src_params.size_x, bytes_per_pixel, read_buffer.data(),
127 write_buffer.data(), regs.src_params.BlockHeight(), pos_x,
128 pos_y);
129
130 memory_manager.WriteBlock(dest, write_buffer.data(), dst_size);
131
132 return;
133 }
134 // If the input is tiled and the output is linear, deswizzle the input and copy it over.
135 const u32 bytes_per_pixel = regs.dst_pitch / regs.x_count;
136 const std::size_t src_size = Texture::CalculateSize(
137 true, bytes_per_pixel, regs.src_params.size_x, regs.src_params.size_y,
138 regs.src_params.size_z, regs.src_params.BlockHeight(), regs.src_params.BlockDepth());
139
140 const std::size_t src_layer_size = Texture::CalculateSize(
141 true, bytes_per_pixel, regs.src_params.size_x, regs.src_params.size_y, 1,
142 regs.src_params.BlockHeight(), regs.src_params.BlockDepth());
143
144 const std::size_t dst_size = regs.dst_pitch * regs.y_count;
145 85
146 if (read_buffer.size() < src_size) { 86 // Perform a line-by-line copy.
147 read_buffer.resize(src_size); 87 // We're going to take a subrect of size (line_length_in, line_count) from the source rectangle.
148 } 88 // There is no need to manually flush/invalidate the regions because CopyBlock does that for us.
89 for (u32 line = 0; line < regs.line_count; ++line) {
90 const GPUVAddr source_line = regs.offset_in + static_cast<size_t>(line) * regs.pitch_in;
91 const GPUVAddr dest_line = regs.offset_out + static_cast<size_t>(line) * regs.pitch_out;
92 memory_manager.CopyBlock(dest_line, source_line, regs.line_length_in);
93 }
94}
149 95
150 if (write_buffer.size() < dst_size) { 96void MaxwellDMA::CopyBlockLinearToPitch() {
151 write_buffer.resize(dst_size); 97 ASSERT(regs.src_params.block_size.depth == 0);
152 }
153 98
154 if (Settings::IsGPULevelExtreme()) { 99 // Optimized path for micro copies.
155 memory_manager.ReadBlock(source, read_buffer.data(), src_size); 100 const size_t dst_size = static_cast<size_t>(regs.pitch_out) * regs.line_count;
156 memory_manager.ReadBlock(dest, write_buffer.data(), dst_size); 101 if (dst_size < GOB_SIZE && regs.pitch_out <= GOB_SIZE_X) {
157 } else { 102 FastCopyBlockLinearToPitch();
158 memory_manager.ReadBlockUnsafe(source, read_buffer.data(), src_size); 103 return;
159 memory_manager.ReadBlockUnsafe(dest, write_buffer.data(), dst_size); 104 }
160 }
161 105
162 Texture::UnswizzleSubrect( 106 // Deswizzle the input and copy it over.
163 regs.x_count, regs.y_count, regs.dst_pitch, regs.src_params.size_x, bytes_per_pixel, 107 const u32 bytes_per_pixel = regs.pitch_out / regs.line_length_in;
164 read_buffer.data() + src_layer_size * regs.src_params.pos_z, write_buffer.data(), 108 const Parameters& src_params = regs.src_params;
165 regs.src_params.BlockHeight(), regs.src_params.pos_x, regs.src_params.pos_y); 109 const u32 width = src_params.width;
110 const u32 height = src_params.height;
111 const u32 depth = src_params.depth;
112 const u32 block_height = src_params.block_size.height;
113 const u32 block_depth = src_params.block_size.depth;
114 const size_t src_size =
115 CalculateSize(true, bytes_per_pixel, width, height, depth, block_height, block_depth);
116 const size_t src_layer_size =
117 CalculateSize(true, bytes_per_pixel, width, height, 1, block_height, block_depth);
118
119 if (read_buffer.size() < src_size) {
120 read_buffer.resize(src_size);
121 }
122 if (write_buffer.size() < dst_size) {
123 write_buffer.resize(dst_size);
124 }
166 125
167 memory_manager.WriteBlock(dest, write_buffer.data(), dst_size); 126 if (Settings::IsGPULevelExtreme()) {
127 memory_manager.ReadBlock(regs.offset_in, read_buffer.data(), src_size);
128 memory_manager.ReadBlock(regs.offset_out, write_buffer.data(), dst_size);
168 } else { 129 } else {
169 ASSERT(regs.dst_params.BlockDepth() == 0); 130 memory_manager.ReadBlockUnsafe(regs.offset_in, read_buffer.data(), src_size);
131 memory_manager.ReadBlockUnsafe(regs.offset_out, write_buffer.data(), dst_size);
132 }
170 133
171 const u32 bytes_per_pixel = regs.src_pitch / regs.x_count; 134 UnswizzleSubrect(regs.line_length_in, regs.line_count, regs.pitch_out, width, bytes_per_pixel,
135 read_buffer.data() + src_layer_size * src_params.layer, write_buffer.data(),
136 block_height, src_params.origin.x, src_params.origin.y);
172 137
173 const std::size_t dst_size = Texture::CalculateSize( 138 memory_manager.WriteBlock(regs.offset_out, write_buffer.data(), dst_size);
174 true, bytes_per_pixel, regs.dst_params.size_x, regs.dst_params.size_y, 139}
175 regs.dst_params.size_z, regs.dst_params.BlockHeight(), regs.dst_params.BlockDepth());
176 140
177 const std::size_t dst_layer_size = Texture::CalculateSize( 141void MaxwellDMA::CopyPitchToBlockLinear() {
178 true, bytes_per_pixel, regs.dst_params.size_x, regs.dst_params.size_y, 1, 142 const auto& dst_params = regs.dst_params;
179 regs.dst_params.BlockHeight(), regs.dst_params.BlockDepth()); 143 const u32 bytes_per_pixel = regs.pitch_in / regs.line_length_in;
144 const u32 width = dst_params.width;
145 const u32 height = dst_params.height;
146 const u32 depth = dst_params.depth;
147 const u32 block_height = dst_params.block_size.height;
148 const u32 block_depth = dst_params.block_size.depth;
149 const size_t dst_size =
150 CalculateSize(true, bytes_per_pixel, width, height, depth, block_height, block_depth);
151 const size_t dst_layer_size =
152 CalculateSize(true, bytes_per_pixel, width, height, 1, block_height, block_depth);
153
154 const size_t src_size = static_cast<size_t>(regs.pitch_in) * regs.line_count;
155
156 if (read_buffer.size() < src_size) {
157 read_buffer.resize(src_size);
158 }
159 if (write_buffer.size() < dst_size) {
160 write_buffer.resize(dst_size);
161 }
180 162
181 const std::size_t src_size = regs.src_pitch * regs.y_count; 163 if (Settings::IsGPULevelExtreme()) {
164 memory_manager.ReadBlock(regs.offset_in, read_buffer.data(), src_size);
165 memory_manager.ReadBlock(regs.offset_out, write_buffer.data(), dst_size);
166 } else {
167 memory_manager.ReadBlockUnsafe(regs.offset_in, read_buffer.data(), src_size);
168 memory_manager.ReadBlockUnsafe(regs.offset_out, write_buffer.data(), dst_size);
169 }
182 170
183 if (read_buffer.size() < src_size) { 171 // If the input is linear and the output is tiled, swizzle the input and copy it over.
184 read_buffer.resize(src_size); 172 if (regs.dst_params.block_size.depth > 0) {
185 } 173 ASSERT(dst_params.layer == 0);
174 SwizzleSliceToVoxel(regs.line_length_in, regs.line_count, regs.pitch_in, width, height,
175 bytes_per_pixel, block_height, block_depth, dst_params.origin.x,
176 dst_params.origin.y, write_buffer.data(), read_buffer.data());
177 } else {
178 SwizzleSubrect(regs.line_length_in, regs.line_count, regs.pitch_in, width, bytes_per_pixel,
179 write_buffer.data() + dst_layer_size * dst_params.layer, read_buffer.data(),
180 block_height, dst_params.origin.x, dst_params.origin.y);
181 }
186 182
187 if (write_buffer.size() < dst_size) { 183 memory_manager.WriteBlock(regs.offset_out, write_buffer.data(), dst_size);
188 write_buffer.resize(dst_size); 184}
189 }
190 185
191 if (Settings::IsGPULevelExtreme()) { 186void MaxwellDMA::FastCopyBlockLinearToPitch() {
192 memory_manager.ReadBlock(source, read_buffer.data(), src_size); 187 const u32 bytes_per_pixel = regs.pitch_out / regs.line_length_in;
193 memory_manager.ReadBlock(dest, write_buffer.data(), dst_size); 188 const size_t src_size = GOB_SIZE;
194 } else { 189 const size_t dst_size = static_cast<size_t>(regs.pitch_out) * regs.line_count;
195 memory_manager.ReadBlockUnsafe(source, read_buffer.data(), src_size); 190 u32 pos_x = regs.src_params.origin.x;
196 memory_manager.ReadBlockUnsafe(dest, write_buffer.data(), dst_size); 191 u32 pos_y = regs.src_params.origin.y;
197 } 192 const u64 offset = GetGOBOffset(regs.src_params.width, regs.src_params.height, pos_x, pos_y,
193 regs.src_params.block_size.height, bytes_per_pixel);
194 const u32 x_in_gob = 64 / bytes_per_pixel;
195 pos_x = pos_x % x_in_gob;
196 pos_y = pos_y % 8;
197
198 if (read_buffer.size() < src_size) {
199 read_buffer.resize(src_size);
200 }
198 201
199 // If the input is linear and the output is tiled, swizzle the input and copy it over. 202 if (write_buffer.size() < dst_size) {
200 Texture::SwizzleSubrect( 203 write_buffer.resize(dst_size);
201 regs.x_count, regs.y_count, regs.src_pitch, regs.dst_params.size_x, bytes_per_pixel, 204 }
202 write_buffer.data() + dst_layer_size * regs.dst_params.pos_z, read_buffer.data(),
203 regs.dst_params.BlockHeight(), regs.dst_params.pos_x, regs.dst_params.pos_y);
204 205
205 memory_manager.WriteBlock(dest, write_buffer.data(), dst_size); 206 if (Settings::IsGPULevelExtreme()) {
207 memory_manager.ReadBlock(regs.offset_in + offset, read_buffer.data(), src_size);
208 memory_manager.ReadBlock(regs.offset_out, write_buffer.data(), dst_size);
209 } else {
210 memory_manager.ReadBlockUnsafe(regs.offset_in + offset, read_buffer.data(), src_size);
211 memory_manager.ReadBlockUnsafe(regs.offset_out, write_buffer.data(), dst_size);
206 } 212 }
213
214 UnswizzleSubrect(regs.line_length_in, regs.line_count, regs.pitch_out, regs.src_params.width,
215 bytes_per_pixel, read_buffer.data(), write_buffer.data(),
216 regs.src_params.block_size.height, pos_x, pos_y);
217
218 memory_manager.WriteBlock(regs.offset_out, write_buffer.data(), dst_size);
207} 219}
208 220
209} // namespace Tegra::Engines 221} // namespace Tegra::Engines
diff --git a/src/video_core/engines/maxwell_dma.h b/src/video_core/engines/maxwell_dma.h
index 502dd8509..50f445efc 100644
--- a/src/video_core/engines/maxwell_dma.h
+++ b/src/video_core/engines/maxwell_dma.h
@@ -24,160 +24,190 @@ class MemoryManager;
24namespace Tegra::Engines { 24namespace Tegra::Engines {
25 25
26/** 26/**
27 * This Engine is known as GK104_Copy. Documentation can be found in: 27 * This engine is known as gk104_copy. Documentation can be found in:
28 * https://github.com/NVIDIA/open-gpu-doc/blob/master/classes/dma-copy/clb0b5.h
28 * https://github.com/envytools/envytools/blob/master/rnndb/fifo/gk104_copy.xml 29 * https://github.com/envytools/envytools/blob/master/rnndb/fifo/gk104_copy.xml
29 */ 30 */
30 31
31class MaxwellDMA final : public EngineInterface { 32class MaxwellDMA final : public EngineInterface {
32public: 33public:
33 explicit MaxwellDMA(Core::System& system, MemoryManager& memory_manager); 34 struct PackedGPUVAddr {
34 ~MaxwellDMA() = default; 35 u32 upper;
35 36 u32 lower;
36 /// Write the value to the register identified by method. 37
37 void CallMethod(u32 method, u32 method_argument, bool is_last_call) override; 38 constexpr operator GPUVAddr() const noexcept {
38 39 return (static_cast<GPUVAddr>(upper & 0xff) << 32) | lower;
39 /// Write multiple values to the register identified by method. 40 }
40 void CallMultiMethod(u32 method, const u32* base_start, u32 amount, 41 };
41 u32 methods_pending) override; 42
43 union BlockSize {
44 BitField<0, 4, u32> width;
45 BitField<4, 4, u32> height;
46 BitField<8, 4, u32> depth;
47 BitField<12, 4, u32> gob_height;
48 };
49 static_assert(sizeof(BlockSize) == 4);
50
51 union Origin {
52 BitField<0, 16, u32> x;
53 BitField<16, 16, u32> y;
54 };
55 static_assert(sizeof(Origin) == 4);
56
57 struct Parameters {
58 BlockSize block_size;
59 u32 width;
60 u32 height;
61 u32 depth;
62 u32 layer;
63 Origin origin;
64 };
65 static_assert(sizeof(Parameters) == 24);
66
67 struct Semaphore {
68 PackedGPUVAddr address;
69 u32 payload;
70 };
71 static_assert(sizeof(Semaphore) == 12);
72
73 struct RenderEnable {
74 enum class Mode : u32 {
75 FALSE = 0,
76 TRUE = 1,
77 CONDITIONAL = 2,
78 RENDER_IF_EQUAL = 3,
79 RENDER_IF_NOT_EQUAL = 4,
80 };
42 81
43 struct Regs { 82 PackedGPUVAddr address;
44 static constexpr std::size_t NUM_REGS = 0x1D6; 83 BitField<0, 3, Mode> mode;
84 };
85 static_assert(sizeof(RenderEnable) == 12);
86
87 enum class PhysModeTarget : u32 {
88 LOCAL_FB = 0,
89 COHERENT_SYSMEM = 1,
90 NONCOHERENT_SYSMEM = 2,
91 };
92 using PhysMode = BitField<0, 2, PhysModeTarget>;
93
94 union LaunchDMA {
95 enum class DataTransferType : u32 {
96 NONE = 0,
97 PIPELINED = 1,
98 NON_PIPELINED = 2,
99 };
45 100
46 struct Parameters { 101 enum class SemaphoreType : u32 {
47 union { 102 NONE = 0,
48 BitField<0, 4, u32> block_depth; 103 RELEASE_ONE_WORD_SEMAPHORE = 1,
49 BitField<4, 4, u32> block_height; 104 RELEASE_FOUR_WORD_SEMAPHORE = 2,
50 BitField<8, 4, u32> block_width; 105 };
51 };
52 u32 size_x;
53 u32 size_y;
54 u32 size_z;
55 u32 pos_z;
56 union {
57 BitField<0, 16, u32> pos_x;
58 BitField<16, 16, u32> pos_y;
59 };
60 106
61 u32 BlockHeight() const { 107 enum class InterruptType : u32 {
62 return block_height.Value(); 108 NONE = 0,
63 } 109 BLOCKING = 1,
110 NON_BLOCKING = 2,
111 };
64 112
65 u32 BlockDepth() const { 113 enum class MemoryLayout : u32 {
66 return block_depth.Value(); 114 BLOCKLINEAR = 0,
67 } 115 PITCH = 1,
68 }; 116 };
69 117
70 static_assert(sizeof(Parameters) == 24, "Parameters has wrong size"); 118 enum class Type : u32 {
119 VIRTUAL = 0,
120 PHYSICAL = 1,
121 };
71 122
72 enum class ComponentMode : u32 { 123 enum class SemaphoreReduction : u32 {
73 Src0 = 0, 124 IMIN = 0,
74 Src1 = 1, 125 IMAX = 1,
75 Src2 = 2, 126 IXOR = 2,
76 Src3 = 3, 127 IAND = 3,
77 Const0 = 4, 128 IOR = 4,
78 Const1 = 5, 129 IADD = 5,
79 Zero = 6, 130 INC = 6,
131 DEC = 7,
132 FADD = 0xA,
80 }; 133 };
81 134
82 enum class CopyMode : u32 { 135 enum class SemaphoreReductionSign : u32 {
83 None = 0, 136 SIGNED = 0,
84 Unk1 = 1, 137 UNSIGNED = 1,
85 Unk2 = 2,
86 }; 138 };
87 139
88 enum class QueryMode : u32 { 140 enum class BypassL2 : u32 {
89 None = 0, 141 USE_PTE_SETTING = 0,
90 Short = 1, 142 FORCE_VOLATILE = 1,
91 Long = 2,
92 }; 143 };
93 144
94 enum class QueryIntr : u32 { 145 BitField<0, 2, DataTransferType> data_transfer_type;
95 None = 0, 146 BitField<2, 1, u32> flush_enable;
96 Block = 1, 147 BitField<3, 2, SemaphoreType> semaphore_type;
97 NonBlock = 2, 148 BitField<5, 2, InterruptType> interrupt_type;
149 BitField<7, 1, MemoryLayout> src_memory_layout;
150 BitField<8, 1, MemoryLayout> dst_memory_layout;
151 BitField<9, 1, u32> multi_line_enable;
152 BitField<10, 1, u32> remap_enable;
153 BitField<11, 1, u32> rmwdisable;
154 BitField<12, 1, Type> src_type;
155 BitField<13, 1, Type> dst_type;
156 BitField<14, 4, SemaphoreReduction> semaphore_reduction;
157 BitField<18, 1, SemaphoreReductionSign> semaphore_reduction_sign;
158 BitField<19, 1, u32> reduction_enable;
159 BitField<20, 1, BypassL2> bypass_l2;
160 };
161 static_assert(sizeof(LaunchDMA) == 4);
162
163 struct RemapConst {
164 enum Swizzle : u32 {
165 SRC_X = 0,
166 SRC_Y = 1,
167 SRC_Z = 2,
168 SRC_W = 3,
169 CONST_A = 4,
170 CONST_B = 5,
171 NO_WRITE = 6,
98 }; 172 };
99 173
100 union { 174 PackedGPUVAddr address;
101 struct {
102 INSERT_UNION_PADDING_WORDS(0xC0);
103
104 struct {
105 union {
106 BitField<0, 2, CopyMode> copy_mode;
107 BitField<2, 1, u32> flush;
108
109 BitField<3, 2, QueryMode> query_mode;
110 BitField<5, 2, QueryIntr> query_intr;
111
112 BitField<7, 1, u32> is_src_linear;
113 BitField<8, 1, u32> is_dst_linear;
114
115 BitField<9, 1, u32> enable_2d;
116 BitField<10, 1, u32> enable_swizzle;
117 };
118 } exec;
119
120 INSERT_UNION_PADDING_WORDS(0x3F);
121
122 struct {
123 u32 address_high;
124 u32 address_low;
125
126 GPUVAddr Address() const {
127 return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) |
128 address_low);
129 }
130 } src_address;
131
132 struct {
133 u32 address_high;
134 u32 address_low;
135
136 GPUVAddr Address() const {
137 return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) |
138 address_low);
139 }
140 } dst_address;
141
142 u32 src_pitch;
143 u32 dst_pitch;
144 u32 x_count;
145 u32 y_count;
146
147 INSERT_UNION_PADDING_WORDS(0xB8);
148
149 u32 const0;
150 u32 const1;
151 union {
152 BitField<0, 4, ComponentMode> component0;
153 BitField<4, 4, ComponentMode> component1;
154 BitField<8, 4, ComponentMode> component2;
155 BitField<12, 4, ComponentMode> component3;
156 BitField<16, 2, u32> component_size;
157 BitField<20, 3, u32> src_num_components;
158 BitField<24, 3, u32> dst_num_components;
159
160 u32 SrcBytePerPixel() const {
161 return src_num_components.Value() * component_size.Value();
162 }
163 u32 DstBytePerPixel() const {
164 return dst_num_components.Value() * component_size.Value();
165 }
166 } swizzle_config;
167 175
168 Parameters dst_params; 176 union {
177 BitField<0, 3, Swizzle> dst_x;
178 BitField<4, 3, Swizzle> dst_y;
179 BitField<8, 3, Swizzle> dst_z;
180 BitField<12, 3, Swizzle> dst_w;
181 BitField<16, 2, u32> component_size_minus_one;
182 BitField<20, 2, u32> num_src_components_minus_one;
183 BitField<24, 2, u32> num_dst_components_minus_one;
184 };
185 };
186 static_assert(sizeof(RemapConst) == 12);
169 187
170 INSERT_UNION_PADDING_WORDS(1); 188 explicit MaxwellDMA(Core::System& system, MemoryManager& memory_manager);
189 ~MaxwellDMA() = default;
171 190
172 Parameters src_params; 191 /// Write the value to the register identified by method.
192 void CallMethod(u32 method, u32 method_argument, bool is_last_call) override;
173 193
174 INSERT_UNION_PADDING_WORDS(0x13); 194 /// Write multiple values to the register identified by method.
175 }; 195 void CallMultiMethod(u32 method, const u32* base_start, u32 amount,
176 std::array<u32, NUM_REGS> reg_array; 196 u32 methods_pending) override;
177 };
178 } regs{};
179 197
180private: 198private:
199 /// Performs the copy from the source buffer to the destination buffer as configured in the
200 /// registers.
201 void Launch();
202
203 void CopyPitchToPitch();
204
205 void CopyBlockLinearToPitch();
206
207 void CopyPitchToBlockLinear();
208
209 void FastCopyBlockLinearToPitch();
210
181 Core::System& system; 211 Core::System& system;
182 212
183 MemoryManager& memory_manager; 213 MemoryManager& memory_manager;
@@ -185,28 +215,58 @@ private:
185 std::vector<u8> read_buffer; 215 std::vector<u8> read_buffer;
186 std::vector<u8> write_buffer; 216 std::vector<u8> write_buffer;
187 217
188 /// Performs the copy from the source buffer to the destination buffer as configured in the 218 static constexpr std::size_t NUM_REGS = 0x800;
189 /// registers. 219 struct Regs {
190 void HandleCopy(); 220 union {
191}; 221 struct {
222 u32 reserved[0x40];
223 u32 nop;
224 u32 reserved01[0xf];
225 u32 pm_trigger;
226 u32 reserved02[0x3f];
227 Semaphore semaphore;
228 u32 reserved03[0x2];
229 RenderEnable render_enable;
230 PhysMode src_phys_mode;
231 PhysMode dst_phys_mode;
232 u32 reserved04[0x26];
233 LaunchDMA launch_dma;
234 u32 reserved05[0x3f];
235 PackedGPUVAddr offset_in;
236 PackedGPUVAddr offset_out;
237 u32 pitch_in;
238 u32 pitch_out;
239 u32 line_length_in;
240 u32 line_count;
241 u32 reserved06[0xb8];
242 RemapConst remap_const;
243 Parameters dst_params;
244 u32 reserved07[0x1];
245 Parameters src_params;
246 u32 reserved08[0x275];
247 u32 pm_trigger_end;
248 u32 reserved09[0x3ba];
249 };
250 std::array<u32, NUM_REGS> reg_array;
251 };
252 } regs{};
192 253
193#define ASSERT_REG_POSITION(field_name, position) \ 254#define ASSERT_REG_POSITION(field_name, position) \
194 static_assert(offsetof(MaxwellDMA::Regs, field_name) == position * 4, \ 255 static_assert(offsetof(MaxwellDMA::Regs, field_name) == position * 4, \
195 "Field " #field_name " has invalid position") 256 "Field " #field_name " has invalid position")
196 257
197ASSERT_REG_POSITION(exec, 0xC0); 258 ASSERT_REG_POSITION(launch_dma, 0xC0);
198ASSERT_REG_POSITION(src_address, 0x100); 259 ASSERT_REG_POSITION(offset_in, 0x100);
199ASSERT_REG_POSITION(dst_address, 0x102); 260 ASSERT_REG_POSITION(offset_out, 0x102);
200ASSERT_REG_POSITION(src_pitch, 0x104); 261 ASSERT_REG_POSITION(pitch_in, 0x104);
201ASSERT_REG_POSITION(dst_pitch, 0x105); 262 ASSERT_REG_POSITION(pitch_out, 0x105);
202ASSERT_REG_POSITION(x_count, 0x106); 263 ASSERT_REG_POSITION(line_length_in, 0x106);
203ASSERT_REG_POSITION(y_count, 0x107); 264 ASSERT_REG_POSITION(line_count, 0x107);
204ASSERT_REG_POSITION(const0, 0x1C0); 265 ASSERT_REG_POSITION(remap_const, 0x1C0);
205ASSERT_REG_POSITION(const1, 0x1C1); 266 ASSERT_REG_POSITION(dst_params, 0x1C3);
206ASSERT_REG_POSITION(swizzle_config, 0x1C2); 267 ASSERT_REG_POSITION(src_params, 0x1CA);
207ASSERT_REG_POSITION(dst_params, 0x1C3);
208ASSERT_REG_POSITION(src_params, 0x1CA);
209 268
210#undef ASSERT_REG_POSITION 269#undef ASSERT_REG_POSITION
270};
211 271
212} // namespace Tegra::Engines 272} // namespace Tegra::Engines
diff --git a/src/video_core/texture_cache/surface_params.cpp b/src/video_core/texture_cache/surface_params.cpp
index 0b2b2b8c4..921562c1f 100644
--- a/src/video_core/texture_cache/surface_params.cpp
+++ b/src/video_core/texture_cache/surface_params.cpp
@@ -343,8 +343,7 @@ std::size_t SurfaceParams::GetLayerSize(bool as_host_size, bool uncompressed) co
343 size += GetInnerMipmapMemorySize(level, as_host_size, uncompressed); 343 size += GetInnerMipmapMemorySize(level, as_host_size, uncompressed);
344 } 344 }
345 if (is_tiled && is_layered) { 345 if (is_tiled && is_layered) {
346 return Common::AlignBits(size, 346 return Common::AlignBits(size, Tegra::Texture::GOB_SIZE_SHIFT + block_height + block_depth);
347 Tegra::Texture::GetGOBSizeShift() + block_height + block_depth);
348 } 347 }
349 return size; 348 return size;
350} 349}
@@ -418,7 +417,7 @@ std::tuple<u32, u32, u32> SurfaceParams::GetBlockOffsetXYZ(u32 offset) const {
418 const u32 block_size = GetBlockSize(); 417 const u32 block_size = GetBlockSize();
419 const u32 block_index = offset / block_size; 418 const u32 block_index = offset / block_size;
420 const u32 gob_offset = offset % block_size; 419 const u32 gob_offset = offset % block_size;
421 const u32 gob_index = gob_offset / static_cast<u32>(Tegra::Texture::GetGOBSize()); 420 const u32 gob_index = gob_offset / static_cast<u32>(Tegra::Texture::GOB_SIZE);
422 const u32 x_gob_pixels = 64U / GetBytesPerPixel(); 421 const u32 x_gob_pixels = 64U / GetBytesPerPixel();
423 const u32 x_block_pixels = x_gob_pixels << block_width; 422 const u32 x_block_pixels = x_gob_pixels << block_width;
424 const u32 y_block_pixels = 8U << block_height; 423 const u32 y_block_pixels = 8U << block_height;
diff --git a/src/video_core/texture_cache/surface_params.h b/src/video_core/texture_cache/surface_params.h
index 24957df8d..118aa689e 100644
--- a/src/video_core/texture_cache/surface_params.h
+++ b/src/video_core/texture_cache/surface_params.h
@@ -204,7 +204,7 @@ public:
204 static std::size_t AlignLayered(const std::size_t out_size, const u32 block_height, 204 static std::size_t AlignLayered(const std::size_t out_size, const u32 block_height,
205 const u32 block_depth) { 205 const u32 block_depth) {
206 return Common::AlignBits(out_size, 206 return Common::AlignBits(out_size,
207 Tegra::Texture::GetGOBSizeShift() + block_height + block_depth); 207 Tegra::Texture::GOB_SIZE_SHIFT + block_height + block_depth);
208 } 208 }
209 209
210 /// Converts a width from a type of surface into another. This helps represent the 210 /// Converts a width from a type of surface into another. This helps represent the
diff --git a/src/video_core/textures/decoders.cpp b/src/video_core/textures/decoders.cpp
index 548e4c3fe..98beabef1 100644
--- a/src/video_core/textures/decoders.cpp
+++ b/src/video_core/textures/decoders.cpp
@@ -6,6 +6,7 @@
6#include <cstring> 6#include <cstring>
7#include "common/alignment.h" 7#include "common/alignment.h"
8#include "common/assert.h" 8#include "common/assert.h"
9#include "common/bit_util.h"
9#include "video_core/gpu.h" 10#include "video_core/gpu.h"
10#include "video_core/textures/decoders.h" 11#include "video_core/textures/decoders.h"
11#include "video_core/textures/texture.h" 12#include "video_core/textures/texture.h"
@@ -37,20 +38,10 @@ struct alignas(64) SwizzleTable {
37 std::array<std::array<u16, M>, N> values{}; 38 std::array<std::array<u16, M>, N> values{};
38}; 39};
39 40
40constexpr u32 gob_size_x_shift = 6; 41constexpr u32 FAST_SWIZZLE_ALIGN = 16;
41constexpr u32 gob_size_y_shift = 3;
42constexpr u32 gob_size_z_shift = 0;
43constexpr u32 gob_size_shift = gob_size_x_shift + gob_size_y_shift + gob_size_z_shift;
44 42
45constexpr u32 gob_size_x = 1U << gob_size_x_shift; 43constexpr auto LEGACY_SWIZZLE_TABLE = SwizzleTable<GOB_SIZE_X, GOB_SIZE_X, GOB_SIZE_Z>();
46constexpr u32 gob_size_y = 1U << gob_size_y_shift; 44constexpr auto FAST_SWIZZLE_TABLE = SwizzleTable<GOB_SIZE_Y, 4, FAST_SWIZZLE_ALIGN>();
47constexpr u32 gob_size_z = 1U << gob_size_z_shift;
48constexpr u32 gob_size = 1U << gob_size_shift;
49
50constexpr u32 fast_swizzle_align = 16;
51
52constexpr auto legacy_swizzle_table = SwizzleTable<gob_size_y, gob_size_x, gob_size_z>();
53constexpr auto fast_swizzle_table = SwizzleTable<gob_size_y, 4, fast_swizzle_align>();
54 45
55/** 46/**
56 * This function manages ALL the GOBs(Group of Bytes) Inside a single block. 47 * This function manages ALL the GOBs(Group of Bytes) Inside a single block.
@@ -69,17 +60,17 @@ void PreciseProcessBlock(u8* const swizzled_data, u8* const unswizzled_data, con
69 u32 y_address = z_address; 60 u32 y_address = z_address;
70 u32 pixel_base = layer_z * z + y_start * stride_x; 61 u32 pixel_base = layer_z * z + y_start * stride_x;
71 for (u32 y = y_start; y < y_end; y++) { 62 for (u32 y = y_start; y < y_end; y++) {
72 const auto& table = legacy_swizzle_table[y % gob_size_y]; 63 const auto& table = LEGACY_SWIZZLE_TABLE[y % GOB_SIZE_Y];
73 for (u32 x = x_start; x < x_end; x++) { 64 for (u32 x = x_start; x < x_end; x++) {
74 const u32 swizzle_offset{y_address + table[x * bytes_per_pixel % gob_size_x]}; 65 const u32 swizzle_offset{y_address + table[x * bytes_per_pixel % GOB_SIZE_X]};
75 const u32 pixel_index{x * out_bytes_per_pixel + pixel_base}; 66 const u32 pixel_index{x * out_bytes_per_pixel + pixel_base};
76 data_ptrs[unswizzle] = swizzled_data + swizzle_offset; 67 data_ptrs[unswizzle] = swizzled_data + swizzle_offset;
77 data_ptrs[!unswizzle] = unswizzled_data + pixel_index; 68 data_ptrs[!unswizzle] = unswizzled_data + pixel_index;
78 std::memcpy(data_ptrs[0], data_ptrs[1], bytes_per_pixel); 69 std::memcpy(data_ptrs[0], data_ptrs[1], bytes_per_pixel);
79 } 70 }
80 pixel_base += stride_x; 71 pixel_base += stride_x;
81 if ((y + 1) % gob_size_y == 0) 72 if ((y + 1) % GOB_SIZE_Y == 0)
82 y_address += gob_size; 73 y_address += GOB_SIZE;
83 } 74 }
84 z_address += xy_block_size; 75 z_address += xy_block_size;
85 } 76 }
@@ -104,18 +95,18 @@ void FastProcessBlock(u8* const swizzled_data, u8* const unswizzled_data, const
104 u32 y_address = z_address; 95 u32 y_address = z_address;
105 u32 pixel_base = layer_z * z + y_start * stride_x; 96 u32 pixel_base = layer_z * z + y_start * stride_x;
106 for (u32 y = y_start; y < y_end; y++) { 97 for (u32 y = y_start; y < y_end; y++) {
107 const auto& table = fast_swizzle_table[y % gob_size_y]; 98 const auto& table = FAST_SWIZZLE_TABLE[y % GOB_SIZE_Y];
108 for (u32 xb = x_startb; xb < x_endb; xb += fast_swizzle_align) { 99 for (u32 xb = x_startb; xb < x_endb; xb += FAST_SWIZZLE_ALIGN) {
109 const u32 swizzle_offset{y_address + table[(xb / fast_swizzle_align) % 4]}; 100 const u32 swizzle_offset{y_address + table[(xb / FAST_SWIZZLE_ALIGN) % 4]};
110 const u32 out_x = xb * out_bytes_per_pixel / bytes_per_pixel; 101 const u32 out_x = xb * out_bytes_per_pixel / bytes_per_pixel;
111 const u32 pixel_index{out_x + pixel_base}; 102 const u32 pixel_index{out_x + pixel_base};
112 data_ptrs[unswizzle ? 1 : 0] = swizzled_data + swizzle_offset; 103 data_ptrs[unswizzle ? 1 : 0] = swizzled_data + swizzle_offset;
113 data_ptrs[unswizzle ? 0 : 1] = unswizzled_data + pixel_index; 104 data_ptrs[unswizzle ? 0 : 1] = unswizzled_data + pixel_index;
114 std::memcpy(data_ptrs[0], data_ptrs[1], fast_swizzle_align); 105 std::memcpy(data_ptrs[0], data_ptrs[1], FAST_SWIZZLE_ALIGN);
115 } 106 }
116 pixel_base += stride_x; 107 pixel_base += stride_x;
117 if ((y + 1) % gob_size_y == 0) 108 if ((y + 1) % GOB_SIZE_Y == 0)
118 y_address += gob_size; 109 y_address += GOB_SIZE;
119 } 110 }
120 z_address += xy_block_size; 111 z_address += xy_block_size;
121 } 112 }
@@ -138,9 +129,9 @@ void SwizzledData(u8* const swizzled_data, u8* const unswizzled_data, const bool
138 auto div_ceil = [](const u32 x, const u32 y) { return ((x + y - 1) / y); }; 129 auto div_ceil = [](const u32 x, const u32 y) { return ((x + y - 1) / y); };
139 const u32 stride_x = width * out_bytes_per_pixel; 130 const u32 stride_x = width * out_bytes_per_pixel;
140 const u32 layer_z = height * stride_x; 131 const u32 layer_z = height * stride_x;
141 const u32 gob_elements_x = gob_size_x / bytes_per_pixel; 132 const u32 gob_elements_x = GOB_SIZE_X / bytes_per_pixel;
142 constexpr u32 gob_elements_y = gob_size_y; 133 constexpr u32 gob_elements_y = GOB_SIZE_Y;
143 constexpr u32 gob_elements_z = gob_size_z; 134 constexpr u32 gob_elements_z = GOB_SIZE_Z;
144 const u32 block_x_elements = gob_elements_x; 135 const u32 block_x_elements = gob_elements_x;
145 const u32 block_y_elements = gob_elements_y * block_height; 136 const u32 block_y_elements = gob_elements_y * block_height;
146 const u32 block_z_elements = gob_elements_z * block_depth; 137 const u32 block_z_elements = gob_elements_z * block_depth;
@@ -148,7 +139,7 @@ void SwizzledData(u8* const swizzled_data, u8* const unswizzled_data, const bool
148 const u32 blocks_on_x = div_ceil(aligned_width, block_x_elements); 139 const u32 blocks_on_x = div_ceil(aligned_width, block_x_elements);
149 const u32 blocks_on_y = div_ceil(height, block_y_elements); 140 const u32 blocks_on_y = div_ceil(height, block_y_elements);
150 const u32 blocks_on_z = div_ceil(depth, block_z_elements); 141 const u32 blocks_on_z = div_ceil(depth, block_z_elements);
151 const u32 xy_block_size = gob_size * block_height; 142 const u32 xy_block_size = GOB_SIZE * block_height;
152 const u32 block_size = xy_block_size * block_depth; 143 const u32 block_size = xy_block_size * block_depth;
153 u32 tile_offset = 0; 144 u32 tile_offset = 0;
154 for (u32 zb = 0; zb < blocks_on_z; zb++) { 145 for (u32 zb = 0; zb < blocks_on_z; zb++) {
@@ -182,7 +173,7 @@ void CopySwizzledData(u32 width, u32 height, u32 depth, u32 bytes_per_pixel,
182 bool unswizzle, u32 block_height, u32 block_depth, u32 width_spacing) { 173 bool unswizzle, u32 block_height, u32 block_depth, u32 width_spacing) {
183 const u32 block_height_size{1U << block_height}; 174 const u32 block_height_size{1U << block_height};
184 const u32 block_depth_size{1U << block_depth}; 175 const u32 block_depth_size{1U << block_depth};
185 if (bytes_per_pixel % 3 != 0 && (width * bytes_per_pixel) % fast_swizzle_align == 0) { 176 if (bytes_per_pixel % 3 != 0 && (width * bytes_per_pixel) % FAST_SWIZZLE_ALIGN == 0) {
186 SwizzledData<true>(swizzled_data, unswizzled_data, unswizzle, width, height, depth, 177 SwizzledData<true>(swizzled_data, unswizzled_data, unswizzle, width, height, depth,
187 bytes_per_pixel, out_bytes_per_pixel, block_height_size, 178 bytes_per_pixel, out_bytes_per_pixel, block_height_size,
188 block_depth_size, width_spacing); 179 block_depth_size, width_spacing);
@@ -259,25 +250,26 @@ std::vector<u8> UnswizzleTexture(u8* address, u32 tile_size_x, u32 tile_size_y,
259} 250}
260 251
261void SwizzleSubrect(u32 subrect_width, u32 subrect_height, u32 source_pitch, u32 swizzled_width, 252void SwizzleSubrect(u32 subrect_width, u32 subrect_height, u32 source_pitch, u32 swizzled_width,
262 u32 bytes_per_pixel, u8* swizzled_data, u8* unswizzled_data, 253 u32 bytes_per_pixel, u8* swizzled_data, const u8* unswizzled_data,
263 u32 block_height_bit, u32 offset_x, u32 offset_y) { 254 u32 block_height_bit, u32 offset_x, u32 offset_y) {
264 const u32 block_height = 1U << block_height_bit; 255 const u32 block_height = 1U << block_height_bit;
265 const u32 image_width_in_gobs{(swizzled_width * bytes_per_pixel + (gob_size_x - 1)) / 256 const u32 image_width_in_gobs =
266 gob_size_x}; 257 (swizzled_width * bytes_per_pixel + (GOB_SIZE_X - 1)) / GOB_SIZE_X;
267 for (u32 line = 0; line < subrect_height; ++line) { 258 for (u32 line = 0; line < subrect_height; ++line) {
268 const u32 dst_y = line + offset_y; 259 const u32 dst_y = line + offset_y;
269 const u32 gob_address_y = 260 const u32 gob_address_y =
270 (dst_y / (gob_size_y * block_height)) * gob_size * block_height * image_width_in_gobs + 261 (dst_y / (GOB_SIZE_Y * block_height)) * GOB_SIZE * block_height * image_width_in_gobs +
271 ((dst_y % (gob_size_y * block_height)) / gob_size_y) * gob_size; 262 ((dst_y % (GOB_SIZE_Y * block_height)) / GOB_SIZE_Y) * GOB_SIZE;
272 const auto& table = legacy_swizzle_table[dst_y % gob_size_y]; 263 const auto& table = LEGACY_SWIZZLE_TABLE[dst_y % GOB_SIZE_Y];
273 for (u32 x = 0; x < subrect_width; ++x) { 264 for (u32 x = 0; x < subrect_width; ++x) {
274 const u32 dst_x = x + offset_x; 265 const u32 dst_x = x + offset_x;
275 const u32 gob_address = 266 const u32 gob_address =
276 gob_address_y + (dst_x * bytes_per_pixel / gob_size_x) * gob_size * block_height; 267 gob_address_y + (dst_x * bytes_per_pixel / GOB_SIZE_X) * GOB_SIZE * block_height;
277 const u32 swizzled_offset = gob_address + table[(dst_x * bytes_per_pixel) % gob_size_x]; 268 const u32 swizzled_offset = gob_address + table[(dst_x * bytes_per_pixel) % GOB_SIZE_X];
278 u8* source_line = unswizzled_data + line * source_pitch + x * bytes_per_pixel; 269 const u32 unswizzled_offset = line * source_pitch + x * bytes_per_pixel;
279 u8* dest_addr = swizzled_data + swizzled_offset;
280 270
271 const u8* const source_line = unswizzled_data + unswizzled_offset;
272 u8* const dest_addr = swizzled_data + swizzled_offset;
281 std::memcpy(dest_addr, source_line, bytes_per_pixel); 273 std::memcpy(dest_addr, source_line, bytes_per_pixel);
282 } 274 }
283 } 275 }
@@ -289,14 +281,15 @@ void UnswizzleSubrect(u32 subrect_width, u32 subrect_height, u32 dest_pitch, u32
289 const u32 block_height = 1U << block_height_bit; 281 const u32 block_height = 1U << block_height_bit;
290 for (u32 line = 0; line < subrect_height; ++line) { 282 for (u32 line = 0; line < subrect_height; ++line) {
291 const u32 y2 = line + offset_y; 283 const u32 y2 = line + offset_y;
292 const u32 gob_address_y = (y2 / (gob_size_y * block_height)) * gob_size * block_height + 284 const u32 gob_address_y = (y2 / (GOB_SIZE_Y * block_height)) * GOB_SIZE * block_height +
293 ((y2 % (gob_size_y * block_height)) / gob_size_y) * gob_size; 285 ((y2 % (GOB_SIZE_Y * block_height)) / GOB_SIZE_Y) * GOB_SIZE;
294 const auto& table = legacy_swizzle_table[y2 % gob_size_y]; 286 const auto& table = LEGACY_SWIZZLE_TABLE[y2 % GOB_SIZE_Y];
295 for (u32 x = 0; x < subrect_width; ++x) { 287 for (u32 x = 0; x < subrect_width; ++x) {
296 const u32 x2 = (x + offset_x) * bytes_per_pixel; 288 const u32 x2 = (x + offset_x) * bytes_per_pixel;
297 const u32 gob_address = gob_address_y + (x2 / gob_size_x) * gob_size * block_height; 289 const u32 gob_address = gob_address_y + (x2 / GOB_SIZE_X) * GOB_SIZE * block_height;
298 const u32 swizzled_offset = gob_address + table[x2 % gob_size_x]; 290 const u32 swizzled_offset = gob_address + table[x2 % GOB_SIZE_X];
299 u8* dest_line = unswizzled_data + line * dest_pitch + x * bytes_per_pixel; 291 const u32 unswizzled_offset = line * dest_pitch + x * bytes_per_pixel;
292 u8* dest_line = unswizzled_data + unswizzled_offset;
300 u8* source_addr = swizzled_data + swizzled_offset; 293 u8* source_addr = swizzled_data + swizzled_offset;
301 294
302 std::memcpy(dest_line, source_addr, bytes_per_pixel); 295 std::memcpy(dest_line, source_addr, bytes_per_pixel);
@@ -304,21 +297,48 @@ void UnswizzleSubrect(u32 subrect_width, u32 subrect_height, u32 dest_pitch, u32
304 } 297 }
305} 298}
306 299
300void SwizzleSliceToVoxel(u32 line_length_in, u32 line_count, u32 pitch, u32 width, u32 height,
301 u32 bytes_per_pixel, u32 block_height, u32 block_depth, u32 origin_x,
302 u32 origin_y, u8* output, const u8* input) {
303 UNIMPLEMENTED_IF(origin_x > 0);
304 UNIMPLEMENTED_IF(origin_y > 0);
305
306 const u32 stride = width * bytes_per_pixel;
307 const u32 gobs_in_x = (stride + GOB_SIZE_X - 1) / GOB_SIZE_X;
308 const u32 block_size = gobs_in_x << (GOB_SIZE_SHIFT + block_height + block_depth);
309
310 const u32 block_height_mask = (1U << block_height) - 1;
311 const u32 x_shift = Common::CountTrailingZeroes32(GOB_SIZE << (block_height + block_depth));
312
313 for (u32 line = 0; line < line_count; ++line) {
314 const auto& table = LEGACY_SWIZZLE_TABLE[line % GOB_SIZE_Y];
315 const u32 block_y = line / GOB_SIZE_Y;
316 const u32 dst_offset_y =
317 (block_y >> block_height) * block_size + (block_y & block_height_mask) * GOB_SIZE;
318 for (u32 x = 0; x < line_length_in; ++x) {
319 const u32 dst_offset =
320 ((x / GOB_SIZE_X) << x_shift) + dst_offset_y + table[x % GOB_SIZE_X];
321 const u32 src_offset = x * bytes_per_pixel + line * pitch;
322 std::memcpy(output + dst_offset, input + src_offset, bytes_per_pixel);
323 }
324 }
325}
326
307void SwizzleKepler(const u32 width, const u32 height, const u32 dst_x, const u32 dst_y, 327void SwizzleKepler(const u32 width, const u32 height, const u32 dst_x, const u32 dst_y,
308 const u32 block_height_bit, const std::size_t copy_size, const u8* source_data, 328 const u32 block_height_bit, const std::size_t copy_size, const u8* source_data,
309 u8* swizzle_data) { 329 u8* swizzle_data) {
310 const u32 block_height = 1U << block_height_bit; 330 const u32 block_height = 1U << block_height_bit;
311 const u32 image_width_in_gobs{(width + gob_size_x - 1) / gob_size_x}; 331 const u32 image_width_in_gobs{(width + GOB_SIZE_X - 1) / GOB_SIZE_X};
312 std::size_t count = 0; 332 std::size_t count = 0;
313 for (std::size_t y = dst_y; y < height && count < copy_size; ++y) { 333 for (std::size_t y = dst_y; y < height && count < copy_size; ++y) {
314 const std::size_t gob_address_y = 334 const std::size_t gob_address_y =
315 (y / (gob_size_y * block_height)) * gob_size * block_height * image_width_in_gobs + 335 (y / (GOB_SIZE_Y * block_height)) * GOB_SIZE * block_height * image_width_in_gobs +
316 ((y % (gob_size_y * block_height)) / gob_size_y) * gob_size; 336 ((y % (GOB_SIZE_Y * block_height)) / GOB_SIZE_Y) * GOB_SIZE;
317 const auto& table = legacy_swizzle_table[y % gob_size_y]; 337 const auto& table = LEGACY_SWIZZLE_TABLE[y % GOB_SIZE_Y];
318 for (std::size_t x = dst_x; x < width && count < copy_size; ++x) { 338 for (std::size_t x = dst_x; x < width && count < copy_size; ++x) {
319 const std::size_t gob_address = 339 const std::size_t gob_address =
320 gob_address_y + (x / gob_size_x) * gob_size * block_height; 340 gob_address_y + (x / GOB_SIZE_X) * GOB_SIZE * block_height;
321 const std::size_t swizzled_offset = gob_address + table[x % gob_size_x]; 341 const std::size_t swizzled_offset = gob_address + table[x % GOB_SIZE_X];
322 const u8* source_line = source_data + count; 342 const u8* source_line = source_data + count;
323 u8* dest_addr = swizzle_data + swizzled_offset; 343 u8* dest_addr = swizzle_data + swizzled_offset;
324 count++; 344 count++;
@@ -373,9 +393,9 @@ std::vector<u8> DecodeTexture(const std::vector<u8>& texture_data, TextureFormat
373std::size_t CalculateSize(bool tiled, u32 bytes_per_pixel, u32 width, u32 height, u32 depth, 393std::size_t CalculateSize(bool tiled, u32 bytes_per_pixel, u32 width, u32 height, u32 depth,
374 u32 block_height, u32 block_depth) { 394 u32 block_height, u32 block_depth) {
375 if (tiled) { 395 if (tiled) {
376 const u32 aligned_width = Common::AlignBits(width * bytes_per_pixel, gob_size_x_shift); 396 const u32 aligned_width = Common::AlignBits(width * bytes_per_pixel, GOB_SIZE_X_SHIFT);
377 const u32 aligned_height = Common::AlignBits(height, gob_size_y_shift + block_height); 397 const u32 aligned_height = Common::AlignBits(height, GOB_SIZE_Y_SHIFT + block_height);
378 const u32 aligned_depth = Common::AlignBits(depth, gob_size_z_shift + block_depth); 398 const u32 aligned_depth = Common::AlignBits(depth, GOB_SIZE_Z_SHIFT + block_depth);
379 return aligned_width * aligned_height * aligned_depth; 399 return aligned_width * aligned_height * aligned_depth;
380 } else { 400 } else {
381 return width * height * depth * bytes_per_pixel; 401 return width * height * depth * bytes_per_pixel;
@@ -386,14 +406,14 @@ u64 GetGOBOffset(u32 width, u32 height, u32 dst_x, u32 dst_y, u32 block_height,
386 u32 bytes_per_pixel) { 406 u32 bytes_per_pixel) {
387 auto div_ceil = [](const u32 x, const u32 y) { return ((x + y - 1) / y); }; 407 auto div_ceil = [](const u32 x, const u32 y) { return ((x + y - 1) / y); };
388 const u32 gobs_in_block = 1 << block_height; 408 const u32 gobs_in_block = 1 << block_height;
389 const u32 y_blocks = gob_size_y << block_height; 409 const u32 y_blocks = GOB_SIZE_Y << block_height;
390 const u32 x_per_gob = gob_size_x / bytes_per_pixel; 410 const u32 x_per_gob = GOB_SIZE_X / bytes_per_pixel;
391 const u32 x_blocks = div_ceil(width, x_per_gob); 411 const u32 x_blocks = div_ceil(width, x_per_gob);
392 const u32 block_size = gob_size * gobs_in_block; 412 const u32 block_size = GOB_SIZE * gobs_in_block;
393 const u32 stride = block_size * x_blocks; 413 const u32 stride = block_size * x_blocks;
394 const u32 base = (dst_y / y_blocks) * stride + (dst_x / x_per_gob) * block_size; 414 const u32 base = (dst_y / y_blocks) * stride + (dst_x / x_per_gob) * block_size;
395 const u32 relative_y = dst_y % y_blocks; 415 const u32 relative_y = dst_y % y_blocks;
396 return base + (relative_y / gob_size_y) * gob_size; 416 return base + (relative_y / GOB_SIZE_Y) * GOB_SIZE;
397} 417}
398 418
399} // namespace Tegra::Texture 419} // namespace Tegra::Texture
diff --git a/src/video_core/textures/decoders.h b/src/video_core/textures/decoders.h
index 06f3ebf87..232b696b3 100644
--- a/src/video_core/textures/decoders.h
+++ b/src/video_core/textures/decoders.h
@@ -10,15 +10,15 @@
10 10
11namespace Tegra::Texture { 11namespace Tegra::Texture {
12 12
13// GOBSize constant. Calculated by 64 bytes in x multiplied by 8 y coords, represents 13constexpr u32 GOB_SIZE_X = 64;
14// an small rect of (64/bytes_per_pixel)X8. 14constexpr u32 GOB_SIZE_Y = 8;
15inline std::size_t GetGOBSize() { 15constexpr u32 GOB_SIZE_Z = 1;
16 return 512; 16constexpr u32 GOB_SIZE = GOB_SIZE_X * GOB_SIZE_Y * GOB_SIZE_Z;
17}
18 17
19inline std::size_t GetGOBSizeShift() { 18constexpr std::size_t GOB_SIZE_X_SHIFT = 6;
20 return 9; 19constexpr std::size_t GOB_SIZE_Y_SHIFT = 3;
21} 20constexpr std::size_t GOB_SIZE_Z_SHIFT = 0;
21constexpr std::size_t GOB_SIZE_SHIFT = GOB_SIZE_X_SHIFT + GOB_SIZE_Y_SHIFT + GOB_SIZE_Z_SHIFT;
22 22
23/// Unswizzles a swizzled texture without changing its format. 23/// Unswizzles a swizzled texture without changing its format.
24void UnswizzleTexture(u8* unswizzled_data, u8* address, u32 tile_size_x, u32 tile_size_y, 24void UnswizzleTexture(u8* unswizzled_data, u8* address, u32 tile_size_x, u32 tile_size_y,
@@ -48,14 +48,32 @@ std::size_t CalculateSize(bool tiled, u32 bytes_per_pixel, u32 width, u32 height
48 48
49/// Copies an untiled subrectangle into a tiled surface. 49/// Copies an untiled subrectangle into a tiled surface.
50void SwizzleSubrect(u32 subrect_width, u32 subrect_height, u32 source_pitch, u32 swizzled_width, 50void SwizzleSubrect(u32 subrect_width, u32 subrect_height, u32 source_pitch, u32 swizzled_width,
51 u32 bytes_per_pixel, u8* swizzled_data, u8* unswizzled_data, u32 block_height, 51 u32 bytes_per_pixel, u8* swizzled_data, const u8* unswizzled_data,
52 u32 offset_x, u32 offset_y); 52 u32 block_height_bit, u32 offset_x, u32 offset_y);
53 53
54/// Copies a tiled subrectangle into a linear surface. 54/// Copies a tiled subrectangle into a linear surface.
55void UnswizzleSubrect(u32 subrect_width, u32 subrect_height, u32 dest_pitch, u32 swizzled_width, 55void UnswizzleSubrect(u32 subrect_width, u32 subrect_height, u32 dest_pitch, u32 swizzled_width,
56 u32 bytes_per_pixel, u8* swizzled_data, u8* unswizzled_data, u32 block_height, 56 u32 bytes_per_pixel, u8* swizzled_data, u8* unswizzled_data, u32 block_height,
57 u32 offset_x, u32 offset_y); 57 u32 offset_x, u32 offset_y);
58 58
59/// @brief Swizzles a 2D array of pixels into a 3D texture
60/// @param line_length_in Number of pixels per line
61/// @param line_count Number of lines
62/// @param pitch Number of bytes per line
63/// @param width Width of the swizzled texture
64/// @param height Height of the swizzled texture
65/// @param bytes_per_pixel Number of bytes used per pixel
66/// @param block_height Block height shift
67/// @param block_depth Block depth shift
68/// @param origin_x Column offset in pixels of the swizzled texture
69/// @param origin_y Row offset in pixels of the swizzled texture
70/// @param output Pointer to the pixels of the swizzled texture
71/// @param input Pointer to the 2D array of pixels used as input
72/// @pre input and output points to an array large enough to hold the number of bytes used
73void SwizzleSliceToVoxel(u32 line_length_in, u32 line_count, u32 pitch, u32 width, u32 height,
74 u32 bytes_per_pixel, u32 block_height, u32 block_depth, u32 origin_x,
75 u32 origin_y, u8* output, const u8* input);
76
59void SwizzleKepler(u32 width, u32 height, u32 dst_x, u32 dst_y, u32 block_height, 77void SwizzleKepler(u32 width, u32 height, u32 dst_x, u32 dst_y, u32 block_height,
60 std::size_t copy_size, const u8* source_data, u8* swizzle_data); 78 std::size_t copy_size, const u8* source_data, u8* swizzle_data);
61 79