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| author | 2016-06-16 14:47:55 -0400 | |
|---|---|---|
| committer | 2016-06-16 14:47:55 -0400 | |
| commit | 251457b9d5e6c87b6fadf8d45559b56bfdcdec63 (patch) | |
| tree | 9818076efe2b786017aecb9ddcc3ab56c57780ab | |
| parent | Merge pull request #1912 from yuriks/fix-win-deploy (diff) | |
| parent | Make arm_dyncom_trans* into a fully fledged compilation unit (diff) | |
| download | yuzu-251457b9d5e6c87b6fadf8d45559b56bfdcdec63.tar.gz yuzu-251457b9d5e6c87b6fadf8d45559b56bfdcdec63.tar.xz yuzu-251457b9d5e6c87b6fadf8d45559b56bfdcdec63.zip | |
Merge pull request #1898 from archshift/interpreter-split-take2
Refactor arm_dyncom_interpreter into several files (take 2)
Diffstat (limited to '')
| -rw-r--r-- | src/core/CMakeLists.txt | 2 | ||||
| -rw-r--r-- | src/core/arm/dyncom/arm_dyncom_interpreter.cpp | 2719 | ||||
| -rw-r--r-- | src/core/arm/dyncom/arm_dyncom_trans.cpp | 2178 | ||||
| -rw-r--r-- | src/core/arm/dyncom/arm_dyncom_trans.h | 493 | ||||
| -rw-r--r-- | src/core/arm/skyeye_common/vfp/vfpinstr.cpp | 64 |
5 files changed, 2729 insertions, 2727 deletions
diff --git a/src/core/CMakeLists.txt b/src/core/CMakeLists.txt index 7d267fdcf..02d902bb5 100644 --- a/src/core/CMakeLists.txt +++ b/src/core/CMakeLists.txt | |||
| @@ -5,6 +5,7 @@ set(SRCS | |||
| 5 | arm/dyncom/arm_dyncom_dec.cpp | 5 | arm/dyncom/arm_dyncom_dec.cpp |
| 6 | arm/dyncom/arm_dyncom_interpreter.cpp | 6 | arm/dyncom/arm_dyncom_interpreter.cpp |
| 7 | arm/dyncom/arm_dyncom_thumb.cpp | 7 | arm/dyncom/arm_dyncom_thumb.cpp |
| 8 | arm/dyncom/arm_dyncom_trans.cpp | ||
| 8 | arm/skyeye_common/armstate.cpp | 9 | arm/skyeye_common/armstate.cpp |
| 9 | arm/skyeye_common/armsupp.cpp | 10 | arm/skyeye_common/armsupp.cpp |
| 10 | arm/skyeye_common/vfp/vfp.cpp | 11 | arm/skyeye_common/vfp/vfp.cpp |
| @@ -142,6 +143,7 @@ set(HEADERS | |||
| 142 | arm/dyncom/arm_dyncom_interpreter.h | 143 | arm/dyncom/arm_dyncom_interpreter.h |
| 143 | arm/dyncom/arm_dyncom_run.h | 144 | arm/dyncom/arm_dyncom_run.h |
| 144 | arm/dyncom/arm_dyncom_thumb.h | 145 | arm/dyncom/arm_dyncom_thumb.h |
| 146 | arm/dyncom/arm_dyncom_trans.h | ||
| 145 | arm/skyeye_common/arm_regformat.h | 147 | arm/skyeye_common/arm_regformat.h |
| 146 | arm/skyeye_common/armstate.h | 148 | arm/skyeye_common/armstate.h |
| 147 | arm/skyeye_common/armsupp.h | 149 | arm/skyeye_common/armsupp.h |
diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp index cfc67287f..01d5d478e 100644 --- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp +++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp | |||
| @@ -17,6 +17,7 @@ | |||
| 17 | #include "core/arm/dyncom/arm_dyncom_dec.h" | 17 | #include "core/arm/dyncom/arm_dyncom_dec.h" |
| 18 | #include "core/arm/dyncom/arm_dyncom_interpreter.h" | 18 | #include "core/arm/dyncom/arm_dyncom_interpreter.h" |
| 19 | #include "core/arm/dyncom/arm_dyncom_thumb.h" | 19 | #include "core/arm/dyncom/arm_dyncom_thumb.h" |
| 20 | #include "core/arm/dyncom/arm_dyncom_trans.h" | ||
| 20 | #include "core/arm/dyncom/arm_dyncom_run.h" | 21 | #include "core/arm/dyncom/arm_dyncom_run.h" |
| 21 | #include "core/arm/skyeye_common/armstate.h" | 22 | #include "core/arm/skyeye_common/armstate.h" |
| 22 | #include "core/arm/skyeye_common/armsupp.h" | 23 | #include "core/arm/skyeye_common/armsupp.h" |
| @@ -24,18 +25,6 @@ | |||
| 24 | 25 | ||
| 25 | #include "core/gdbstub/gdbstub.h" | 26 | #include "core/gdbstub/gdbstub.h" |
| 26 | 27 | ||
| 27 | enum { | ||
| 28 | COND = (1 << 0), | ||
| 29 | NON_BRANCH = (1 << 1), | ||
| 30 | DIRECT_BRANCH = (1 << 2), | ||
| 31 | INDIRECT_BRANCH = (1 << 3), | ||
| 32 | CALL = (1 << 4), | ||
| 33 | RET = (1 << 5), | ||
| 34 | END_OF_PAGE = (1 << 6), | ||
| 35 | THUMB = (1 << 7), | ||
| 36 | SINGLE_STEP = (1 << 8) | ||
| 37 | }; | ||
| 38 | |||
| 39 | #define RM BITS(sht_oper, 0, 3) | 28 | #define RM BITS(sht_oper, 0, 3) |
| 40 | #define RS BITS(sht_oper, 8, 11) | 29 | #define RS BITS(sht_oper, 8, 11) |
| 41 | 30 | ||
| @@ -46,8 +35,6 @@ enum { | |||
| 46 | #define ROTATE_RIGHT_32(n, i) ROTATE_RIGHT(n, i, 32) | 35 | #define ROTATE_RIGHT_32(n, i) ROTATE_RIGHT(n, i, 32) |
| 47 | #define ROTATE_LEFT_32(n, i) ROTATE_LEFT(n, i, 32) | 36 | #define ROTATE_LEFT_32(n, i) ROTATE_LEFT(n, i, 32) |
| 48 | 37 | ||
| 49 | typedef unsigned int (*shtop_fp_t)(ARMul_State* cpu, unsigned int sht_oper); | ||
| 50 | |||
| 51 | static bool CondPassed(const ARMul_State* cpu, unsigned int cond) { | 38 | static bool CondPassed(const ARMul_State* cpu, unsigned int cond) { |
| 52 | const bool n_flag = cpu->NFlag != 0; | 39 | const bool n_flag = cpu->NFlag != 0; |
| 53 | const bool z_flag = cpu->ZFlag != 0; | 40 | const bool z_flag = cpu->ZFlag != 0; |
| @@ -245,12 +232,6 @@ static unsigned int DPO(RotateRightByRegister)(ARMul_State* cpu, unsigned int sh | |||
| 245 | return shifter_operand; | 232 | return shifter_operand; |
| 246 | } | 233 | } |
| 247 | 234 | ||
| 248 | typedef void (*get_addr_fp_t)(ARMul_State *cpu, unsigned int inst, unsigned int &virt_addr); | ||
| 249 | |||
| 250 | struct ldst_inst { | ||
| 251 | unsigned int inst; | ||
| 252 | get_addr_fp_t get_addr; | ||
| 253 | }; | ||
| 254 | #define DEBUG_MSG LOG_DEBUG(Core_ARM11, "inst is %x", inst); CITRA_IGNORE_EXIT(0) | 235 | #define DEBUG_MSG LOG_DEBUG(Core_ARM11, "inst is %x", inst); CITRA_IGNORE_EXIT(0) |
| 255 | 236 | ||
| 256 | #define LnSWoUB(s) glue(LnSWoUB, s) | 237 | #define LnSWoUB(s) glue(LnSWoUB, s) |
| @@ -668,479 +649,7 @@ static void LnSWoUB(ScaledRegisterOffset)(ARMul_State* cpu, unsigned int inst, u | |||
| 668 | virt_addr = addr; | 649 | virt_addr = addr; |
| 669 | } | 650 | } |
| 670 | 651 | ||
| 671 | struct arm_inst { | 652 | shtop_fp_t GetShifterOp(unsigned int inst) { |
| 672 | unsigned int idx; | ||
| 673 | unsigned int cond; | ||
| 674 | int br; | ||
| 675 | char component[0]; | ||
| 676 | }; | ||
| 677 | |||
| 678 | struct generic_arm_inst { | ||
| 679 | u32 Ra; | ||
| 680 | u32 Rm; | ||
| 681 | u32 Rn; | ||
| 682 | u32 Rd; | ||
| 683 | u8 op1; | ||
| 684 | u8 op2; | ||
| 685 | }; | ||
| 686 | |||
| 687 | struct adc_inst { | ||
| 688 | unsigned int I; | ||
| 689 | unsigned int S; | ||
| 690 | unsigned int Rn; | ||
| 691 | unsigned int Rd; | ||
| 692 | unsigned int shifter_operand; | ||
| 693 | shtop_fp_t shtop_func; | ||
| 694 | }; | ||
| 695 | |||
| 696 | struct add_inst { | ||
| 697 | unsigned int I; | ||
| 698 | unsigned int S; | ||
| 699 | unsigned int Rn; | ||
| 700 | unsigned int Rd; | ||
| 701 | unsigned int shifter_operand; | ||
| 702 | shtop_fp_t shtop_func; | ||
| 703 | }; | ||
| 704 | |||
| 705 | struct orr_inst { | ||
| 706 | unsigned int I; | ||
| 707 | unsigned int S; | ||
| 708 | unsigned int Rn; | ||
| 709 | unsigned int Rd; | ||
| 710 | unsigned int shifter_operand; | ||
| 711 | shtop_fp_t shtop_func; | ||
| 712 | }; | ||
| 713 | |||
| 714 | struct and_inst { | ||
| 715 | unsigned int I; | ||
| 716 | unsigned int S; | ||
| 717 | unsigned int Rn; | ||
| 718 | unsigned int Rd; | ||
| 719 | unsigned int shifter_operand; | ||
| 720 | shtop_fp_t shtop_func; | ||
| 721 | }; | ||
| 722 | |||
| 723 | struct eor_inst { | ||
| 724 | unsigned int I; | ||
| 725 | unsigned int S; | ||
| 726 | unsigned int Rn; | ||
| 727 | unsigned int Rd; | ||
| 728 | unsigned int shifter_operand; | ||
| 729 | shtop_fp_t shtop_func; | ||
| 730 | }; | ||
| 731 | |||
| 732 | struct bbl_inst { | ||
| 733 | unsigned int L; | ||
| 734 | int signed_immed_24; | ||
| 735 | unsigned int next_addr; | ||
| 736 | unsigned int jmp_addr; | ||
| 737 | }; | ||
| 738 | |||
| 739 | struct bx_inst { | ||
| 740 | unsigned int Rm; | ||
| 741 | }; | ||
| 742 | |||
| 743 | struct blx_inst { | ||
| 744 | union { | ||
| 745 | s32 signed_immed_24; | ||
| 746 | u32 Rm; | ||
| 747 | } val; | ||
| 748 | unsigned int inst; | ||
| 749 | }; | ||
| 750 | |||
| 751 | struct clz_inst { | ||
| 752 | unsigned int Rm; | ||
| 753 | unsigned int Rd; | ||
| 754 | }; | ||
| 755 | |||
| 756 | struct cps_inst { | ||
| 757 | unsigned int imod0; | ||
| 758 | unsigned int imod1; | ||
| 759 | unsigned int mmod; | ||
| 760 | unsigned int A, I, F; | ||
| 761 | unsigned int mode; | ||
| 762 | }; | ||
| 763 | |||
| 764 | struct clrex_inst { | ||
| 765 | }; | ||
| 766 | |||
| 767 | struct cpy_inst { | ||
| 768 | unsigned int Rm; | ||
| 769 | unsigned int Rd; | ||
| 770 | }; | ||
| 771 | |||
| 772 | struct bic_inst { | ||
| 773 | unsigned int I; | ||
| 774 | unsigned int S; | ||
| 775 | unsigned int Rn; | ||
| 776 | unsigned int Rd; | ||
| 777 | unsigned int shifter_operand; | ||
| 778 | shtop_fp_t shtop_func; | ||
| 779 | }; | ||
| 780 | |||
| 781 | struct sub_inst { | ||
| 782 | unsigned int I; | ||
| 783 | unsigned int S; | ||
| 784 | unsigned int Rn; | ||
| 785 | unsigned int Rd; | ||
| 786 | unsigned int shifter_operand; | ||
| 787 | shtop_fp_t shtop_func; | ||
| 788 | }; | ||
| 789 | |||
| 790 | struct tst_inst { | ||
| 791 | unsigned int I; | ||
| 792 | unsigned int S; | ||
| 793 | unsigned int Rn; | ||
| 794 | unsigned int Rd; | ||
| 795 | unsigned int shifter_operand; | ||
| 796 | shtop_fp_t shtop_func; | ||
| 797 | }; | ||
| 798 | |||
| 799 | struct cmn_inst { | ||
| 800 | unsigned int I; | ||
| 801 | unsigned int Rn; | ||
| 802 | unsigned int shifter_operand; | ||
| 803 | shtop_fp_t shtop_func; | ||
| 804 | }; | ||
| 805 | |||
| 806 | struct teq_inst { | ||
| 807 | unsigned int I; | ||
| 808 | unsigned int Rn; | ||
| 809 | unsigned int shifter_operand; | ||
| 810 | shtop_fp_t shtop_func; | ||
| 811 | }; | ||
| 812 | |||
| 813 | struct stm_inst { | ||
| 814 | unsigned int inst; | ||
| 815 | }; | ||
| 816 | |||
| 817 | struct bkpt_inst { | ||
| 818 | u32 imm; | ||
| 819 | }; | ||
| 820 | |||
| 821 | struct stc_inst { | ||
| 822 | }; | ||
| 823 | |||
| 824 | struct ldc_inst { | ||
| 825 | }; | ||
| 826 | |||
| 827 | struct swi_inst { | ||
| 828 | unsigned int num; | ||
| 829 | }; | ||
| 830 | |||
| 831 | struct cmp_inst { | ||
| 832 | unsigned int I; | ||
| 833 | unsigned int Rn; | ||
| 834 | unsigned int shifter_operand; | ||
| 835 | shtop_fp_t shtop_func; | ||
| 836 | }; | ||
| 837 | |||
| 838 | struct mov_inst { | ||
| 839 | unsigned int I; | ||
| 840 | unsigned int S; | ||
| 841 | unsigned int Rd; | ||
| 842 | unsigned int shifter_operand; | ||
| 843 | shtop_fp_t shtop_func; | ||
| 844 | }; | ||
| 845 | |||
| 846 | struct mvn_inst { | ||
| 847 | unsigned int I; | ||
| 848 | unsigned int S; | ||
| 849 | unsigned int Rd; | ||
| 850 | unsigned int shifter_operand; | ||
| 851 | shtop_fp_t shtop_func; | ||
| 852 | }; | ||
| 853 | |||
| 854 | struct rev_inst { | ||
| 855 | unsigned int Rd; | ||
| 856 | unsigned int Rm; | ||
| 857 | unsigned int op1; | ||
| 858 | unsigned int op2; | ||
| 859 | }; | ||
| 860 | |||
| 861 | struct rsb_inst { | ||
| 862 | unsigned int I; | ||
| 863 | unsigned int S; | ||
| 864 | unsigned int Rn; | ||
| 865 | unsigned int Rd; | ||
| 866 | unsigned int shifter_operand; | ||
| 867 | shtop_fp_t shtop_func; | ||
| 868 | }; | ||
| 869 | |||
| 870 | struct rsc_inst { | ||
| 871 | unsigned int I; | ||
| 872 | unsigned int S; | ||
| 873 | unsigned int Rn; | ||
| 874 | unsigned int Rd; | ||
| 875 | unsigned int shifter_operand; | ||
| 876 | shtop_fp_t shtop_func; | ||
| 877 | }; | ||
| 878 | |||
| 879 | struct sbc_inst { | ||
| 880 | unsigned int I; | ||
| 881 | unsigned int S; | ||
| 882 | unsigned int Rn; | ||
| 883 | unsigned int Rd; | ||
| 884 | unsigned int shifter_operand; | ||
| 885 | shtop_fp_t shtop_func; | ||
| 886 | }; | ||
| 887 | |||
| 888 | struct mul_inst { | ||
| 889 | unsigned int S; | ||
| 890 | unsigned int Rd; | ||
| 891 | unsigned int Rs; | ||
| 892 | unsigned int Rm; | ||
| 893 | }; | ||
| 894 | |||
| 895 | struct smul_inst { | ||
| 896 | unsigned int Rd; | ||
| 897 | unsigned int Rs; | ||
| 898 | unsigned int Rm; | ||
| 899 | unsigned int x; | ||
| 900 | unsigned int y; | ||
| 901 | }; | ||
| 902 | |||
| 903 | struct umull_inst { | ||
| 904 | unsigned int S; | ||
| 905 | unsigned int RdHi; | ||
| 906 | unsigned int RdLo; | ||
| 907 | unsigned int Rs; | ||
| 908 | unsigned int Rm; | ||
| 909 | }; | ||
| 910 | |||
| 911 | struct smlad_inst { | ||
| 912 | unsigned int m; | ||
| 913 | unsigned int Rm; | ||
| 914 | unsigned int Rd; | ||
| 915 | unsigned int Ra; | ||
| 916 | unsigned int Rn; | ||
| 917 | unsigned int op1; | ||
| 918 | unsigned int op2; | ||
| 919 | }; | ||
| 920 | |||
| 921 | struct smla_inst { | ||
| 922 | unsigned int x; | ||
| 923 | unsigned int y; | ||
| 924 | unsigned int Rm; | ||
| 925 | unsigned int Rd; | ||
| 926 | unsigned int Rs; | ||
| 927 | unsigned int Rn; | ||
| 928 | }; | ||
| 929 | |||
| 930 | struct smlalxy_inst { | ||
| 931 | unsigned int x; | ||
| 932 | unsigned int y; | ||
| 933 | unsigned int RdLo; | ||
| 934 | unsigned int RdHi; | ||
| 935 | unsigned int Rm; | ||
| 936 | unsigned int Rn; | ||
| 937 | }; | ||
| 938 | |||
| 939 | struct ssat_inst { | ||
| 940 | unsigned int Rn; | ||
| 941 | unsigned int Rd; | ||
| 942 | unsigned int imm5; | ||
| 943 | unsigned int sat_imm; | ||
| 944 | unsigned int shift_type; | ||
| 945 | }; | ||
| 946 | |||
| 947 | struct umaal_inst { | ||
| 948 | unsigned int Rn; | ||
| 949 | unsigned int Rm; | ||
| 950 | unsigned int RdHi; | ||
| 951 | unsigned int RdLo; | ||
| 952 | }; | ||
| 953 | |||
| 954 | struct umlal_inst { | ||
| 955 | unsigned int S; | ||
| 956 | unsigned int Rm; | ||
| 957 | unsigned int Rs; | ||
| 958 | unsigned int RdHi; | ||
| 959 | unsigned int RdLo; | ||
| 960 | }; | ||
| 961 | |||
| 962 | struct smlal_inst { | ||
| 963 | unsigned int S; | ||
| 964 | unsigned int Rm; | ||
| 965 | unsigned int Rs; | ||
| 966 | unsigned int RdHi; | ||
| 967 | unsigned int RdLo; | ||
| 968 | }; | ||
| 969 | |||
| 970 | struct smlald_inst { | ||
| 971 | unsigned int RdLo; | ||
| 972 | unsigned int RdHi; | ||
| 973 | unsigned int Rm; | ||
| 974 | unsigned int Rn; | ||
| 975 | unsigned int swap; | ||
| 976 | unsigned int op1; | ||
| 977 | unsigned int op2; | ||
| 978 | }; | ||
| 979 | |||
| 980 | struct mla_inst { | ||
| 981 | unsigned int S; | ||
| 982 | unsigned int Rn; | ||
| 983 | unsigned int Rd; | ||
| 984 | unsigned int Rs; | ||
| 985 | unsigned int Rm; | ||
| 986 | }; | ||
| 987 | |||
| 988 | struct mrc_inst { | ||
| 989 | unsigned int opcode_1; | ||
| 990 | unsigned int opcode_2; | ||
| 991 | unsigned int cp_num; | ||
| 992 | unsigned int crn; | ||
| 993 | unsigned int crm; | ||
| 994 | unsigned int Rd; | ||
| 995 | unsigned int inst; | ||
| 996 | }; | ||
| 997 | |||
| 998 | struct mcr_inst { | ||
| 999 | unsigned int opcode_1; | ||
| 1000 | unsigned int opcode_2; | ||
| 1001 | unsigned int cp_num; | ||
| 1002 | unsigned int crn; | ||
| 1003 | unsigned int crm; | ||
| 1004 | unsigned int Rd; | ||
| 1005 | unsigned int inst; | ||
| 1006 | }; | ||
| 1007 | |||
| 1008 | struct mcrr_inst { | ||
| 1009 | unsigned int opcode_1; | ||
| 1010 | unsigned int cp_num; | ||
| 1011 | unsigned int crm; | ||
| 1012 | unsigned int rt; | ||
| 1013 | unsigned int rt2; | ||
| 1014 | }; | ||
| 1015 | |||
| 1016 | struct mrs_inst { | ||
| 1017 | unsigned int R; | ||
| 1018 | unsigned int Rd; | ||
| 1019 | }; | ||
| 1020 | |||
| 1021 | struct msr_inst { | ||
| 1022 | unsigned int field_mask; | ||
| 1023 | unsigned int R; | ||
| 1024 | unsigned int inst; | ||
| 1025 | }; | ||
| 1026 | |||
| 1027 | struct pld_inst { | ||
| 1028 | }; | ||
| 1029 | |||
| 1030 | struct sxtb_inst { | ||
| 1031 | unsigned int Rd; | ||
| 1032 | unsigned int Rm; | ||
| 1033 | unsigned int rotate; | ||
| 1034 | }; | ||
| 1035 | |||
| 1036 | struct sxtab_inst { | ||
| 1037 | unsigned int Rd; | ||
| 1038 | unsigned int Rn; | ||
| 1039 | unsigned int Rm; | ||
| 1040 | unsigned rotate; | ||
| 1041 | }; | ||
| 1042 | |||
| 1043 | struct sxtah_inst { | ||
| 1044 | unsigned int Rd; | ||
| 1045 | unsigned int Rn; | ||
| 1046 | unsigned int Rm; | ||
| 1047 | unsigned int rotate; | ||
| 1048 | }; | ||
| 1049 | |||
| 1050 | struct sxth_inst { | ||
| 1051 | unsigned int Rd; | ||
| 1052 | unsigned int Rm; | ||
| 1053 | unsigned int rotate; | ||
| 1054 | }; | ||
| 1055 | |||
| 1056 | struct uxtab_inst { | ||
| 1057 | unsigned int Rn; | ||
| 1058 | unsigned int Rd; | ||
| 1059 | unsigned int rotate; | ||
| 1060 | unsigned int Rm; | ||
| 1061 | }; | ||
| 1062 | |||
| 1063 | struct uxtah_inst { | ||
| 1064 | unsigned int Rn; | ||
| 1065 | unsigned int Rd; | ||
| 1066 | unsigned int rotate; | ||
| 1067 | unsigned int Rm; | ||
| 1068 | }; | ||
| 1069 | |||
| 1070 | struct uxth_inst { | ||
| 1071 | unsigned int Rd; | ||
| 1072 | unsigned int Rm; | ||
| 1073 | unsigned int rotate; | ||
| 1074 | }; | ||
| 1075 | |||
| 1076 | struct cdp_inst { | ||
| 1077 | unsigned int opcode_1; | ||
| 1078 | unsigned int CRn; | ||
| 1079 | unsigned int CRd; | ||
| 1080 | unsigned int cp_num; | ||
| 1081 | unsigned int opcode_2; | ||
| 1082 | unsigned int CRm; | ||
| 1083 | unsigned int inst; | ||
| 1084 | }; | ||
| 1085 | |||
| 1086 | struct uxtb_inst { | ||
| 1087 | unsigned int Rd; | ||
| 1088 | unsigned int Rm; | ||
| 1089 | unsigned int rotate; | ||
| 1090 | }; | ||
| 1091 | |||
| 1092 | struct swp_inst { | ||
| 1093 | unsigned int Rn; | ||
| 1094 | unsigned int Rd; | ||
| 1095 | unsigned int Rm; | ||
| 1096 | }; | ||
| 1097 | |||
| 1098 | struct setend_inst { | ||
| 1099 | unsigned int set_bigend; | ||
| 1100 | }; | ||
| 1101 | |||
| 1102 | struct b_2_thumb { | ||
| 1103 | unsigned int imm; | ||
| 1104 | }; | ||
| 1105 | struct b_cond_thumb { | ||
| 1106 | unsigned int imm; | ||
| 1107 | unsigned int cond; | ||
| 1108 | }; | ||
| 1109 | |||
| 1110 | struct bl_1_thumb { | ||
| 1111 | unsigned int imm; | ||
| 1112 | }; | ||
| 1113 | struct bl_2_thumb { | ||
| 1114 | unsigned int imm; | ||
| 1115 | }; | ||
| 1116 | struct blx_1_thumb { | ||
| 1117 | unsigned int imm; | ||
| 1118 | unsigned int instr; | ||
| 1119 | }; | ||
| 1120 | |||
| 1121 | struct pkh_inst { | ||
| 1122 | unsigned int Rm; | ||
| 1123 | unsigned int Rn; | ||
| 1124 | unsigned int Rd; | ||
| 1125 | unsigned char imm; | ||
| 1126 | }; | ||
| 1127 | |||
| 1128 | typedef arm_inst * ARM_INST_PTR; | ||
| 1129 | |||
| 1130 | #define CACHE_BUFFER_SIZE (64 * 1024 * 2000) | ||
| 1131 | static char inst_buf[CACHE_BUFFER_SIZE]; | ||
| 1132 | static int top = 0; | ||
| 1133 | static inline void *AllocBuffer(unsigned int size) { | ||
| 1134 | int start = top; | ||
| 1135 | top += size; | ||
| 1136 | if (top > CACHE_BUFFER_SIZE) { | ||
| 1137 | LOG_ERROR(Core_ARM11, "inst_buf is full"); | ||
| 1138 | CITRA_IGNORE_EXIT(-1); | ||
| 1139 | } | ||
| 1140 | return (void *)&inst_buf[start]; | ||
| 1141 | } | ||
| 1142 | |||
| 1143 | static shtop_fp_t get_shtop(unsigned int inst) { | ||
| 1144 | if (BIT(inst, 25)) { | 653 | if (BIT(inst, 25)) { |
| 1145 | return DPO(Immediate); | 654 | return DPO(Immediate); |
| 1146 | } else if (BITS(inst, 4, 11) == 0) { | 655 | } else if (BITS(inst, 4, 11) == 0) { |
| @@ -1165,7 +674,7 @@ static shtop_fp_t get_shtop(unsigned int inst) { | |||
| 1165 | return nullptr; | 674 | return nullptr; |
| 1166 | } | 675 | } |
| 1167 | 676 | ||
| 1168 | static get_addr_fp_t get_calc_addr_op(unsigned int inst) { | 677 | get_addr_fp_t GetAddressingOp(unsigned int inst) { |
| 1169 | if (BITS(inst, 24, 27) == 5 && BIT(inst, 21) == 0) { | 678 | if (BITS(inst, 24, 27) == 5 && BIT(inst, 21) == 0) { |
| 1170 | return LnSWoUB(ImmediateOffset); | 679 | return LnSWoUB(ImmediateOffset); |
| 1171 | } else if (BITS(inst, 24, 27) == 7 && BIT(inst, 21) == 0 && BITS(inst, 4, 11) == 0) { | 680 | } else if (BITS(inst, 24, 27) == 7 && BIT(inst, 21) == 0 && BITS(inst, 4, 11) == 0) { |
| @@ -1208,2201 +717,21 @@ static get_addr_fp_t get_calc_addr_op(unsigned int inst) { | |||
| 1208 | return nullptr; | 717 | return nullptr; |
| 1209 | } | 718 | } |
| 1210 | 719 | ||
| 1211 | #define INTERPRETER_TRANSLATE(s) glue(InterpreterTranslate_, s) | 720 | // Specialized for LDRT, LDRBT, STRT, and STRBT, which have specific addressing mode requirements |
| 1212 | 721 | get_addr_fp_t GetAddressingOpLoadStoreT(unsigned int inst) { | |
| 1213 | static ARM_INST_PTR INTERPRETER_TRANSLATE(adc)(unsigned int inst, int index) | ||
| 1214 | { | ||
| 1215 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(adc_inst)); | ||
| 1216 | adc_inst *inst_cream = (adc_inst *)inst_base->component; | ||
| 1217 | |||
| 1218 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1219 | inst_base->idx = index; | ||
| 1220 | inst_base->br = NON_BRANCH; | ||
| 1221 | |||
| 1222 | inst_cream->I = BIT(inst, 25); | ||
| 1223 | inst_cream->S = BIT(inst, 20); | ||
| 1224 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 1225 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 1226 | inst_cream->shifter_operand = BITS(inst, 0, 11); | ||
| 1227 | inst_cream->shtop_func = get_shtop(inst); | ||
| 1228 | |||
| 1229 | if (inst_cream->Rd == 15) | ||
| 1230 | inst_base->br = INDIRECT_BRANCH; | ||
| 1231 | |||
| 1232 | return inst_base; | ||
| 1233 | } | ||
| 1234 | static ARM_INST_PTR INTERPRETER_TRANSLATE(add)(unsigned int inst, int index) | ||
| 1235 | { | ||
| 1236 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(add_inst)); | ||
| 1237 | add_inst *inst_cream = (add_inst *)inst_base->component; | ||
| 1238 | |||
| 1239 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1240 | inst_base->idx = index; | ||
| 1241 | inst_base->br = NON_BRANCH; | ||
| 1242 | |||
| 1243 | inst_cream->I = BIT(inst, 25); | ||
| 1244 | inst_cream->S = BIT(inst, 20); | ||
| 1245 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 1246 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 1247 | inst_cream->shifter_operand = BITS(inst, 0, 11); | ||
| 1248 | inst_cream->shtop_func = get_shtop(inst); | ||
| 1249 | |||
| 1250 | if (inst_cream->Rd == 15) | ||
| 1251 | inst_base->br = INDIRECT_BRANCH; | ||
| 1252 | |||
| 1253 | return inst_base; | ||
| 1254 | } | ||
| 1255 | static ARM_INST_PTR INTERPRETER_TRANSLATE(and)(unsigned int inst, int index) | ||
| 1256 | { | ||
| 1257 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(and_inst)); | ||
| 1258 | and_inst *inst_cream = (and_inst *)inst_base->component; | ||
| 1259 | |||
| 1260 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1261 | inst_base->idx = index; | ||
| 1262 | inst_base->br = NON_BRANCH; | ||
| 1263 | |||
| 1264 | inst_cream->I = BIT(inst, 25); | ||
| 1265 | inst_cream->S = BIT(inst, 20); | ||
| 1266 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 1267 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 1268 | inst_cream->shifter_operand = BITS(inst, 0, 11); | ||
| 1269 | inst_cream->shtop_func = get_shtop(inst); | ||
| 1270 | |||
| 1271 | if (inst_cream->Rd == 15) | ||
| 1272 | inst_base->br = INDIRECT_BRANCH; | ||
| 1273 | |||
| 1274 | return inst_base; | ||
| 1275 | } | ||
| 1276 | static ARM_INST_PTR INTERPRETER_TRANSLATE(bbl)(unsigned int inst, int index) | ||
| 1277 | { | ||
| 1278 | #define POSBRANCH ((inst & 0x7fffff) << 2) | ||
| 1279 | #define NEGBRANCH ((0xff000000 |(inst & 0xffffff)) << 2) | ||
| 1280 | |||
| 1281 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(bbl_inst)); | ||
| 1282 | bbl_inst *inst_cream = (bbl_inst *)inst_base->component; | ||
| 1283 | |||
| 1284 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1285 | inst_base->idx = index; | ||
| 1286 | inst_base->br = DIRECT_BRANCH; | ||
| 1287 | |||
| 1288 | if (BIT(inst, 24)) | ||
| 1289 | inst_base->br = CALL; | ||
| 1290 | if (BITS(inst, 28, 31) <= 0xe) | ||
| 1291 | inst_base->br |= COND; | ||
| 1292 | |||
| 1293 | inst_cream->L = BIT(inst, 24); | ||
| 1294 | inst_cream->signed_immed_24 = BIT(inst, 23) ? NEGBRANCH : POSBRANCH; | ||
| 1295 | |||
| 1296 | return inst_base; | ||
| 1297 | } | ||
| 1298 | static ARM_INST_PTR INTERPRETER_TRANSLATE(bic)(unsigned int inst, int index) | ||
| 1299 | { | ||
| 1300 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(bic_inst)); | ||
| 1301 | bic_inst *inst_cream = (bic_inst *)inst_base->component; | ||
| 1302 | |||
| 1303 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1304 | inst_base->idx = index; | ||
| 1305 | inst_base->br = NON_BRANCH; | ||
| 1306 | |||
| 1307 | inst_cream->I = BIT(inst, 25); | ||
| 1308 | inst_cream->S = BIT(inst, 20); | ||
| 1309 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 1310 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 1311 | inst_cream->shifter_operand = BITS(inst, 0, 11); | ||
| 1312 | inst_cream->shtop_func = get_shtop(inst); | ||
| 1313 | |||
| 1314 | if (inst_cream->Rd == 15) | ||
| 1315 | inst_base->br = INDIRECT_BRANCH; | ||
| 1316 | return inst_base; | ||
| 1317 | } | ||
| 1318 | |||
| 1319 | static ARM_INST_PTR INTERPRETER_TRANSLATE(bkpt)(unsigned int inst, int index) | ||
| 1320 | { | ||
| 1321 | arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(bkpt_inst)); | ||
| 1322 | bkpt_inst* const inst_cream = (bkpt_inst*)inst_base->component; | ||
| 1323 | |||
| 1324 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1325 | inst_base->idx = index; | ||
| 1326 | inst_base->br = NON_BRANCH; | ||
| 1327 | |||
| 1328 | inst_cream->imm = (BITS(inst, 8, 19) << 4) | BITS(inst, 0, 3); | ||
| 1329 | |||
| 1330 | return inst_base; | ||
| 1331 | } | ||
| 1332 | |||
| 1333 | static ARM_INST_PTR INTERPRETER_TRANSLATE(blx)(unsigned int inst, int index) | ||
| 1334 | { | ||
| 1335 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(blx_inst)); | ||
| 1336 | blx_inst *inst_cream = (blx_inst *)inst_base->component; | ||
| 1337 | |||
| 1338 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1339 | inst_base->idx = index; | ||
| 1340 | inst_base->br = INDIRECT_BRANCH; | ||
| 1341 | |||
| 1342 | inst_cream->inst = inst; | ||
| 1343 | if (BITS(inst, 20, 27) == 0x12 && BITS(inst, 4, 7) == 0x3) { | ||
| 1344 | inst_cream->val.Rm = BITS(inst, 0, 3); | ||
| 1345 | } else { | ||
| 1346 | inst_cream->val.signed_immed_24 = BITS(inst, 0, 23); | ||
| 1347 | } | ||
| 1348 | |||
| 1349 | return inst_base; | ||
| 1350 | } | ||
| 1351 | static ARM_INST_PTR INTERPRETER_TRANSLATE(bx)(unsigned int inst, int index) | ||
| 1352 | { | ||
| 1353 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(bx_inst)); | ||
| 1354 | bx_inst *inst_cream = (bx_inst *)inst_base->component; | ||
| 1355 | |||
| 1356 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1357 | inst_base->idx = index; | ||
| 1358 | inst_base->br = INDIRECT_BRANCH; | ||
| 1359 | |||
| 1360 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 1361 | |||
| 1362 | return inst_base; | ||
| 1363 | } | ||
| 1364 | static ARM_INST_PTR INTERPRETER_TRANSLATE(bxj)(unsigned int inst, int index) | ||
| 1365 | { | ||
| 1366 | return INTERPRETER_TRANSLATE(bx)(inst, index); | ||
| 1367 | } | ||
| 1368 | |||
| 1369 | static ARM_INST_PTR INTERPRETER_TRANSLATE(cdp)(unsigned int inst, int index) { | ||
| 1370 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(cdp_inst)); | ||
| 1371 | cdp_inst *inst_cream = (cdp_inst *)inst_base->component; | ||
| 1372 | |||
| 1373 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1374 | inst_base->idx = index; | ||
| 1375 | inst_base->br = NON_BRANCH; | ||
| 1376 | |||
| 1377 | inst_cream->CRm = BITS(inst, 0, 3); | ||
| 1378 | inst_cream->CRd = BITS(inst, 12, 15); | ||
| 1379 | inst_cream->CRn = BITS(inst, 16, 19); | ||
| 1380 | inst_cream->cp_num = BITS(inst, 8, 11); | ||
| 1381 | inst_cream->opcode_2 = BITS(inst, 5, 7); | ||
| 1382 | inst_cream->opcode_1 = BITS(inst, 20, 23); | ||
| 1383 | inst_cream->inst = inst; | ||
| 1384 | |||
| 1385 | LOG_TRACE(Core_ARM11, "inst %x index %x", inst, index); | ||
| 1386 | return inst_base; | ||
| 1387 | } | ||
| 1388 | static ARM_INST_PTR INTERPRETER_TRANSLATE(clrex)(unsigned int inst, int index) | ||
| 1389 | { | ||
| 1390 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(clrex_inst)); | ||
| 1391 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1392 | inst_base->idx = index; | ||
| 1393 | inst_base->br = NON_BRANCH; | ||
| 1394 | |||
| 1395 | return inst_base; | ||
| 1396 | } | ||
| 1397 | static ARM_INST_PTR INTERPRETER_TRANSLATE(clz)(unsigned int inst, int index) | ||
| 1398 | { | ||
| 1399 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(clz_inst)); | ||
| 1400 | clz_inst *inst_cream = (clz_inst *)inst_base->component; | ||
| 1401 | |||
| 1402 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1403 | inst_base->idx = index; | ||
| 1404 | inst_base->br = NON_BRANCH; | ||
| 1405 | |||
| 1406 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 1407 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 1408 | |||
| 1409 | return inst_base; | ||
| 1410 | } | ||
| 1411 | static ARM_INST_PTR INTERPRETER_TRANSLATE(cmn)(unsigned int inst, int index) | ||
| 1412 | { | ||
| 1413 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(cmn_inst)); | ||
| 1414 | cmn_inst *inst_cream = (cmn_inst *)inst_base->component; | ||
| 1415 | |||
| 1416 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1417 | inst_base->idx = index; | ||
| 1418 | inst_base->br = NON_BRANCH; | ||
| 1419 | |||
| 1420 | inst_cream->I = BIT(inst, 25); | ||
| 1421 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 1422 | inst_cream->shifter_operand = BITS(inst, 0, 11); | ||
| 1423 | inst_cream->shtop_func = get_shtop(inst); | ||
| 1424 | |||
| 1425 | return inst_base; | ||
| 1426 | } | ||
| 1427 | static ARM_INST_PTR INTERPRETER_TRANSLATE(cmp)(unsigned int inst, int index) | ||
| 1428 | { | ||
| 1429 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(cmp_inst)); | ||
| 1430 | cmp_inst *inst_cream = (cmp_inst *)inst_base->component; | ||
| 1431 | |||
| 1432 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1433 | inst_base->idx = index; | ||
| 1434 | inst_base->br = NON_BRANCH; | ||
| 1435 | |||
| 1436 | inst_cream->I = BIT(inst, 25); | ||
| 1437 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 1438 | inst_cream->shifter_operand = BITS(inst, 0, 11); | ||
| 1439 | inst_cream->shtop_func = get_shtop(inst); | ||
| 1440 | |||
| 1441 | return inst_base; | ||
| 1442 | } | ||
| 1443 | static ARM_INST_PTR INTERPRETER_TRANSLATE(cps)(unsigned int inst, int index) | ||
| 1444 | { | ||
| 1445 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(cps_inst)); | ||
| 1446 | cps_inst *inst_cream = (cps_inst *)inst_base->component; | ||
| 1447 | |||
| 1448 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1449 | inst_base->idx = index; | ||
| 1450 | inst_base->br = NON_BRANCH; | ||
| 1451 | |||
| 1452 | inst_cream->imod0 = BIT(inst, 18); | ||
| 1453 | inst_cream->imod1 = BIT(inst, 19); | ||
| 1454 | inst_cream->mmod = BIT(inst, 17); | ||
| 1455 | inst_cream->A = BIT(inst, 8); | ||
| 1456 | inst_cream->I = BIT(inst, 7); | ||
| 1457 | inst_cream->F = BIT(inst, 6); | ||
| 1458 | inst_cream->mode = BITS(inst, 0, 4); | ||
| 1459 | |||
| 1460 | return inst_base; | ||
| 1461 | } | ||
| 1462 | static ARM_INST_PTR INTERPRETER_TRANSLATE(cpy)(unsigned int inst, int index) | ||
| 1463 | { | ||
| 1464 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(mov_inst)); | ||
| 1465 | mov_inst *inst_cream = (mov_inst *)inst_base->component; | ||
| 1466 | |||
| 1467 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1468 | inst_base->idx = index; | ||
| 1469 | inst_base->br = NON_BRANCH; | ||
| 1470 | |||
| 1471 | inst_cream->I = BIT(inst, 25); | ||
| 1472 | inst_cream->S = BIT(inst, 20); | ||
| 1473 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 1474 | inst_cream->shifter_operand = BITS(inst, 0, 11); | ||
| 1475 | inst_cream->shtop_func = get_shtop(inst); | ||
| 1476 | |||
| 1477 | if (inst_cream->Rd == 15) { | ||
| 1478 | inst_base->br = INDIRECT_BRANCH; | ||
| 1479 | } | ||
| 1480 | return inst_base; | ||
| 1481 | } | ||
| 1482 | static ARM_INST_PTR INTERPRETER_TRANSLATE(eor)(unsigned int inst, int index) | ||
| 1483 | { | ||
| 1484 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(eor_inst)); | ||
| 1485 | eor_inst *inst_cream = (eor_inst *)inst_base->component; | ||
| 1486 | |||
| 1487 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1488 | inst_base->idx = index; | ||
| 1489 | inst_base->br = NON_BRANCH; | ||
| 1490 | |||
| 1491 | inst_cream->I = BIT(inst, 25); | ||
| 1492 | inst_cream->S = BIT(inst, 20); | ||
| 1493 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 1494 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 1495 | inst_cream->shifter_operand = BITS(inst, 0, 11); | ||
| 1496 | inst_cream->shtop_func = get_shtop(inst); | ||
| 1497 | |||
| 1498 | if (inst_cream->Rd == 15) | ||
| 1499 | inst_base->br = INDIRECT_BRANCH; | ||
| 1500 | |||
| 1501 | return inst_base; | ||
| 1502 | } | ||
| 1503 | static ARM_INST_PTR INTERPRETER_TRANSLATE(ldc)(unsigned int inst, int index) | ||
| 1504 | { | ||
| 1505 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldc_inst)); | ||
| 1506 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1507 | inst_base->idx = index; | ||
| 1508 | inst_base->br = NON_BRANCH; | ||
| 1509 | |||
| 1510 | return inst_base; | ||
| 1511 | } | ||
| 1512 | static ARM_INST_PTR INTERPRETER_TRANSLATE(ldm)(unsigned int inst, int index) | ||
| 1513 | { | ||
| 1514 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); | ||
| 1515 | ldst_inst *inst_cream = (ldst_inst *)inst_base->component; | ||
| 1516 | |||
| 1517 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1518 | inst_base->idx = index; | ||
| 1519 | inst_base->br = NON_BRANCH; | ||
| 1520 | |||
| 1521 | inst_cream->inst = inst; | ||
| 1522 | inst_cream->get_addr = get_calc_addr_op(inst); | ||
| 1523 | |||
| 1524 | if (BIT(inst, 15)) { | ||
| 1525 | inst_base->br = INDIRECT_BRANCH; | ||
| 1526 | } | ||
| 1527 | return inst_base; | ||
| 1528 | } | ||
| 1529 | static ARM_INST_PTR INTERPRETER_TRANSLATE(sxth)(unsigned int inst, int index) | ||
| 1530 | { | ||
| 1531 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(sxtb_inst)); | ||
| 1532 | sxtb_inst *inst_cream = (sxtb_inst *)inst_base->component; | ||
| 1533 | |||
| 1534 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1535 | inst_base->idx = index; | ||
| 1536 | inst_base->br = NON_BRANCH; | ||
| 1537 | |||
| 1538 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 1539 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 1540 | inst_cream->rotate = BITS(inst, 10, 11); | ||
| 1541 | |||
| 1542 | return inst_base; | ||
| 1543 | } | ||
| 1544 | static ARM_INST_PTR INTERPRETER_TRANSLATE(ldr)(unsigned int inst, int index) | ||
| 1545 | { | ||
| 1546 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); | ||
| 1547 | ldst_inst *inst_cream = (ldst_inst *)inst_base->component; | ||
| 1548 | |||
| 1549 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1550 | inst_base->idx = index; | ||
| 1551 | inst_base->br = NON_BRANCH; | ||
| 1552 | |||
| 1553 | inst_cream->inst = inst; | ||
| 1554 | inst_cream->get_addr = get_calc_addr_op(inst); | ||
| 1555 | |||
| 1556 | if (BITS(inst, 12, 15) == 15) | ||
| 1557 | inst_base->br = INDIRECT_BRANCH; | ||
| 1558 | |||
| 1559 | return inst_base; | ||
| 1560 | } | ||
| 1561 | |||
| 1562 | static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrcond)(unsigned int inst, int index) | ||
| 1563 | { | ||
| 1564 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); | ||
| 1565 | ldst_inst *inst_cream = (ldst_inst *)inst_base->component; | ||
| 1566 | |||
| 1567 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1568 | inst_base->idx = index; | ||
| 1569 | inst_base->br = NON_BRANCH; | ||
| 1570 | |||
| 1571 | inst_cream->inst = inst; | ||
| 1572 | inst_cream->get_addr = get_calc_addr_op(inst); | ||
| 1573 | |||
| 1574 | if (BITS(inst, 12, 15) == 15) | ||
| 1575 | inst_base->br = INDIRECT_BRANCH; | ||
| 1576 | |||
| 1577 | return inst_base; | ||
| 1578 | } | ||
| 1579 | |||
| 1580 | static ARM_INST_PTR INTERPRETER_TRANSLATE(uxth)(unsigned int inst, int index) | ||
| 1581 | { | ||
| 1582 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(uxth_inst)); | ||
| 1583 | uxth_inst *inst_cream = (uxth_inst *)inst_base->component; | ||
| 1584 | |||
| 1585 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1586 | inst_base->idx = index; | ||
| 1587 | inst_base->br = NON_BRANCH; | ||
| 1588 | |||
| 1589 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 1590 | inst_cream->rotate = BITS(inst, 10, 11); | ||
| 1591 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 1592 | |||
| 1593 | return inst_base; | ||
| 1594 | } | ||
| 1595 | static ARM_INST_PTR INTERPRETER_TRANSLATE(uxtah)(unsigned int inst, int index) | ||
| 1596 | { | ||
| 1597 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(uxtah_inst)); | ||
| 1598 | uxtah_inst *inst_cream = (uxtah_inst *)inst_base->component; | ||
| 1599 | |||
| 1600 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1601 | inst_base->idx = index; | ||
| 1602 | inst_base->br = NON_BRANCH; | ||
| 1603 | |||
| 1604 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 1605 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 1606 | inst_cream->rotate = BITS(inst, 10, 11); | ||
| 1607 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 1608 | |||
| 1609 | return inst_base; | ||
| 1610 | } | ||
| 1611 | static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrb)(unsigned int inst, int index) | ||
| 1612 | { | ||
| 1613 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); | ||
| 1614 | ldst_inst *inst_cream = (ldst_inst *)inst_base->component; | ||
| 1615 | |||
| 1616 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1617 | inst_base->idx = index; | ||
| 1618 | inst_base->br = NON_BRANCH; | ||
| 1619 | |||
| 1620 | inst_cream->inst = inst; | ||
| 1621 | inst_cream->get_addr = get_calc_addr_op(inst); | ||
| 1622 | |||
| 1623 | return inst_base; | ||
| 1624 | } | ||
| 1625 | static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrbt)(unsigned int inst, int index) | ||
| 1626 | { | ||
| 1627 | arm_inst* inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); | ||
| 1628 | ldst_inst* inst_cream = (ldst_inst*)inst_base->component; | ||
| 1629 | |||
| 1630 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1631 | inst_base->idx = index; | ||
| 1632 | inst_base->br = NON_BRANCH; | ||
| 1633 | |||
| 1634 | inst_cream->inst = inst; | ||
| 1635 | if (BITS(inst, 25, 27) == 2) { | ||
| 1636 | inst_cream->get_addr = LnSWoUB(ImmediatePostIndexed); | ||
| 1637 | } else if (BITS(inst, 25, 27) == 3) { | ||
| 1638 | inst_cream->get_addr = LnSWoUB(ScaledRegisterPostIndexed); | ||
| 1639 | } else { | ||
| 1640 | DEBUG_MSG; | ||
| 1641 | } | ||
| 1642 | |||
| 1643 | return inst_base; | ||
| 1644 | } | ||
| 1645 | static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrd)(unsigned int inst, int index) | ||
| 1646 | { | ||
| 1647 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); | ||
| 1648 | ldst_inst *inst_cream = (ldst_inst *)inst_base->component; | ||
| 1649 | |||
| 1650 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1651 | inst_base->idx = index; | ||
| 1652 | inst_base->br = NON_BRANCH; | ||
| 1653 | |||
| 1654 | inst_cream->inst = inst; | ||
| 1655 | inst_cream->get_addr = get_calc_addr_op(inst); | ||
| 1656 | |||
| 1657 | return inst_base; | ||
| 1658 | } | ||
| 1659 | static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrex)(unsigned int inst, int index) | ||
| 1660 | { | ||
| 1661 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst)); | ||
| 1662 | generic_arm_inst *inst_cream = (generic_arm_inst *)inst_base->component; | ||
| 1663 | |||
| 1664 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1665 | inst_base->idx = index; | ||
| 1666 | inst_base->br = (BITS(inst, 12, 15) == 15) ? INDIRECT_BRANCH : NON_BRANCH; // Branch if dest is R15 | ||
| 1667 | |||
| 1668 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 1669 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 1670 | |||
| 1671 | return inst_base; | ||
| 1672 | } | ||
| 1673 | static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrexb)(unsigned int inst, int index) | ||
| 1674 | { | ||
| 1675 | return INTERPRETER_TRANSLATE(ldrex)(inst, index); | ||
| 1676 | } | ||
| 1677 | static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrexh)(unsigned int inst, int index) | ||
| 1678 | { | ||
| 1679 | return INTERPRETER_TRANSLATE(ldrex)(inst, index); | ||
| 1680 | } | ||
| 1681 | static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrexd)(unsigned int inst, int index) | ||
| 1682 | { | ||
| 1683 | return INTERPRETER_TRANSLATE(ldrex)(inst, index); | ||
| 1684 | } | ||
| 1685 | static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrh)(unsigned int inst, int index) | ||
| 1686 | { | ||
| 1687 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); | ||
| 1688 | ldst_inst *inst_cream = (ldst_inst *)inst_base->component; | ||
| 1689 | |||
| 1690 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1691 | inst_base->idx = index; | ||
| 1692 | inst_base->br = NON_BRANCH; | ||
| 1693 | |||
| 1694 | inst_cream->inst = inst; | ||
| 1695 | inst_cream->get_addr = get_calc_addr_op(inst); | ||
| 1696 | |||
| 1697 | return inst_base; | ||
| 1698 | } | ||
| 1699 | static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrsb)(unsigned int inst, int index) | ||
| 1700 | { | ||
| 1701 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); | ||
| 1702 | ldst_inst *inst_cream = (ldst_inst *)inst_base->component; | ||
| 1703 | |||
| 1704 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1705 | inst_base->idx = index; | ||
| 1706 | inst_base->br = NON_BRANCH; | ||
| 1707 | |||
| 1708 | inst_cream->inst = inst; | ||
| 1709 | inst_cream->get_addr = get_calc_addr_op(inst); | ||
| 1710 | |||
| 1711 | return inst_base; | ||
| 1712 | } | ||
| 1713 | static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrsh)(unsigned int inst, int index) | ||
| 1714 | { | ||
| 1715 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); | ||
| 1716 | ldst_inst *inst_cream = (ldst_inst *)inst_base->component; | ||
| 1717 | |||
| 1718 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1719 | inst_base->idx = index; | ||
| 1720 | inst_base->br = NON_BRANCH; | ||
| 1721 | |||
| 1722 | inst_cream->inst = inst; | ||
| 1723 | inst_cream->get_addr = get_calc_addr_op(inst); | ||
| 1724 | |||
| 1725 | return inst_base; | ||
| 1726 | } | ||
| 1727 | static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrt)(unsigned int inst, int index) | ||
| 1728 | { | ||
| 1729 | arm_inst* inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); | ||
| 1730 | ldst_inst* inst_cream = (ldst_inst*)inst_base->component; | ||
| 1731 | |||
| 1732 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1733 | inst_base->idx = index; | ||
| 1734 | inst_base->br = NON_BRANCH; | ||
| 1735 | |||
| 1736 | inst_cream->inst = inst; | ||
| 1737 | if (BITS(inst, 25, 27) == 2) { | 722 | if (BITS(inst, 25, 27) == 2) { |
| 1738 | inst_cream->get_addr = LnSWoUB(ImmediatePostIndexed); | 723 | return LnSWoUB(ImmediatePostIndexed); |
| 1739 | } else if (BITS(inst, 25, 27) == 3) { | ||
| 1740 | inst_cream->get_addr = LnSWoUB(ScaledRegisterPostIndexed); | ||
| 1741 | } else { | ||
| 1742 | // Reaching this would indicate the thumb version | ||
| 1743 | // of this instruction, however the 3DS CPU doesn't | ||
| 1744 | // support this variant (the 3DS CPU is only ARMv6K, | ||
| 1745 | // while this variant is added in ARMv6T2). | ||
| 1746 | // So it's sufficient for citra to not implement this. | ||
| 1747 | DEBUG_MSG; | ||
| 1748 | } | ||
| 1749 | |||
| 1750 | if (BITS(inst, 12, 15) == 15) { | ||
| 1751 | inst_base->br = INDIRECT_BRANCH; | ||
| 1752 | } | ||
| 1753 | return inst_base; | ||
| 1754 | } | ||
| 1755 | static ARM_INST_PTR INTERPRETER_TRANSLATE(mcr)(unsigned int inst, int index) | ||
| 1756 | { | ||
| 1757 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(mcr_inst)); | ||
| 1758 | mcr_inst *inst_cream = (mcr_inst *)inst_base->component; | ||
| 1759 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1760 | inst_base->idx = index; | ||
| 1761 | inst_base->br = NON_BRANCH; | ||
| 1762 | |||
| 1763 | inst_cream->crn = BITS(inst, 16, 19); | ||
| 1764 | inst_cream->crm = BITS(inst, 0, 3); | ||
| 1765 | inst_cream->opcode_1 = BITS(inst, 21, 23); | ||
| 1766 | inst_cream->opcode_2 = BITS(inst, 5, 7); | ||
| 1767 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 1768 | inst_cream->cp_num = BITS(inst, 8, 11); | ||
| 1769 | inst_cream->inst = inst; | ||
| 1770 | return inst_base; | ||
| 1771 | } | ||
| 1772 | |||
| 1773 | static ARM_INST_PTR INTERPRETER_TRANSLATE(mcrr)(unsigned int inst, int index) | ||
| 1774 | { | ||
| 1775 | arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(mcrr_inst)); | ||
| 1776 | mcrr_inst* const inst_cream = (mcrr_inst*)inst_base->component; | ||
| 1777 | |||
| 1778 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1779 | inst_base->idx = index; | ||
| 1780 | inst_base->br = NON_BRANCH; | ||
| 1781 | |||
| 1782 | inst_cream->crm = BITS(inst, 0, 3); | ||
| 1783 | inst_cream->opcode_1 = BITS(inst, 4, 7); | ||
| 1784 | inst_cream->cp_num = BITS(inst, 8, 11); | ||
| 1785 | inst_cream->rt = BITS(inst, 12, 15); | ||
| 1786 | inst_cream->rt2 = BITS(inst, 16, 19); | ||
| 1787 | |||
| 1788 | return inst_base; | ||
| 1789 | } | ||
| 1790 | |||
| 1791 | static ARM_INST_PTR INTERPRETER_TRANSLATE(mla)(unsigned int inst, int index) | ||
| 1792 | { | ||
| 1793 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(mla_inst)); | ||
| 1794 | mla_inst *inst_cream = (mla_inst *)inst_base->component; | ||
| 1795 | |||
| 1796 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1797 | inst_base->idx = index; | ||
| 1798 | inst_base->br = NON_BRANCH; | ||
| 1799 | |||
| 1800 | inst_cream->S = BIT(inst, 20); | ||
| 1801 | inst_cream->Rn = BITS(inst, 12, 15); | ||
| 1802 | inst_cream->Rd = BITS(inst, 16, 19); | ||
| 1803 | inst_cream->Rs = BITS(inst, 8, 11); | ||
| 1804 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 1805 | |||
| 1806 | return inst_base; | ||
| 1807 | } | ||
| 1808 | static ARM_INST_PTR INTERPRETER_TRANSLATE(mov)(unsigned int inst, int index) | ||
| 1809 | { | ||
| 1810 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(mov_inst)); | ||
| 1811 | mov_inst *inst_cream = (mov_inst *)inst_base->component; | ||
| 1812 | |||
| 1813 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1814 | inst_base->idx = index; | ||
| 1815 | inst_base->br = NON_BRANCH; | ||
| 1816 | |||
| 1817 | inst_cream->I = BIT(inst, 25); | ||
| 1818 | inst_cream->S = BIT(inst, 20); | ||
| 1819 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 1820 | inst_cream->shifter_operand = BITS(inst, 0, 11); | ||
| 1821 | inst_cream->shtop_func = get_shtop(inst); | ||
| 1822 | |||
| 1823 | if (inst_cream->Rd == 15) { | ||
| 1824 | inst_base->br = INDIRECT_BRANCH; | ||
| 1825 | } | ||
| 1826 | return inst_base; | ||
| 1827 | } | ||
| 1828 | static ARM_INST_PTR INTERPRETER_TRANSLATE(mrc)(unsigned int inst, int index) | ||
| 1829 | { | ||
| 1830 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(mrc_inst)); | ||
| 1831 | mrc_inst *inst_cream = (mrc_inst *)inst_base->component; | ||
| 1832 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1833 | inst_base->idx = index; | ||
| 1834 | inst_base->br = NON_BRANCH; | ||
| 1835 | |||
| 1836 | inst_cream->crn = BITS(inst, 16, 19); | ||
| 1837 | inst_cream->crm = BITS(inst, 0, 3); | ||
| 1838 | inst_cream->opcode_1 = BITS(inst, 21, 23); | ||
| 1839 | inst_cream->opcode_2 = BITS(inst, 5, 7); | ||
| 1840 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 1841 | inst_cream->cp_num = BITS(inst, 8, 11); | ||
| 1842 | inst_cream->inst = inst; | ||
| 1843 | return inst_base; | ||
| 1844 | } | ||
| 1845 | |||
| 1846 | static ARM_INST_PTR INTERPRETER_TRANSLATE(mrrc)(unsigned int inst, int index) | ||
| 1847 | { | ||
| 1848 | return INTERPRETER_TRANSLATE(mcrr)(inst, index); | ||
| 1849 | } | ||
| 1850 | |||
| 1851 | static ARM_INST_PTR INTERPRETER_TRANSLATE(mrs)(unsigned int inst, int index) | ||
| 1852 | { | ||
| 1853 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(mrs_inst)); | ||
| 1854 | mrs_inst *inst_cream = (mrs_inst *)inst_base->component; | ||
| 1855 | |||
| 1856 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1857 | inst_base->idx = index; | ||
| 1858 | inst_base->br = NON_BRANCH; | ||
| 1859 | |||
| 1860 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 1861 | inst_cream->R = BIT(inst, 22); | ||
| 1862 | |||
| 1863 | return inst_base; | ||
| 1864 | } | ||
| 1865 | static ARM_INST_PTR INTERPRETER_TRANSLATE(msr)(unsigned int inst, int index) | ||
| 1866 | { | ||
| 1867 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(msr_inst)); | ||
| 1868 | msr_inst *inst_cream = (msr_inst *)inst_base->component; | ||
| 1869 | |||
| 1870 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1871 | inst_base->idx = index; | ||
| 1872 | inst_base->br = NON_BRANCH; | ||
| 1873 | |||
| 1874 | inst_cream->field_mask = BITS(inst, 16, 19); | ||
| 1875 | inst_cream->R = BIT(inst, 22); | ||
| 1876 | inst_cream->inst = inst; | ||
| 1877 | |||
| 1878 | return inst_base; | ||
| 1879 | } | ||
| 1880 | static ARM_INST_PTR INTERPRETER_TRANSLATE(mul)(unsigned int inst, int index) | ||
| 1881 | { | ||
| 1882 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(mul_inst)); | ||
| 1883 | mul_inst *inst_cream = (mul_inst *)inst_base->component; | ||
| 1884 | |||
| 1885 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1886 | inst_base->idx = index; | ||
| 1887 | inst_base->br = NON_BRANCH; | ||
| 1888 | |||
| 1889 | inst_cream->S = BIT(inst, 20); | ||
| 1890 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 1891 | inst_cream->Rs = BITS(inst, 8, 11); | ||
| 1892 | inst_cream->Rd = BITS(inst, 16, 19); | ||
| 1893 | |||
| 1894 | return inst_base; | ||
| 1895 | } | ||
| 1896 | static ARM_INST_PTR INTERPRETER_TRANSLATE(mvn)(unsigned int inst, int index) | ||
| 1897 | { | ||
| 1898 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(mvn_inst)); | ||
| 1899 | mvn_inst *inst_cream = (mvn_inst *)inst_base->component; | ||
| 1900 | |||
| 1901 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1902 | inst_base->idx = index; | ||
| 1903 | inst_base->br = NON_BRANCH; | ||
| 1904 | |||
| 1905 | inst_cream->I = BIT(inst, 25); | ||
| 1906 | inst_cream->S = BIT(inst, 20); | ||
| 1907 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 1908 | inst_cream->shifter_operand = BITS(inst, 0, 11); | ||
| 1909 | inst_cream->shtop_func = get_shtop(inst); | ||
| 1910 | |||
| 1911 | if (inst_cream->Rd == 15) { | ||
| 1912 | inst_base->br = INDIRECT_BRANCH; | ||
| 1913 | } | ||
| 1914 | return inst_base; | ||
| 1915 | |||
| 1916 | } | ||
| 1917 | static ARM_INST_PTR INTERPRETER_TRANSLATE(orr)(unsigned int inst, int index) | ||
| 1918 | { | ||
| 1919 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(orr_inst)); | ||
| 1920 | orr_inst *inst_cream = (orr_inst *)inst_base->component; | ||
| 1921 | |||
| 1922 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1923 | inst_base->idx = index; | ||
| 1924 | inst_base->br = NON_BRANCH; | ||
| 1925 | |||
| 1926 | inst_cream->I = BIT(inst, 25); | ||
| 1927 | inst_cream->S = BIT(inst, 20); | ||
| 1928 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 1929 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 1930 | inst_cream->shifter_operand = BITS(inst, 0, 11); | ||
| 1931 | inst_cream->shtop_func = get_shtop(inst); | ||
| 1932 | |||
| 1933 | if (inst_cream->Rd == 15) | ||
| 1934 | inst_base->br = INDIRECT_BRANCH; | ||
| 1935 | |||
| 1936 | return inst_base; | ||
| 1937 | } | ||
| 1938 | |||
| 1939 | // NOP introduced in ARMv6K. | ||
| 1940 | static ARM_INST_PTR INTERPRETER_TRANSLATE(nop)(unsigned int inst, int index) | ||
| 1941 | { | ||
| 1942 | arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst)); | ||
| 1943 | |||
| 1944 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1945 | inst_base->idx = index; | ||
| 1946 | inst_base->br = NON_BRANCH; | ||
| 1947 | |||
| 1948 | return inst_base; | ||
| 1949 | } | ||
| 1950 | |||
| 1951 | static ARM_INST_PTR INTERPRETER_TRANSLATE(pkhbt)(unsigned int inst, int index) | ||
| 1952 | { | ||
| 1953 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(pkh_inst)); | ||
| 1954 | pkh_inst *inst_cream = (pkh_inst *)inst_base->component; | ||
| 1955 | |||
| 1956 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1957 | inst_base->idx = index; | ||
| 1958 | inst_base->br = NON_BRANCH; | ||
| 1959 | |||
| 1960 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 1961 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 1962 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 1963 | inst_cream->imm = BITS(inst, 7, 11); | ||
| 1964 | |||
| 1965 | return inst_base; | ||
| 1966 | } | ||
| 1967 | |||
| 1968 | static ARM_INST_PTR INTERPRETER_TRANSLATE(pkhtb)(unsigned int inst, int index) | ||
| 1969 | { | ||
| 1970 | return INTERPRETER_TRANSLATE(pkhbt)(inst, index); | ||
| 1971 | } | ||
| 1972 | |||
| 1973 | static ARM_INST_PTR INTERPRETER_TRANSLATE(pld)(unsigned int inst, int index) | ||
| 1974 | { | ||
| 1975 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(pld_inst)); | ||
| 1976 | |||
| 1977 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1978 | inst_base->idx = index; | ||
| 1979 | inst_base->br = NON_BRANCH; | ||
| 1980 | |||
| 1981 | return inst_base; | ||
| 1982 | } | ||
| 1983 | |||
| 1984 | static ARM_INST_PTR INTERPRETER_TRANSLATE(qadd)(unsigned int inst, int index) | ||
| 1985 | { | ||
| 1986 | arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst)); | ||
| 1987 | generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component; | ||
| 1988 | |||
| 1989 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1990 | inst_base->idx = index; | ||
| 1991 | inst_base->br = NON_BRANCH; | ||
| 1992 | |||
| 1993 | inst_cream->op1 = BITS(inst, 21, 22); | ||
| 1994 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 1995 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 1996 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 1997 | |||
| 1998 | return inst_base; | ||
| 1999 | } | ||
| 2000 | static ARM_INST_PTR INTERPRETER_TRANSLATE(qdadd)(unsigned int inst, int index) | ||
| 2001 | { | ||
| 2002 | return INTERPRETER_TRANSLATE(qadd)(inst, index); | ||
| 2003 | } | ||
| 2004 | static ARM_INST_PTR INTERPRETER_TRANSLATE(qdsub)(unsigned int inst, int index) | ||
| 2005 | { | ||
| 2006 | return INTERPRETER_TRANSLATE(qadd)(inst, index); | ||
| 2007 | } | ||
| 2008 | static ARM_INST_PTR INTERPRETER_TRANSLATE(qsub)(unsigned int inst, int index) | ||
| 2009 | { | ||
| 2010 | return INTERPRETER_TRANSLATE(qadd)(inst, index); | ||
| 2011 | } | ||
| 2012 | |||
| 2013 | static ARM_INST_PTR INTERPRETER_TRANSLATE(qadd8)(unsigned int inst, int index) | ||
| 2014 | { | ||
| 2015 | arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst)); | ||
| 2016 | generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component; | ||
| 2017 | |||
| 2018 | inst_base->cond = BITS(inst, 28, 31); | ||
| 2019 | inst_base->idx = index; | ||
| 2020 | inst_base->br = NON_BRANCH; | ||
| 2021 | |||
| 2022 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 2023 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 2024 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 2025 | inst_cream->op1 = BITS(inst, 20, 21); | ||
| 2026 | inst_cream->op2 = BITS(inst, 5, 7); | ||
| 2027 | |||
| 2028 | return inst_base; | ||
| 2029 | } | ||
| 2030 | static ARM_INST_PTR INTERPRETER_TRANSLATE(qadd16)(unsigned int inst, int index) | ||
| 2031 | { | ||
| 2032 | return INTERPRETER_TRANSLATE(qadd8)(inst, index); | ||
| 2033 | } | ||
| 2034 | static ARM_INST_PTR INTERPRETER_TRANSLATE(qaddsubx)(unsigned int inst, int index) | ||
| 2035 | { | ||
| 2036 | return INTERPRETER_TRANSLATE(qadd8)(inst, index); | ||
| 2037 | } | ||
| 2038 | static ARM_INST_PTR INTERPRETER_TRANSLATE(qsub8)(unsigned int inst, int index) | ||
| 2039 | { | ||
| 2040 | return INTERPRETER_TRANSLATE(qadd8)(inst, index); | ||
| 2041 | } | ||
| 2042 | static ARM_INST_PTR INTERPRETER_TRANSLATE(qsub16)(unsigned int inst, int index) | ||
| 2043 | { | ||
| 2044 | return INTERPRETER_TRANSLATE(qadd8)(inst, index); | ||
| 2045 | } | ||
| 2046 | static ARM_INST_PTR INTERPRETER_TRANSLATE(qsubaddx)(unsigned int inst, int index) | ||
| 2047 | { | ||
| 2048 | return INTERPRETER_TRANSLATE(qadd8)(inst, index); | ||
| 2049 | } | ||
| 2050 | |||
| 2051 | static ARM_INST_PTR INTERPRETER_TRANSLATE(rev)(unsigned int inst, int index) | ||
| 2052 | { | ||
| 2053 | arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(rev_inst)); | ||
| 2054 | rev_inst* const inst_cream = (rev_inst*)inst_base->component; | ||
| 2055 | |||
| 2056 | inst_base->cond = BITS(inst, 28, 31); | ||
| 2057 | inst_base->idx = index; | ||
| 2058 | inst_base->br = NON_BRANCH; | ||
| 2059 | |||
| 2060 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 2061 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 2062 | inst_cream->op1 = BITS(inst, 20, 22); | ||
| 2063 | inst_cream->op2 = BITS(inst, 5, 7); | ||
| 2064 | |||
| 2065 | return inst_base; | ||
| 2066 | } | ||
| 2067 | static ARM_INST_PTR INTERPRETER_TRANSLATE(rev16)(unsigned int inst, int index) | ||
| 2068 | { | ||
| 2069 | return INTERPRETER_TRANSLATE(rev)(inst, index); | ||
| 2070 | } | ||
| 2071 | static ARM_INST_PTR INTERPRETER_TRANSLATE(revsh)(unsigned int inst, int index) | ||
| 2072 | { | ||
| 2073 | return INTERPRETER_TRANSLATE(rev)(inst, index); | ||
| 2074 | } | ||
| 2075 | |||
| 2076 | static ARM_INST_PTR INTERPRETER_TRANSLATE(rfe)(unsigned int inst, int index) | ||
| 2077 | { | ||
| 2078 | arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); | ||
| 2079 | ldst_inst* const inst_cream = (ldst_inst*)inst_base->component; | ||
| 2080 | |||
| 2081 | inst_base->cond = AL; | ||
| 2082 | inst_base->idx = index; | ||
| 2083 | inst_base->br = INDIRECT_BRANCH; | ||
| 2084 | |||
| 2085 | inst_cream->inst = inst; | ||
| 2086 | inst_cream->get_addr = get_calc_addr_op(inst); | ||
| 2087 | |||
| 2088 | return inst_base; | ||
| 2089 | } | ||
| 2090 | |||
| 2091 | static ARM_INST_PTR INTERPRETER_TRANSLATE(rsb)(unsigned int inst, int index) | ||
| 2092 | { | ||
| 2093 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(rsb_inst)); | ||
| 2094 | rsb_inst *inst_cream = (rsb_inst *)inst_base->component; | ||
| 2095 | |||
| 2096 | inst_base->cond = BITS(inst, 28, 31); | ||
| 2097 | inst_base->idx = index; | ||
| 2098 | inst_base->br = NON_BRANCH; | ||
| 2099 | |||
| 2100 | inst_cream->I = BIT(inst, 25); | ||
| 2101 | inst_cream->S = BIT(inst, 20); | ||
| 2102 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 2103 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 2104 | inst_cream->shifter_operand = BITS(inst, 0, 11); | ||
| 2105 | inst_cream->shtop_func = get_shtop(inst); | ||
| 2106 | |||
| 2107 | if (inst_cream->Rd == 15) | ||
| 2108 | inst_base->br = INDIRECT_BRANCH; | ||
| 2109 | |||
| 2110 | return inst_base; | ||
| 2111 | } | ||
| 2112 | static ARM_INST_PTR INTERPRETER_TRANSLATE(rsc)(unsigned int inst, int index) | ||
| 2113 | { | ||
| 2114 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(rsc_inst)); | ||
| 2115 | rsc_inst *inst_cream = (rsc_inst *)inst_base->component; | ||
| 2116 | |||
| 2117 | inst_base->cond = BITS(inst, 28, 31); | ||
| 2118 | inst_base->idx = index; | ||
| 2119 | inst_base->br = NON_BRANCH; | ||
| 2120 | |||
| 2121 | inst_cream->I = BIT(inst, 25); | ||
| 2122 | inst_cream->S = BIT(inst, 20); | ||
| 2123 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 2124 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 2125 | inst_cream->shifter_operand = BITS(inst, 0, 11); | ||
| 2126 | inst_cream->shtop_func = get_shtop(inst); | ||
| 2127 | |||
| 2128 | if (inst_cream->Rd == 15) | ||
| 2129 | inst_base->br = INDIRECT_BRANCH; | ||
| 2130 | |||
| 2131 | return inst_base; | ||
| 2132 | } | ||
| 2133 | static ARM_INST_PTR INTERPRETER_TRANSLATE(sadd8)(unsigned int inst, int index) | ||
| 2134 | { | ||
| 2135 | arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst)); | ||
| 2136 | generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component; | ||
| 2137 | |||
| 2138 | inst_base->cond = BITS(inst, 28, 31); | ||
| 2139 | inst_base->idx = index; | ||
| 2140 | inst_base->br = NON_BRANCH; | ||
| 2141 | |||
| 2142 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 2143 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 2144 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 2145 | inst_cream->op1 = BITS(inst, 20, 21); | ||
| 2146 | inst_cream->op2 = BITS(inst, 5, 7); | ||
| 2147 | |||
| 2148 | return inst_base; | ||
| 2149 | } | ||
| 2150 | static ARM_INST_PTR INTERPRETER_TRANSLATE(sadd16)(unsigned int inst, int index) | ||
| 2151 | { | ||
| 2152 | return INTERPRETER_TRANSLATE(sadd8)(inst, index); | ||
| 2153 | } | ||
| 2154 | static ARM_INST_PTR INTERPRETER_TRANSLATE(saddsubx)(unsigned int inst, int index) | ||
| 2155 | { | ||
| 2156 | return INTERPRETER_TRANSLATE(sadd8)(inst, index); | ||
| 2157 | } | ||
| 2158 | static ARM_INST_PTR INTERPRETER_TRANSLATE(ssub8)(unsigned int inst, int index) | ||
| 2159 | { | ||
| 2160 | return INTERPRETER_TRANSLATE(sadd8)(inst, index); | ||
| 2161 | } | ||
| 2162 | static ARM_INST_PTR INTERPRETER_TRANSLATE(ssub16)(unsigned int inst, int index) | ||
| 2163 | { | ||
| 2164 | return INTERPRETER_TRANSLATE(sadd8)(inst, index); | ||
| 2165 | } | ||
| 2166 | static ARM_INST_PTR INTERPRETER_TRANSLATE(ssubaddx)(unsigned int inst, int index) | ||
| 2167 | { | ||
| 2168 | return INTERPRETER_TRANSLATE(sadd8)(inst, index); | ||
| 2169 | } | ||
| 2170 | |||
| 2171 | static ARM_INST_PTR INTERPRETER_TRANSLATE(sbc)(unsigned int inst, int index) | ||
| 2172 | { | ||
| 2173 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(sbc_inst)); | ||
| 2174 | sbc_inst *inst_cream = (sbc_inst *)inst_base->component; | ||
| 2175 | |||
| 2176 | inst_base->cond = BITS(inst, 28, 31); | ||
| 2177 | inst_base->idx = index; | ||
| 2178 | inst_base->br = NON_BRANCH; | ||
| 2179 | |||
| 2180 | inst_cream->I = BIT(inst, 25); | ||
| 2181 | inst_cream->S = BIT(inst, 20); | ||
| 2182 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 2183 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 2184 | inst_cream->shifter_operand = BITS(inst, 0, 11); | ||
| 2185 | inst_cream->shtop_func = get_shtop(inst); | ||
| 2186 | |||
| 2187 | if (inst_cream->Rd == 15) | ||
| 2188 | inst_base->br = INDIRECT_BRANCH; | ||
| 2189 | |||
| 2190 | return inst_base; | ||
| 2191 | } | ||
| 2192 | static ARM_INST_PTR INTERPRETER_TRANSLATE(sel)(unsigned int inst, int index) | ||
| 2193 | { | ||
| 2194 | arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst)); | ||
| 2195 | generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component; | ||
| 2196 | |||
| 2197 | inst_base->cond = BITS(inst, 28, 31); | ||
| 2198 | inst_base->idx = index; | ||
| 2199 | inst_base->br = NON_BRANCH; | ||
| 2200 | |||
| 2201 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 2202 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 2203 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 2204 | inst_cream->op1 = BITS(inst, 20, 22); | ||
| 2205 | inst_cream->op2 = BITS(inst, 5, 7); | ||
| 2206 | |||
| 2207 | return inst_base; | ||
| 2208 | } | ||
| 2209 | |||
| 2210 | static ARM_INST_PTR INTERPRETER_TRANSLATE(setend)(unsigned int inst, int index) | ||
| 2211 | { | ||
| 2212 | arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(setend_inst)); | ||
| 2213 | setend_inst* const inst_cream = (setend_inst*)inst_base->component; | ||
| 2214 | |||
| 2215 | inst_base->cond = AL; | ||
| 2216 | inst_base->idx = index; | ||
| 2217 | inst_base->br = NON_BRANCH; | ||
| 2218 | |||
| 2219 | inst_cream->set_bigend = BIT(inst, 9); | ||
| 2220 | |||
| 2221 | return inst_base; | ||
| 2222 | } | ||
| 2223 | |||
| 2224 | static ARM_INST_PTR INTERPRETER_TRANSLATE(sev)(unsigned int inst, int index) | ||
| 2225 | { | ||
| 2226 | arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst)); | ||
| 2227 | |||
| 2228 | inst_base->cond = BITS(inst, 28, 31); | ||
| 2229 | inst_base->idx = index; | ||
| 2230 | inst_base->br = NON_BRANCH; | ||
| 2231 | |||
| 2232 | return inst_base; | ||
| 2233 | } | ||
| 2234 | |||
| 2235 | static ARM_INST_PTR INTERPRETER_TRANSLATE(shadd8)(unsigned int inst, int index) | ||
| 2236 | { | ||
| 2237 | arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst)); | ||
| 2238 | generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component; | ||
| 2239 | |||
| 2240 | inst_base->cond = BITS(inst, 28, 31); | ||
| 2241 | inst_base->idx = index; | ||
| 2242 | inst_base->br = NON_BRANCH; | ||
| 2243 | |||
| 2244 | inst_cream->op1 = BITS(inst, 20, 21); | ||
| 2245 | inst_cream->op2 = BITS(inst, 5, 7); | ||
| 2246 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 2247 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 2248 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 2249 | |||
| 2250 | return inst_base; | ||
| 2251 | } | ||
| 2252 | static ARM_INST_PTR INTERPRETER_TRANSLATE(shadd16)(unsigned int inst, int index) | ||
| 2253 | { | ||
| 2254 | return INTERPRETER_TRANSLATE(shadd8)(inst, index); | ||
| 2255 | } | ||
| 2256 | static ARM_INST_PTR INTERPRETER_TRANSLATE(shaddsubx)(unsigned int inst, int index) | ||
| 2257 | { | ||
| 2258 | return INTERPRETER_TRANSLATE(shadd8)(inst, index); | ||
| 2259 | } | ||
| 2260 | static ARM_INST_PTR INTERPRETER_TRANSLATE(shsub8)(unsigned int inst, int index) | ||
| 2261 | { | ||
| 2262 | return INTERPRETER_TRANSLATE(shadd8)(inst, index); | ||
| 2263 | } | ||
| 2264 | static ARM_INST_PTR INTERPRETER_TRANSLATE(shsub16)(unsigned int inst, int index) | ||
| 2265 | { | ||
| 2266 | return INTERPRETER_TRANSLATE(shadd8)(inst, index); | ||
| 2267 | } | ||
| 2268 | static ARM_INST_PTR INTERPRETER_TRANSLATE(shsubaddx)(unsigned int inst, int index) | ||
| 2269 | { | ||
| 2270 | return INTERPRETER_TRANSLATE(shadd8)(inst, index); | ||
| 2271 | } | ||
| 2272 | |||
| 2273 | static ARM_INST_PTR INTERPRETER_TRANSLATE(smla)(unsigned int inst, int index) | ||
| 2274 | { | ||
| 2275 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(smla_inst)); | ||
| 2276 | smla_inst *inst_cream = (smla_inst *)inst_base->component; | ||
| 2277 | |||
| 2278 | inst_base->cond = BITS(inst, 28, 31); | ||
| 2279 | inst_base->idx = index; | ||
| 2280 | inst_base->br = NON_BRANCH; | ||
| 2281 | |||
| 2282 | inst_cream->x = BIT(inst, 5); | ||
| 2283 | inst_cream->y = BIT(inst, 6); | ||
| 2284 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 2285 | inst_cream->Rs = BITS(inst, 8, 11); | ||
| 2286 | inst_cream->Rd = BITS(inst, 16, 19); | ||
| 2287 | inst_cream->Rn = BITS(inst, 12, 15); | ||
| 2288 | |||
| 2289 | return inst_base; | ||
| 2290 | } | ||
| 2291 | |||
| 2292 | static ARM_INST_PTR INTERPRETER_TRANSLATE(smlad)(unsigned int inst, int index) | ||
| 2293 | { | ||
| 2294 | arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(smlad_inst)); | ||
| 2295 | smlad_inst* const inst_cream = (smlad_inst*)inst_base->component; | ||
| 2296 | |||
| 2297 | inst_base->cond = BITS(inst, 28, 31); | ||
| 2298 | inst_base->idx = index; | ||
| 2299 | inst_base->br = NON_BRANCH; | ||
| 2300 | |||
| 2301 | inst_cream->m = BIT(inst, 5); | ||
| 2302 | inst_cream->Rn = BITS(inst, 0, 3); | ||
| 2303 | inst_cream->Rm = BITS(inst, 8, 11); | ||
| 2304 | inst_cream->Rd = BITS(inst, 16, 19); | ||
| 2305 | inst_cream->Ra = BITS(inst, 12, 15); | ||
| 2306 | inst_cream->op1 = BITS(inst, 20, 22); | ||
| 2307 | inst_cream->op2 = BITS(inst, 5, 7); | ||
| 2308 | |||
| 2309 | return inst_base; | ||
| 2310 | } | ||
| 2311 | static ARM_INST_PTR INTERPRETER_TRANSLATE(smuad)(unsigned int inst, int index) | ||
| 2312 | { | ||
| 2313 | return INTERPRETER_TRANSLATE(smlad)(inst, index); | ||
| 2314 | } | ||
| 2315 | static ARM_INST_PTR INTERPRETER_TRANSLATE(smusd)(unsigned int inst, int index) | ||
| 2316 | { | ||
| 2317 | return INTERPRETER_TRANSLATE(smlad)(inst, index); | ||
| 2318 | } | ||
| 2319 | static ARM_INST_PTR INTERPRETER_TRANSLATE(smlsd)(unsigned int inst, int index) | ||
| 2320 | { | ||
| 2321 | return INTERPRETER_TRANSLATE(smlad)(inst, index); | ||
| 2322 | } | ||
| 2323 | |||
| 2324 | static ARM_INST_PTR INTERPRETER_TRANSLATE(smlal)(unsigned int inst, int index) | ||
| 2325 | { | ||
| 2326 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(umlal_inst)); | ||
| 2327 | umlal_inst *inst_cream = (umlal_inst *)inst_base->component; | ||
| 2328 | |||
| 2329 | inst_base->cond = BITS(inst, 28, 31); | ||
| 2330 | inst_base->idx = index; | ||
| 2331 | inst_base->br = NON_BRANCH; | ||
| 2332 | |||
| 2333 | inst_cream->S = BIT(inst, 20); | ||
| 2334 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 2335 | inst_cream->Rs = BITS(inst, 8, 11); | ||
| 2336 | inst_cream->RdHi = BITS(inst, 16, 19); | ||
| 2337 | inst_cream->RdLo = BITS(inst, 12, 15); | ||
| 2338 | |||
| 2339 | return inst_base; | ||
| 2340 | } | ||
| 2341 | |||
| 2342 | static ARM_INST_PTR INTERPRETER_TRANSLATE(smlalxy)(unsigned int inst, int index) | ||
| 2343 | { | ||
| 2344 | arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(smlalxy_inst)); | ||
| 2345 | smlalxy_inst* const inst_cream = (smlalxy_inst*)inst_base->component; | ||
| 2346 | |||
| 2347 | inst_base->cond = BITS(inst, 28, 31); | ||
| 2348 | inst_base->idx = index; | ||
| 2349 | inst_base->br = NON_BRANCH; | ||
| 2350 | |||
| 2351 | inst_cream->x = BIT(inst, 5); | ||
| 2352 | inst_cream->y = BIT(inst, 6); | ||
| 2353 | inst_cream->RdLo = BITS(inst, 12, 15); | ||
| 2354 | inst_cream->RdHi = BITS(inst, 16, 19); | ||
| 2355 | inst_cream->Rn = BITS(inst, 0, 4); | ||
| 2356 | inst_cream->Rm = BITS(inst, 8, 11); | ||
| 2357 | |||
| 2358 | return inst_base; | ||
| 2359 | } | ||
| 2360 | |||
| 2361 | static ARM_INST_PTR INTERPRETER_TRANSLATE(smlaw)(unsigned int inst, int index) | ||
| 2362 | { | ||
| 2363 | arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(smlad_inst)); | ||
| 2364 | smlad_inst* const inst_cream = (smlad_inst*)inst_base->component; | ||
| 2365 | |||
| 2366 | inst_base->cond = BITS(inst, 28, 31); | ||
| 2367 | inst_base->idx = index; | ||
| 2368 | inst_base->br = NON_BRANCH; | ||
| 2369 | |||
| 2370 | inst_cream->Ra = BITS(inst, 12, 15); | ||
| 2371 | inst_cream->Rm = BITS(inst, 8, 11); | ||
| 2372 | inst_cream->Rn = BITS(inst, 0, 3); | ||
| 2373 | inst_cream->Rd = BITS(inst, 16, 19); | ||
| 2374 | inst_cream->m = BIT(inst, 6); | ||
| 2375 | |||
| 2376 | return inst_base; | ||
| 2377 | } | ||
| 2378 | |||
| 2379 | static ARM_INST_PTR INTERPRETER_TRANSLATE(smlald)(unsigned int inst, int index) | ||
| 2380 | { | ||
| 2381 | arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(smlald_inst)); | ||
| 2382 | smlald_inst* const inst_cream = (smlald_inst*)inst_base->component; | ||
| 2383 | |||
| 2384 | inst_base->cond = BITS(inst, 28, 31); | ||
| 2385 | inst_base->idx = index; | ||
| 2386 | inst_base->br = NON_BRANCH; | ||
| 2387 | |||
| 2388 | inst_cream->Rm = BITS(inst, 8, 11); | ||
| 2389 | inst_cream->Rn = BITS(inst, 0, 3); | ||
| 2390 | inst_cream->RdLo = BITS(inst, 12, 15); | ||
| 2391 | inst_cream->RdHi = BITS(inst, 16, 19); | ||
| 2392 | inst_cream->swap = BIT(inst, 5); | ||
| 2393 | inst_cream->op1 = BITS(inst, 20, 22); | ||
| 2394 | inst_cream->op2 = BITS(inst, 5, 7); | ||
| 2395 | |||
| 2396 | return inst_base; | ||
| 2397 | } | ||
| 2398 | static ARM_INST_PTR INTERPRETER_TRANSLATE(smlsld)(unsigned int inst, int index) | ||
| 2399 | { | ||
| 2400 | return INTERPRETER_TRANSLATE(smlald)(inst, index); | ||
| 2401 | } | ||
| 2402 | |||
| 2403 | static ARM_INST_PTR INTERPRETER_TRANSLATE(smmla)(unsigned int inst, int index) | ||
| 2404 | { | ||
| 2405 | arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(smlad_inst)); | ||
| 2406 | smlad_inst* const inst_cream = (smlad_inst*)inst_base->component; | ||
| 2407 | |||
| 2408 | inst_base->cond = BITS(inst, 28, 31); | ||
| 2409 | inst_base->idx = index; | ||
| 2410 | inst_base->br = NON_BRANCH; | ||
| 2411 | |||
| 2412 | inst_cream->m = BIT(inst, 5); | ||
| 2413 | inst_cream->Ra = BITS(inst, 12, 15); | ||
| 2414 | inst_cream->Rm = BITS(inst, 8, 11); | ||
| 2415 | inst_cream->Rn = BITS(inst, 0, 3); | ||
| 2416 | inst_cream->Rd = BITS(inst, 16, 19); | ||
| 2417 | inst_cream->op1 = BITS(inst, 20, 22); | ||
| 2418 | inst_cream->op2 = BITS(inst, 5, 7); | ||
| 2419 | |||
| 2420 | return inst_base; | ||
| 2421 | } | ||
| 2422 | static ARM_INST_PTR INTERPRETER_TRANSLATE(smmls)(unsigned int inst, int index) | ||
| 2423 | { | ||
| 2424 | return INTERPRETER_TRANSLATE(smmla)(inst, index); | ||
| 2425 | } | ||
| 2426 | static ARM_INST_PTR INTERPRETER_TRANSLATE(smmul)(unsigned int inst, int index) | ||
| 2427 | { | ||
| 2428 | return INTERPRETER_TRANSLATE(smmla)(inst, index); | ||
| 2429 | } | ||
| 2430 | |||
| 2431 | static ARM_INST_PTR INTERPRETER_TRANSLATE(smul)(unsigned int inst, int index) | ||
| 2432 | { | ||
| 2433 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(smul_inst)); | ||
| 2434 | smul_inst *inst_cream = (smul_inst *)inst_base->component; | ||
| 2435 | |||
| 2436 | inst_base->cond = BITS(inst, 28, 31); | ||
| 2437 | inst_base->idx = index; | ||
| 2438 | inst_base->br = NON_BRANCH; | ||
| 2439 | |||
| 2440 | inst_cream->Rd = BITS(inst, 16, 19); | ||
| 2441 | inst_cream->Rs = BITS(inst, 8, 11); | ||
| 2442 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 2443 | |||
| 2444 | inst_cream->x = BIT(inst, 5); | ||
| 2445 | inst_cream->y = BIT(inst, 6); | ||
| 2446 | |||
| 2447 | return inst_base; | ||
| 2448 | |||
| 2449 | } | ||
| 2450 | static ARM_INST_PTR INTERPRETER_TRANSLATE(smull)(unsigned int inst, int index) | ||
| 2451 | { | ||
| 2452 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(umull_inst)); | ||
| 2453 | umull_inst *inst_cream = (umull_inst *)inst_base->component; | ||
| 2454 | |||
| 2455 | inst_base->cond = BITS(inst, 28, 31); | ||
| 2456 | inst_base->idx = index; | ||
| 2457 | inst_base->br = NON_BRANCH; | ||
| 2458 | |||
| 2459 | inst_cream->S = BIT(inst, 20); | ||
| 2460 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 2461 | inst_cream->Rs = BITS(inst, 8, 11); | ||
| 2462 | inst_cream->RdHi = BITS(inst, 16, 19); | ||
| 2463 | inst_cream->RdLo = BITS(inst, 12, 15); | ||
| 2464 | |||
| 2465 | return inst_base; | ||
| 2466 | } | ||
| 2467 | |||
| 2468 | static ARM_INST_PTR INTERPRETER_TRANSLATE(smulw)(unsigned int inst, int index) | ||
| 2469 | { | ||
| 2470 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(smlad_inst)); | ||
| 2471 | smlad_inst *inst_cream = (smlad_inst *)inst_base->component; | ||
| 2472 | |||
| 2473 | inst_base->cond = BITS(inst, 28, 31); | ||
| 2474 | inst_base->idx = index; | ||
| 2475 | inst_base->br = NON_BRANCH; | ||
| 2476 | |||
| 2477 | inst_cream->m = BIT(inst, 6); | ||
| 2478 | inst_cream->Rm = BITS(inst, 8, 11); | ||
| 2479 | inst_cream->Rn = BITS(inst, 0, 3); | ||
| 2480 | inst_cream->Rd = BITS(inst, 16, 19); | ||
| 2481 | |||
| 2482 | return inst_base; | ||
| 2483 | } | ||
| 2484 | |||
| 2485 | static ARM_INST_PTR INTERPRETER_TRANSLATE(srs)(unsigned int inst, int index) | ||
| 2486 | { | ||
| 2487 | arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); | ||
| 2488 | ldst_inst* const inst_cream = (ldst_inst*)inst_base->component; | ||
| 2489 | |||
| 2490 | inst_base->cond = AL; | ||
| 2491 | inst_base->idx = index; | ||
| 2492 | inst_base->br = NON_BRANCH; | ||
| 2493 | |||
| 2494 | inst_cream->inst = inst; | ||
| 2495 | inst_cream->get_addr = get_calc_addr_op(inst); | ||
| 2496 | |||
| 2497 | return inst_base; | ||
| 2498 | } | ||
| 2499 | |||
| 2500 | static ARM_INST_PTR INTERPRETER_TRANSLATE(ssat)(unsigned int inst, int index) | ||
| 2501 | { | ||
| 2502 | arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(ssat_inst)); | ||
| 2503 | ssat_inst* const inst_cream = (ssat_inst*)inst_base->component; | ||
| 2504 | |||
| 2505 | inst_base->cond = BITS(inst, 28, 31); | ||
| 2506 | inst_base->idx = index; | ||
| 2507 | inst_base->br = NON_BRANCH; | ||
| 2508 | |||
| 2509 | inst_cream->Rn = BITS(inst, 0, 3); | ||
| 2510 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 2511 | inst_cream->imm5 = BITS(inst, 7, 11); | ||
| 2512 | inst_cream->sat_imm = BITS(inst, 16, 20); | ||
| 2513 | inst_cream->shift_type = BIT(inst, 6); | ||
| 2514 | |||
| 2515 | return inst_base; | ||
| 2516 | } | ||
| 2517 | static ARM_INST_PTR INTERPRETER_TRANSLATE(ssat16)(unsigned int inst, int index) | ||
| 2518 | { | ||
| 2519 | arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(ssat_inst)); | ||
| 2520 | ssat_inst* const inst_cream = (ssat_inst*)inst_base->component; | ||
| 2521 | |||
| 2522 | inst_base->cond = BITS(inst, 28, 31); | ||
| 2523 | inst_base->idx = index; | ||
| 2524 | inst_base->br = NON_BRANCH; | ||
| 2525 | |||
| 2526 | inst_cream->Rn = BITS(inst, 0, 3); | ||
| 2527 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 2528 | inst_cream->sat_imm = BITS(inst, 16, 19); | ||
| 2529 | |||
| 2530 | return inst_base; | ||
| 2531 | } | ||
| 2532 | |||
| 2533 | static ARM_INST_PTR INTERPRETER_TRANSLATE(stc)(unsigned int inst, int index) | ||
| 2534 | { | ||
| 2535 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(stc_inst)); | ||
| 2536 | inst_base->cond = BITS(inst, 28, 31); | ||
| 2537 | inst_base->idx = index; | ||
| 2538 | inst_base->br = NON_BRANCH; | ||
| 2539 | |||
| 2540 | return inst_base; | ||
| 2541 | } | ||
| 2542 | static ARM_INST_PTR INTERPRETER_TRANSLATE(stm)(unsigned int inst, int index) | ||
| 2543 | { | ||
| 2544 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); | ||
| 2545 | ldst_inst *inst_cream = (ldst_inst *)inst_base->component; | ||
| 2546 | |||
| 2547 | inst_base->cond = BITS(inst, 28, 31); | ||
| 2548 | inst_base->idx = index; | ||
| 2549 | inst_base->br = NON_BRANCH; | ||
| 2550 | |||
| 2551 | inst_cream->inst = inst; | ||
| 2552 | inst_cream->get_addr = get_calc_addr_op(inst); | ||
| 2553 | return inst_base; | ||
| 2554 | } | ||
| 2555 | static ARM_INST_PTR INTERPRETER_TRANSLATE(sxtb)(unsigned int inst, int index) | ||
| 2556 | { | ||
| 2557 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(sxtb_inst)); | ||
| 2558 | sxtb_inst *inst_cream = (sxtb_inst *)inst_base->component; | ||
| 2559 | |||
| 2560 | inst_base->cond = BITS(inst, 28, 31); | ||
| 2561 | inst_base->idx = index; | ||
| 2562 | inst_base->br = NON_BRANCH; | ||
| 2563 | |||
| 2564 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 2565 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 2566 | inst_cream->rotate = BITS(inst, 10, 11); | ||
| 2567 | |||
| 2568 | return inst_base; | ||
| 2569 | } | ||
| 2570 | static ARM_INST_PTR INTERPRETER_TRANSLATE(str)(unsigned int inst, int index) | ||
| 2571 | { | ||
| 2572 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); | ||
| 2573 | ldst_inst *inst_cream = (ldst_inst *)inst_base->component; | ||
| 2574 | |||
| 2575 | inst_base->cond = BITS(inst, 28, 31); | ||
| 2576 | inst_base->idx = index; | ||
| 2577 | inst_base->br = NON_BRANCH; | ||
| 2578 | |||
| 2579 | inst_cream->inst = inst; | ||
| 2580 | inst_cream->get_addr = get_calc_addr_op(inst); | ||
| 2581 | |||
| 2582 | return inst_base; | ||
| 2583 | } | ||
| 2584 | static ARM_INST_PTR INTERPRETER_TRANSLATE(uxtb)(unsigned int inst, int index) | ||
| 2585 | { | ||
| 2586 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(uxth_inst)); | ||
| 2587 | uxth_inst *inst_cream = (uxth_inst *)inst_base->component; | ||
| 2588 | |||
| 2589 | inst_base->cond = BITS(inst, 28, 31); | ||
| 2590 | inst_base->idx = index; | ||
| 2591 | inst_base->br = NON_BRANCH; | ||
| 2592 | |||
| 2593 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 2594 | inst_cream->rotate = BITS(inst, 10, 11); | ||
| 2595 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 2596 | |||
| 2597 | return inst_base; | ||
| 2598 | } | ||
| 2599 | static ARM_INST_PTR INTERPRETER_TRANSLATE(uxtab)(unsigned int inst, int index) | ||
| 2600 | { | ||
| 2601 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(uxtab_inst)); | ||
| 2602 | uxtab_inst *inst_cream = (uxtab_inst *)inst_base->component; | ||
| 2603 | |||
| 2604 | inst_base->cond = BITS(inst, 28, 31); | ||
| 2605 | inst_base->idx = index; | ||
| 2606 | inst_base->br = NON_BRANCH; | ||
| 2607 | |||
| 2608 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 2609 | inst_cream->rotate = BITS(inst, 10, 11); | ||
| 2610 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 2611 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 2612 | |||
| 2613 | return inst_base; | ||
| 2614 | } | ||
| 2615 | static ARM_INST_PTR INTERPRETER_TRANSLATE(strb)(unsigned int inst, int index) | ||
| 2616 | { | ||
| 2617 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); | ||
| 2618 | ldst_inst *inst_cream = (ldst_inst *)inst_base->component; | ||
| 2619 | |||
| 2620 | inst_base->cond = BITS(inst, 28, 31); | ||
| 2621 | inst_base->idx = index; | ||
| 2622 | inst_base->br = NON_BRANCH; | ||
| 2623 | |||
| 2624 | inst_cream->inst = inst; | ||
| 2625 | inst_cream->get_addr = get_calc_addr_op(inst); | ||
| 2626 | |||
| 2627 | return inst_base; | ||
| 2628 | } | ||
| 2629 | static ARM_INST_PTR INTERPRETER_TRANSLATE(strbt)(unsigned int inst, int index) | ||
| 2630 | { | ||
| 2631 | arm_inst* inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); | ||
| 2632 | ldst_inst* inst_cream = (ldst_inst*)inst_base->component; | ||
| 2633 | |||
| 2634 | inst_base->cond = BITS(inst, 28, 31); | ||
| 2635 | inst_base->idx = index; | ||
| 2636 | inst_base->br = NON_BRANCH; | ||
| 2637 | |||
| 2638 | inst_cream->inst = inst; | ||
| 2639 | |||
| 2640 | if (BITS(inst, 25, 27) == 2) { | ||
| 2641 | inst_cream->get_addr = LnSWoUB(ImmediatePostIndexed); | ||
| 2642 | } else if (BITS(inst, 25, 27) == 3) { | ||
| 2643 | inst_cream->get_addr = LnSWoUB(ScaledRegisterPostIndexed); | ||
| 2644 | } else { | ||
| 2645 | DEBUG_MSG; | ||
| 2646 | } | ||
| 2647 | |||
| 2648 | return inst_base; | ||
| 2649 | } | ||
| 2650 | static ARM_INST_PTR INTERPRETER_TRANSLATE(strd)(unsigned int inst, int index){ | ||
| 2651 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); | ||
| 2652 | ldst_inst *inst_cream = (ldst_inst *)inst_base->component; | ||
| 2653 | |||
| 2654 | inst_base->cond = BITS(inst, 28, 31); | ||
| 2655 | inst_base->idx = index; | ||
| 2656 | inst_base->br = NON_BRANCH; | ||
| 2657 | |||
| 2658 | inst_cream->inst = inst; | ||
| 2659 | inst_cream->get_addr = get_calc_addr_op(inst); | ||
| 2660 | |||
| 2661 | return inst_base; | ||
| 2662 | } | ||
| 2663 | static ARM_INST_PTR INTERPRETER_TRANSLATE(strex)(unsigned int inst, int index) | ||
| 2664 | { | ||
| 2665 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst)); | ||
| 2666 | generic_arm_inst *inst_cream = (generic_arm_inst *)inst_base->component; | ||
| 2667 | |||
| 2668 | inst_base->cond = BITS(inst, 28, 31); | ||
| 2669 | inst_base->idx = index; | ||
| 2670 | inst_base->br = NON_BRANCH; | ||
| 2671 | |||
| 2672 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 2673 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 2674 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 2675 | |||
| 2676 | return inst_base; | ||
| 2677 | } | ||
| 2678 | static ARM_INST_PTR INTERPRETER_TRANSLATE(strexb)(unsigned int inst, int index) | ||
| 2679 | { | ||
| 2680 | return INTERPRETER_TRANSLATE(strex)(inst, index); | ||
| 2681 | } | ||
| 2682 | static ARM_INST_PTR INTERPRETER_TRANSLATE(strexh)(unsigned int inst, int index) | ||
| 2683 | { | ||
| 2684 | return INTERPRETER_TRANSLATE(strex)(inst, index); | ||
| 2685 | } | ||
| 2686 | static ARM_INST_PTR INTERPRETER_TRANSLATE(strexd)(unsigned int inst, int index) | ||
| 2687 | { | ||
| 2688 | return INTERPRETER_TRANSLATE(strex)(inst, index); | ||
| 2689 | } | ||
| 2690 | static ARM_INST_PTR INTERPRETER_TRANSLATE(strh)(unsigned int inst, int index) | ||
| 2691 | { | ||
| 2692 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); | ||
| 2693 | ldst_inst *inst_cream = (ldst_inst *)inst_base->component; | ||
| 2694 | |||
| 2695 | inst_base->cond = BITS(inst, 28, 31); | ||
| 2696 | inst_base->idx = index; | ||
| 2697 | inst_base->br = NON_BRANCH; | ||
| 2698 | |||
| 2699 | inst_cream->inst = inst; | ||
| 2700 | inst_cream->get_addr = get_calc_addr_op(inst); | ||
| 2701 | |||
| 2702 | return inst_base; | ||
| 2703 | } | ||
| 2704 | static ARM_INST_PTR INTERPRETER_TRANSLATE(strt)(unsigned int inst, int index) | ||
| 2705 | { | ||
| 2706 | arm_inst* inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); | ||
| 2707 | ldst_inst* inst_cream = (ldst_inst*)inst_base->component; | ||
| 2708 | |||
| 2709 | inst_base->cond = BITS(inst, 28, 31); | ||
| 2710 | inst_base->idx = index; | ||
| 2711 | inst_base->br = NON_BRANCH; | ||
| 2712 | |||
| 2713 | inst_cream->inst = inst; | ||
| 2714 | if (BITS(inst, 25, 27) == 2) { | ||
| 2715 | inst_cream->get_addr = LnSWoUB(ImmediatePostIndexed); | ||
| 2716 | } else if (BITS(inst, 25, 27) == 3) { | 724 | } else if (BITS(inst, 25, 27) == 3) { |
| 2717 | inst_cream->get_addr = LnSWoUB(ScaledRegisterPostIndexed); | 725 | return LnSWoUB(ScaledRegisterPostIndexed); |
| 2718 | } else { | ||
| 2719 | // Reaching this would indicate the thumb version | ||
| 2720 | // of this instruction, however the 3DS CPU doesn't | ||
| 2721 | // support this variant (the 3DS CPU is only ARMv6K, | ||
| 2722 | // while this variant is added in ARMv6T2). | ||
| 2723 | // So it's sufficient for citra to not implement this. | ||
| 2724 | DEBUG_MSG; | ||
| 2725 | } | 726 | } |
| 2726 | 727 | // Reaching this would indicate the thumb version | |
| 2727 | return inst_base; | 728 | // of this instruction, however the 3DS CPU doesn't |
| 2728 | } | 729 | // support this variant (the 3DS CPU is only ARMv6K, |
| 2729 | static ARM_INST_PTR INTERPRETER_TRANSLATE(sub)(unsigned int inst, int index) | 730 | // while this variant is added in ARMv6T2). |
| 2730 | { | 731 | // So it's sufficient for citra to not implement this. |
| 2731 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(sub_inst)); | 732 | return nullptr; |
| 2732 | sub_inst *inst_cream = (sub_inst *)inst_base->component; | ||
| 2733 | |||
| 2734 | inst_base->cond = BITS(inst, 28, 31); | ||
| 2735 | inst_base->idx = index; | ||
| 2736 | inst_base->br = NON_BRANCH; | ||
| 2737 | |||
| 2738 | inst_cream->I = BIT(inst, 25); | ||
| 2739 | inst_cream->S = BIT(inst, 20); | ||
| 2740 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 2741 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 2742 | inst_cream->shifter_operand = BITS(inst, 0, 11); | ||
| 2743 | inst_cream->shtop_func = get_shtop(inst); | ||
| 2744 | |||
| 2745 | if (inst_cream->Rd == 15) | ||
| 2746 | inst_base->br = INDIRECT_BRANCH; | ||
| 2747 | |||
| 2748 | return inst_base; | ||
| 2749 | } | ||
| 2750 | static ARM_INST_PTR INTERPRETER_TRANSLATE(swi)(unsigned int inst, int index) | ||
| 2751 | { | ||
| 2752 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(swi_inst)); | ||
| 2753 | swi_inst *inst_cream = (swi_inst *)inst_base->component; | ||
| 2754 | |||
| 2755 | inst_base->cond = BITS(inst, 28, 31); | ||
| 2756 | inst_base->idx = index; | ||
| 2757 | inst_base->br = NON_BRANCH; | ||
| 2758 | |||
| 2759 | inst_cream->num = BITS(inst, 0, 23); | ||
| 2760 | return inst_base; | ||
| 2761 | } | ||
| 2762 | static ARM_INST_PTR INTERPRETER_TRANSLATE(swp)(unsigned int inst, int index) | ||
| 2763 | { | ||
| 2764 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(swp_inst)); | ||
| 2765 | swp_inst *inst_cream = (swp_inst *)inst_base->component; | ||
| 2766 | |||
| 2767 | inst_base->cond = BITS(inst, 28, 31); | ||
| 2768 | inst_base->idx = index; | ||
| 2769 | inst_base->br = NON_BRANCH; | ||
| 2770 | |||
| 2771 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 2772 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 2773 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 2774 | |||
| 2775 | return inst_base; | ||
| 2776 | } | ||
| 2777 | static ARM_INST_PTR INTERPRETER_TRANSLATE(swpb)(unsigned int inst, int index){ | ||
| 2778 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(swp_inst)); | ||
| 2779 | swp_inst *inst_cream = (swp_inst *)inst_base->component; | ||
| 2780 | |||
| 2781 | inst_base->cond = BITS(inst, 28, 31); | ||
| 2782 | inst_base->idx = index; | ||
| 2783 | inst_base->br = NON_BRANCH; | ||
| 2784 | |||
| 2785 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 2786 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 2787 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 2788 | |||
| 2789 | return inst_base; | ||
| 2790 | } | ||
| 2791 | static ARM_INST_PTR INTERPRETER_TRANSLATE(sxtab)(unsigned int inst, int index){ | ||
| 2792 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(sxtab_inst)); | ||
| 2793 | sxtab_inst *inst_cream = (sxtab_inst *)inst_base->component; | ||
| 2794 | |||
| 2795 | inst_base->cond = BITS(inst, 28, 31); | ||
| 2796 | inst_base->idx = index; | ||
| 2797 | inst_base->br = NON_BRANCH; | ||
| 2798 | |||
| 2799 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 2800 | inst_cream->rotate = BITS(inst, 10, 11); | ||
| 2801 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 2802 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 2803 | |||
| 2804 | return inst_base; | ||
| 2805 | } | ||
| 2806 | |||
| 2807 | static ARM_INST_PTR INTERPRETER_TRANSLATE(sxtab16)(unsigned int inst, int index) | ||
| 2808 | { | ||
| 2809 | arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(sxtab_inst)); | ||
| 2810 | sxtab_inst* const inst_cream = (sxtab_inst*)inst_base->component; | ||
| 2811 | |||
| 2812 | inst_base->cond = BITS(inst, 28, 31); | ||
| 2813 | inst_base->idx = index; | ||
| 2814 | inst_base->br = NON_BRANCH; | ||
| 2815 | |||
| 2816 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 2817 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 2818 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 2819 | inst_cream->rotate = BITS(inst, 10, 11); | ||
| 2820 | |||
| 2821 | return inst_base; | ||
| 2822 | } | ||
| 2823 | static ARM_INST_PTR INTERPRETER_TRANSLATE(sxtb16)(unsigned int inst, int index) | ||
| 2824 | { | ||
| 2825 | return INTERPRETER_TRANSLATE(sxtab16)(inst, index); | ||
| 2826 | } | ||
| 2827 | |||
| 2828 | static ARM_INST_PTR INTERPRETER_TRANSLATE(sxtah)(unsigned int inst, int index) { | ||
| 2829 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(sxtah_inst)); | ||
| 2830 | sxtah_inst *inst_cream = (sxtah_inst *)inst_base->component; | ||
| 2831 | |||
| 2832 | inst_base->cond = BITS(inst, 28, 31); | ||
| 2833 | inst_base->idx = index; | ||
| 2834 | inst_base->br = NON_BRANCH; | ||
| 2835 | |||
| 2836 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 2837 | inst_cream->rotate = BITS(inst, 10, 11); | ||
| 2838 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 2839 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 2840 | |||
| 2841 | return inst_base; | ||
| 2842 | } | ||
| 2843 | |||
| 2844 | static ARM_INST_PTR INTERPRETER_TRANSLATE(teq)(unsigned int inst, int index) | ||
| 2845 | { | ||
| 2846 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(teq_inst)); | ||
| 2847 | teq_inst *inst_cream = (teq_inst *)inst_base->component; | ||
| 2848 | |||
| 2849 | inst_base->cond = BITS(inst, 28, 31); | ||
| 2850 | inst_base->idx = index; | ||
| 2851 | inst_base->br = NON_BRANCH; | ||
| 2852 | |||
| 2853 | inst_cream->I = BIT(inst, 25); | ||
| 2854 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 2855 | inst_cream->shifter_operand = BITS(inst, 0, 11); | ||
| 2856 | inst_cream->shtop_func = get_shtop(inst); | ||
| 2857 | |||
| 2858 | return inst_base; | ||
| 2859 | } | ||
| 2860 | static ARM_INST_PTR INTERPRETER_TRANSLATE(tst)(unsigned int inst, int index) | ||
| 2861 | { | ||
| 2862 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(tst_inst)); | ||
| 2863 | tst_inst *inst_cream = (tst_inst *)inst_base->component; | ||
| 2864 | |||
| 2865 | inst_base->cond = BITS(inst, 28, 31); | ||
| 2866 | inst_base->idx = index; | ||
| 2867 | inst_base->br = NON_BRANCH; | ||
| 2868 | |||
| 2869 | inst_cream->I = BIT(inst, 25); | ||
| 2870 | inst_cream->S = BIT(inst, 20); | ||
| 2871 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 2872 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 2873 | inst_cream->shifter_operand = BITS(inst, 0, 11); | ||
| 2874 | inst_cream->shtop_func = get_shtop(inst); | ||
| 2875 | |||
| 2876 | return inst_base; | ||
| 2877 | } | ||
| 2878 | |||
| 2879 | static ARM_INST_PTR INTERPRETER_TRANSLATE(uadd8)(unsigned int inst, int index) | ||
| 2880 | { | ||
| 2881 | arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst)); | ||
| 2882 | generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component; | ||
| 2883 | |||
| 2884 | inst_base->cond = BITS(inst, 28, 31); | ||
| 2885 | inst_base->idx = index; | ||
| 2886 | inst_base->br = NON_BRANCH; | ||
| 2887 | |||
| 2888 | inst_cream->op1 = BITS(inst, 20, 21); | ||
| 2889 | inst_cream->op2 = BITS(inst, 5, 7); | ||
| 2890 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 2891 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 2892 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 2893 | |||
| 2894 | return inst_base; | ||
| 2895 | } | ||
| 2896 | static ARM_INST_PTR INTERPRETER_TRANSLATE(uadd16)(unsigned int inst, int index) | ||
| 2897 | { | ||
| 2898 | return INTERPRETER_TRANSLATE(uadd8)(inst, index); | ||
| 2899 | } | ||
| 2900 | static ARM_INST_PTR INTERPRETER_TRANSLATE(uaddsubx)(unsigned int inst, int index) | ||
| 2901 | { | ||
| 2902 | return INTERPRETER_TRANSLATE(uadd8)(inst, index); | ||
| 2903 | } | ||
| 2904 | static ARM_INST_PTR INTERPRETER_TRANSLATE(usub8)(unsigned int inst, int index) | ||
| 2905 | { | ||
| 2906 | return INTERPRETER_TRANSLATE(uadd8)(inst, index); | ||
| 2907 | } | ||
| 2908 | static ARM_INST_PTR INTERPRETER_TRANSLATE(usub16)(unsigned int inst, int index) | ||
| 2909 | { | ||
| 2910 | return INTERPRETER_TRANSLATE(uadd8)(inst, index); | ||
| 2911 | } | ||
| 2912 | static ARM_INST_PTR INTERPRETER_TRANSLATE(usubaddx)(unsigned int inst, int index) | ||
| 2913 | { | ||
| 2914 | return INTERPRETER_TRANSLATE(uadd8)(inst, index); | ||
| 2915 | } | ||
| 2916 | |||
| 2917 | static ARM_INST_PTR INTERPRETER_TRANSLATE(uhadd8)(unsigned int inst, int index) | ||
| 2918 | { | ||
| 2919 | arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst)); | ||
| 2920 | generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component; | ||
| 2921 | |||
| 2922 | inst_base->cond = BITS(inst, 28, 31); | ||
| 2923 | inst_base->idx = index; | ||
| 2924 | inst_base->br = NON_BRANCH; | ||
| 2925 | |||
| 2926 | inst_cream->op1 = BITS(inst, 20, 21); | ||
| 2927 | inst_cream->op2 = BITS(inst, 5, 7); | ||
| 2928 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 2929 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 2930 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 2931 | |||
| 2932 | return inst_base; | ||
| 2933 | } | ||
| 2934 | static ARM_INST_PTR INTERPRETER_TRANSLATE(uhadd16)(unsigned int inst, int index) | ||
| 2935 | { | ||
| 2936 | return INTERPRETER_TRANSLATE(uhadd8)(inst, index); | ||
| 2937 | } | ||
| 2938 | static ARM_INST_PTR INTERPRETER_TRANSLATE(uhaddsubx)(unsigned int inst, int index) | ||
| 2939 | { | ||
| 2940 | return INTERPRETER_TRANSLATE(uhadd8)(inst, index); | ||
| 2941 | } | ||
| 2942 | static ARM_INST_PTR INTERPRETER_TRANSLATE(uhsub8)(unsigned int inst, int index) | ||
| 2943 | { | ||
| 2944 | return INTERPRETER_TRANSLATE(uhadd8)(inst, index); | ||
| 2945 | } | ||
| 2946 | static ARM_INST_PTR INTERPRETER_TRANSLATE(uhsub16)(unsigned int inst, int index) | ||
| 2947 | { | ||
| 2948 | return INTERPRETER_TRANSLATE(uhadd8)(inst, index); | ||
| 2949 | } | ||
| 2950 | static ARM_INST_PTR INTERPRETER_TRANSLATE(uhsubaddx)(unsigned int inst, int index) | ||
| 2951 | { | ||
| 2952 | return INTERPRETER_TRANSLATE(uhadd8)(inst, index); | ||
| 2953 | } | ||
| 2954 | static ARM_INST_PTR INTERPRETER_TRANSLATE(umaal)(unsigned int inst, int index) | ||
| 2955 | { | ||
| 2956 | arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(umaal_inst)); | ||
| 2957 | umaal_inst* const inst_cream = (umaal_inst*)inst_base->component; | ||
| 2958 | |||
| 2959 | inst_base->cond = BITS(inst, 28, 31); | ||
| 2960 | inst_base->idx = index; | ||
| 2961 | inst_base->br = NON_BRANCH; | ||
| 2962 | |||
| 2963 | inst_cream->Rm = BITS(inst, 8, 11); | ||
| 2964 | inst_cream->Rn = BITS(inst, 0, 3); | ||
| 2965 | inst_cream->RdLo = BITS(inst, 12, 15); | ||
| 2966 | inst_cream->RdHi = BITS(inst, 16, 19); | ||
| 2967 | |||
| 2968 | return inst_base; | ||
| 2969 | } | ||
| 2970 | static ARM_INST_PTR INTERPRETER_TRANSLATE(umlal)(unsigned int inst, int index) | ||
| 2971 | { | ||
| 2972 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(umlal_inst)); | ||
| 2973 | umlal_inst *inst_cream = (umlal_inst *)inst_base->component; | ||
| 2974 | |||
| 2975 | inst_base->cond = BITS(inst, 28, 31); | ||
| 2976 | inst_base->idx = index; | ||
| 2977 | inst_base->br = NON_BRANCH; | ||
| 2978 | |||
| 2979 | inst_cream->S = BIT(inst, 20); | ||
| 2980 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 2981 | inst_cream->Rs = BITS(inst, 8, 11); | ||
| 2982 | inst_cream->RdHi = BITS(inst, 16, 19); | ||
| 2983 | inst_cream->RdLo = BITS(inst, 12, 15); | ||
| 2984 | |||
| 2985 | return inst_base; | ||
| 2986 | } | ||
| 2987 | static ARM_INST_PTR INTERPRETER_TRANSLATE(umull)(unsigned int inst, int index) | ||
| 2988 | { | ||
| 2989 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(umull_inst)); | ||
| 2990 | umull_inst *inst_cream = (umull_inst *)inst_base->component; | ||
| 2991 | |||
| 2992 | inst_base->cond = BITS(inst, 28, 31); | ||
| 2993 | inst_base->idx = index; | ||
| 2994 | inst_base->br = NON_BRANCH; | ||
| 2995 | |||
| 2996 | inst_cream->S = BIT(inst, 20); | ||
| 2997 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 2998 | inst_cream->Rs = BITS(inst, 8, 11); | ||
| 2999 | inst_cream->RdHi = BITS(inst, 16, 19); | ||
| 3000 | inst_cream->RdLo = BITS(inst, 12, 15); | ||
| 3001 | |||
| 3002 | return inst_base; | ||
| 3003 | } | ||
| 3004 | |||
| 3005 | static ARM_INST_PTR INTERPRETER_TRANSLATE(b_2_thumb)(unsigned int tinst, int index) | ||
| 3006 | { | ||
| 3007 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(b_2_thumb)); | ||
| 3008 | b_2_thumb *inst_cream = (b_2_thumb *)inst_base->component; | ||
| 3009 | |||
| 3010 | inst_cream->imm = ((tinst & 0x3FF) << 1) | ((tinst & (1 << 10)) ? 0xFFFFF800 : 0); | ||
| 3011 | |||
| 3012 | inst_base->idx = index; | ||
| 3013 | inst_base->br = DIRECT_BRANCH; | ||
| 3014 | |||
| 3015 | return inst_base; | ||
| 3016 | } | ||
| 3017 | |||
| 3018 | static ARM_INST_PTR INTERPRETER_TRANSLATE(b_cond_thumb)(unsigned int tinst, int index) | ||
| 3019 | { | ||
| 3020 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(b_cond_thumb)); | ||
| 3021 | b_cond_thumb *inst_cream = (b_cond_thumb *)inst_base->component; | ||
| 3022 | |||
| 3023 | inst_cream->imm = (((tinst & 0x7F) << 1) | ((tinst & (1 << 7)) ? 0xFFFFFF00 : 0)); | ||
| 3024 | inst_cream->cond = ((tinst >> 8) & 0xf); | ||
| 3025 | inst_base->idx = index; | ||
| 3026 | inst_base->br = DIRECT_BRANCH; | ||
| 3027 | |||
| 3028 | return inst_base; | ||
| 3029 | } | ||
| 3030 | |||
| 3031 | static ARM_INST_PTR INTERPRETER_TRANSLATE(bl_1_thumb)(unsigned int tinst, int index) | ||
| 3032 | { | ||
| 3033 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(bl_1_thumb)); | ||
| 3034 | bl_1_thumb *inst_cream = (bl_1_thumb *)inst_base->component; | ||
| 3035 | |||
| 3036 | inst_cream->imm = (((tinst & 0x07FF) << 12) | ((tinst & (1 << 10)) ? 0xFF800000 : 0)); | ||
| 3037 | |||
| 3038 | inst_base->idx = index; | ||
| 3039 | inst_base->br = NON_BRANCH; | ||
| 3040 | return inst_base; | ||
| 3041 | } | ||
| 3042 | static ARM_INST_PTR INTERPRETER_TRANSLATE(bl_2_thumb)(unsigned int tinst, int index) | ||
| 3043 | { | ||
| 3044 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(bl_2_thumb)); | ||
| 3045 | bl_2_thumb *inst_cream = (bl_2_thumb *)inst_base->component; | ||
| 3046 | |||
| 3047 | inst_cream->imm = (tinst & 0x07FF) << 1; | ||
| 3048 | |||
| 3049 | inst_base->idx = index; | ||
| 3050 | inst_base->br = DIRECT_BRANCH; | ||
| 3051 | return inst_base; | ||
| 3052 | } | ||
| 3053 | static ARM_INST_PTR INTERPRETER_TRANSLATE(blx_1_thumb)(unsigned int tinst, int index) | ||
| 3054 | { | ||
| 3055 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(blx_1_thumb)); | ||
| 3056 | blx_1_thumb *inst_cream = (blx_1_thumb *)inst_base->component; | ||
| 3057 | |||
| 3058 | inst_cream->imm = (tinst & 0x07FF) << 1; | ||
| 3059 | inst_cream->instr = tinst; | ||
| 3060 | |||
| 3061 | inst_base->idx = index; | ||
| 3062 | inst_base->br = DIRECT_BRANCH; | ||
| 3063 | return inst_base; | ||
| 3064 | } | ||
| 3065 | |||
| 3066 | static ARM_INST_PTR INTERPRETER_TRANSLATE(uqadd8)(unsigned int inst, int index) | ||
| 3067 | { | ||
| 3068 | arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst)); | ||
| 3069 | generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component; | ||
| 3070 | |||
| 3071 | inst_base->cond = BITS(inst, 28, 31); | ||
| 3072 | inst_base->idx = index; | ||
| 3073 | inst_base->br = NON_BRANCH; | ||
| 3074 | |||
| 3075 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 3076 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 3077 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 3078 | inst_cream->op1 = BITS(inst, 20, 21); | ||
| 3079 | inst_cream->op2 = BITS(inst, 5, 7); | ||
| 3080 | |||
| 3081 | return inst_base; | ||
| 3082 | } | ||
| 3083 | static ARM_INST_PTR INTERPRETER_TRANSLATE(uqadd16)(unsigned int inst, int index) | ||
| 3084 | { | ||
| 3085 | return INTERPRETER_TRANSLATE(uqadd8)(inst, index); | ||
| 3086 | } | ||
| 3087 | static ARM_INST_PTR INTERPRETER_TRANSLATE(uqaddsubx)(unsigned int inst, int index) | ||
| 3088 | { | ||
| 3089 | return INTERPRETER_TRANSLATE(uqadd8)(inst, index); | ||
| 3090 | } | ||
| 3091 | static ARM_INST_PTR INTERPRETER_TRANSLATE(uqsub8)(unsigned int inst, int index) | ||
| 3092 | { | ||
| 3093 | return INTERPRETER_TRANSLATE(uqadd8)(inst, index); | ||
| 3094 | } | ||
| 3095 | static ARM_INST_PTR INTERPRETER_TRANSLATE(uqsub16)(unsigned int inst, int index) | ||
| 3096 | { | ||
| 3097 | return INTERPRETER_TRANSLATE(uqadd8)(inst, index); | ||
| 3098 | } | ||
| 3099 | static ARM_INST_PTR INTERPRETER_TRANSLATE(uqsubaddx)(unsigned int inst, int index) | ||
| 3100 | { | ||
| 3101 | return INTERPRETER_TRANSLATE(uqadd8)(inst, index); | ||
| 3102 | } | ||
| 3103 | static ARM_INST_PTR INTERPRETER_TRANSLATE(usada8)(unsigned int inst, int index) | ||
| 3104 | { | ||
| 3105 | arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst)); | ||
| 3106 | generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component; | ||
| 3107 | |||
| 3108 | inst_base->cond = BITS(inst, 28, 31); | ||
| 3109 | inst_base->idx = index; | ||
| 3110 | inst_base->br = NON_BRANCH; | ||
| 3111 | |||
| 3112 | inst_cream->op1 = BITS(inst, 20, 24); | ||
| 3113 | inst_cream->op2 = BITS(inst, 5, 7); | ||
| 3114 | inst_cream->Rd = BITS(inst, 16, 19); | ||
| 3115 | inst_cream->Rm = BITS(inst, 8, 11); | ||
| 3116 | inst_cream->Rn = BITS(inst, 0, 3); | ||
| 3117 | inst_cream->Ra = BITS(inst, 12, 15); | ||
| 3118 | |||
| 3119 | return inst_base; | ||
| 3120 | } | ||
| 3121 | static ARM_INST_PTR INTERPRETER_TRANSLATE(usad8)(unsigned int inst, int index) | ||
| 3122 | { | ||
| 3123 | return INTERPRETER_TRANSLATE(usada8)(inst, index); | ||
| 3124 | } | ||
| 3125 | static ARM_INST_PTR INTERPRETER_TRANSLATE(usat)(unsigned int inst, int index) | ||
| 3126 | { | ||
| 3127 | return INTERPRETER_TRANSLATE(ssat)(inst, index); | ||
| 3128 | } | ||
| 3129 | static ARM_INST_PTR INTERPRETER_TRANSLATE(usat16)(unsigned int inst, int index) | ||
| 3130 | { | ||
| 3131 | return INTERPRETER_TRANSLATE(ssat16)(inst, index); | ||
| 3132 | } | ||
| 3133 | |||
| 3134 | static ARM_INST_PTR INTERPRETER_TRANSLATE(uxtab16)(unsigned int inst, int index) | ||
| 3135 | { | ||
| 3136 | arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(uxtab_inst)); | ||
| 3137 | uxtab_inst* const inst_cream = (uxtab_inst*)inst_base->component; | ||
| 3138 | |||
| 3139 | inst_base->cond = BITS(inst, 28, 31); | ||
| 3140 | inst_base->idx = index; | ||
| 3141 | inst_base->br = NON_BRANCH; | ||
| 3142 | |||
| 3143 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 3144 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 3145 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 3146 | inst_cream->rotate = BITS(inst, 10, 11); | ||
| 3147 | |||
| 3148 | return inst_base; | ||
| 3149 | } | ||
| 3150 | static ARM_INST_PTR INTERPRETER_TRANSLATE(uxtb16)(unsigned int inst, int index) | ||
| 3151 | { | ||
| 3152 | return INTERPRETER_TRANSLATE(uxtab16)(inst, index); | ||
| 3153 | } | ||
| 3154 | |||
| 3155 | static ARM_INST_PTR INTERPRETER_TRANSLATE(wfe)(unsigned int inst, int index) | ||
| 3156 | { | ||
| 3157 | arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst)); | ||
| 3158 | |||
| 3159 | inst_base->cond = BITS(inst, 28, 31); | ||
| 3160 | inst_base->idx = index; | ||
| 3161 | inst_base->br = NON_BRANCH; | ||
| 3162 | |||
| 3163 | return inst_base; | ||
| 3164 | } | ||
| 3165 | static ARM_INST_PTR INTERPRETER_TRANSLATE(wfi)(unsigned int inst, int index) | ||
| 3166 | { | ||
| 3167 | arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst)); | ||
| 3168 | |||
| 3169 | inst_base->cond = BITS(inst, 28, 31); | ||
| 3170 | inst_base->idx = index; | ||
| 3171 | inst_base->br = NON_BRANCH; | ||
| 3172 | |||
| 3173 | return inst_base; | ||
| 3174 | } | ||
| 3175 | static ARM_INST_PTR INTERPRETER_TRANSLATE(yield)(unsigned int inst, int index) | ||
| 3176 | { | ||
| 3177 | arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst)); | ||
| 3178 | |||
| 3179 | inst_base->cond = BITS(inst, 28, 31); | ||
| 3180 | inst_base->idx = index; | ||
| 3181 | inst_base->br = NON_BRANCH; | ||
| 3182 | |||
| 3183 | return inst_base; | ||
| 3184 | } | 733 | } |
| 3185 | 734 | ||
| 3186 | // Floating point VFPv3 structures and instructions | ||
| 3187 | |||
| 3188 | #define VFP_INTERPRETER_STRUCT | ||
| 3189 | #include "core/arm/skyeye_common/vfp/vfpinstr.cpp" | ||
| 3190 | #undef VFP_INTERPRETER_STRUCT | ||
| 3191 | |||
| 3192 | #define VFP_INTERPRETER_TRANS | ||
| 3193 | #include "core/arm/skyeye_common/vfp/vfpinstr.cpp" | ||
| 3194 | #undef VFP_INTERPRETER_TRANS | ||
| 3195 | |||
| 3196 | typedef ARM_INST_PTR (*transop_fp_t)(unsigned int, int); | ||
| 3197 | |||
| 3198 | const transop_fp_t arm_instruction_trans[] = { | ||
| 3199 | INTERPRETER_TRANSLATE(vmla), | ||
| 3200 | INTERPRETER_TRANSLATE(vmls), | ||
| 3201 | INTERPRETER_TRANSLATE(vnmla), | ||
| 3202 | INTERPRETER_TRANSLATE(vnmls), | ||
| 3203 | INTERPRETER_TRANSLATE(vnmul), | ||
| 3204 | INTERPRETER_TRANSLATE(vmul), | ||
| 3205 | INTERPRETER_TRANSLATE(vadd), | ||
| 3206 | INTERPRETER_TRANSLATE(vsub), | ||
| 3207 | INTERPRETER_TRANSLATE(vdiv), | ||
| 3208 | INTERPRETER_TRANSLATE(vmovi), | ||
| 3209 | INTERPRETER_TRANSLATE(vmovr), | ||
| 3210 | INTERPRETER_TRANSLATE(vabs), | ||
| 3211 | INTERPRETER_TRANSLATE(vneg), | ||
| 3212 | INTERPRETER_TRANSLATE(vsqrt), | ||
| 3213 | INTERPRETER_TRANSLATE(vcmp), | ||
| 3214 | INTERPRETER_TRANSLATE(vcmp2), | ||
| 3215 | INTERPRETER_TRANSLATE(vcvtbds), | ||
| 3216 | INTERPRETER_TRANSLATE(vcvtbff), | ||
| 3217 | INTERPRETER_TRANSLATE(vcvtbfi), | ||
| 3218 | INTERPRETER_TRANSLATE(vmovbrs), | ||
| 3219 | INTERPRETER_TRANSLATE(vmsr), | ||
| 3220 | INTERPRETER_TRANSLATE(vmovbrc), | ||
| 3221 | INTERPRETER_TRANSLATE(vmrs), | ||
| 3222 | INTERPRETER_TRANSLATE(vmovbcr), | ||
| 3223 | INTERPRETER_TRANSLATE(vmovbrrss), | ||
| 3224 | INTERPRETER_TRANSLATE(vmovbrrd), | ||
| 3225 | INTERPRETER_TRANSLATE(vstr), | ||
| 3226 | INTERPRETER_TRANSLATE(vpush), | ||
| 3227 | INTERPRETER_TRANSLATE(vstm), | ||
| 3228 | INTERPRETER_TRANSLATE(vpop), | ||
| 3229 | INTERPRETER_TRANSLATE(vldr), | ||
| 3230 | INTERPRETER_TRANSLATE(vldm), | ||
| 3231 | |||
| 3232 | INTERPRETER_TRANSLATE(srs), | ||
| 3233 | INTERPRETER_TRANSLATE(rfe), | ||
| 3234 | INTERPRETER_TRANSLATE(bkpt), | ||
| 3235 | INTERPRETER_TRANSLATE(blx), | ||
| 3236 | INTERPRETER_TRANSLATE(cps), | ||
| 3237 | INTERPRETER_TRANSLATE(pld), | ||
| 3238 | INTERPRETER_TRANSLATE(setend), | ||
| 3239 | INTERPRETER_TRANSLATE(clrex), | ||
| 3240 | INTERPRETER_TRANSLATE(rev16), | ||
| 3241 | INTERPRETER_TRANSLATE(usad8), | ||
| 3242 | INTERPRETER_TRANSLATE(sxtb), | ||
| 3243 | INTERPRETER_TRANSLATE(uxtb), | ||
| 3244 | INTERPRETER_TRANSLATE(sxth), | ||
| 3245 | INTERPRETER_TRANSLATE(sxtb16), | ||
| 3246 | INTERPRETER_TRANSLATE(uxth), | ||
| 3247 | INTERPRETER_TRANSLATE(uxtb16), | ||
| 3248 | INTERPRETER_TRANSLATE(cpy), | ||
| 3249 | INTERPRETER_TRANSLATE(uxtab), | ||
| 3250 | INTERPRETER_TRANSLATE(ssub8), | ||
| 3251 | INTERPRETER_TRANSLATE(shsub8), | ||
| 3252 | INTERPRETER_TRANSLATE(ssubaddx), | ||
| 3253 | INTERPRETER_TRANSLATE(strex), | ||
| 3254 | INTERPRETER_TRANSLATE(strexb), | ||
| 3255 | INTERPRETER_TRANSLATE(swp), | ||
| 3256 | INTERPRETER_TRANSLATE(swpb), | ||
| 3257 | INTERPRETER_TRANSLATE(ssub16), | ||
| 3258 | INTERPRETER_TRANSLATE(ssat16), | ||
| 3259 | INTERPRETER_TRANSLATE(shsubaddx), | ||
| 3260 | INTERPRETER_TRANSLATE(qsubaddx), | ||
| 3261 | INTERPRETER_TRANSLATE(shaddsubx), | ||
| 3262 | INTERPRETER_TRANSLATE(shadd8), | ||
| 3263 | INTERPRETER_TRANSLATE(shadd16), | ||
| 3264 | INTERPRETER_TRANSLATE(sel), | ||
| 3265 | INTERPRETER_TRANSLATE(saddsubx), | ||
| 3266 | INTERPRETER_TRANSLATE(sadd8), | ||
| 3267 | INTERPRETER_TRANSLATE(sadd16), | ||
| 3268 | INTERPRETER_TRANSLATE(shsub16), | ||
| 3269 | INTERPRETER_TRANSLATE(umaal), | ||
| 3270 | INTERPRETER_TRANSLATE(uxtab16), | ||
| 3271 | INTERPRETER_TRANSLATE(usubaddx), | ||
| 3272 | INTERPRETER_TRANSLATE(usub8), | ||
| 3273 | INTERPRETER_TRANSLATE(usub16), | ||
| 3274 | INTERPRETER_TRANSLATE(usat16), | ||
| 3275 | INTERPRETER_TRANSLATE(usada8), | ||
| 3276 | INTERPRETER_TRANSLATE(uqsubaddx), | ||
| 3277 | INTERPRETER_TRANSLATE(uqsub8), | ||
| 3278 | INTERPRETER_TRANSLATE(uqsub16), | ||
| 3279 | INTERPRETER_TRANSLATE(uqaddsubx), | ||
| 3280 | INTERPRETER_TRANSLATE(uqadd8), | ||
| 3281 | INTERPRETER_TRANSLATE(uqadd16), | ||
| 3282 | INTERPRETER_TRANSLATE(sxtab), | ||
| 3283 | INTERPRETER_TRANSLATE(uhsubaddx), | ||
| 3284 | INTERPRETER_TRANSLATE(uhsub8), | ||
| 3285 | INTERPRETER_TRANSLATE(uhsub16), | ||
| 3286 | INTERPRETER_TRANSLATE(uhaddsubx), | ||
| 3287 | INTERPRETER_TRANSLATE(uhadd8), | ||
| 3288 | INTERPRETER_TRANSLATE(uhadd16), | ||
| 3289 | INTERPRETER_TRANSLATE(uaddsubx), | ||
| 3290 | INTERPRETER_TRANSLATE(uadd8), | ||
| 3291 | INTERPRETER_TRANSLATE(uadd16), | ||
| 3292 | INTERPRETER_TRANSLATE(sxtah), | ||
| 3293 | INTERPRETER_TRANSLATE(sxtab16), | ||
| 3294 | INTERPRETER_TRANSLATE(qadd8), | ||
| 3295 | INTERPRETER_TRANSLATE(bxj), | ||
| 3296 | INTERPRETER_TRANSLATE(clz), | ||
| 3297 | INTERPRETER_TRANSLATE(uxtah), | ||
| 3298 | INTERPRETER_TRANSLATE(bx), | ||
| 3299 | INTERPRETER_TRANSLATE(rev), | ||
| 3300 | INTERPRETER_TRANSLATE(blx), | ||
| 3301 | INTERPRETER_TRANSLATE(revsh), | ||
| 3302 | INTERPRETER_TRANSLATE(qadd), | ||
| 3303 | INTERPRETER_TRANSLATE(qadd16), | ||
| 3304 | INTERPRETER_TRANSLATE(qaddsubx), | ||
| 3305 | INTERPRETER_TRANSLATE(ldrex), | ||
| 3306 | INTERPRETER_TRANSLATE(qdadd), | ||
| 3307 | INTERPRETER_TRANSLATE(qdsub), | ||
| 3308 | INTERPRETER_TRANSLATE(qsub), | ||
| 3309 | INTERPRETER_TRANSLATE(ldrexb), | ||
| 3310 | INTERPRETER_TRANSLATE(qsub8), | ||
| 3311 | INTERPRETER_TRANSLATE(qsub16), | ||
| 3312 | INTERPRETER_TRANSLATE(smuad), | ||
| 3313 | INTERPRETER_TRANSLATE(smmul), | ||
| 3314 | INTERPRETER_TRANSLATE(smusd), | ||
| 3315 | INTERPRETER_TRANSLATE(smlsd), | ||
| 3316 | INTERPRETER_TRANSLATE(smlsld), | ||
| 3317 | INTERPRETER_TRANSLATE(smmla), | ||
| 3318 | INTERPRETER_TRANSLATE(smmls), | ||
| 3319 | INTERPRETER_TRANSLATE(smlald), | ||
| 3320 | INTERPRETER_TRANSLATE(smlad), | ||
| 3321 | INTERPRETER_TRANSLATE(smlaw), | ||
| 3322 | INTERPRETER_TRANSLATE(smulw), | ||
| 3323 | INTERPRETER_TRANSLATE(pkhtb), | ||
| 3324 | INTERPRETER_TRANSLATE(pkhbt), | ||
| 3325 | INTERPRETER_TRANSLATE(smul), | ||
| 3326 | INTERPRETER_TRANSLATE(smlalxy), | ||
| 3327 | INTERPRETER_TRANSLATE(smla), | ||
| 3328 | INTERPRETER_TRANSLATE(mcrr), | ||
| 3329 | INTERPRETER_TRANSLATE(mrrc), | ||
| 3330 | INTERPRETER_TRANSLATE(cmp), | ||
| 3331 | INTERPRETER_TRANSLATE(tst), | ||
| 3332 | INTERPRETER_TRANSLATE(teq), | ||
| 3333 | INTERPRETER_TRANSLATE(cmn), | ||
| 3334 | INTERPRETER_TRANSLATE(smull), | ||
| 3335 | INTERPRETER_TRANSLATE(umull), | ||
| 3336 | INTERPRETER_TRANSLATE(umlal), | ||
| 3337 | INTERPRETER_TRANSLATE(smlal), | ||
| 3338 | INTERPRETER_TRANSLATE(mul), | ||
| 3339 | INTERPRETER_TRANSLATE(mla), | ||
| 3340 | INTERPRETER_TRANSLATE(ssat), | ||
| 3341 | INTERPRETER_TRANSLATE(usat), | ||
| 3342 | INTERPRETER_TRANSLATE(mrs), | ||
| 3343 | INTERPRETER_TRANSLATE(msr), | ||
| 3344 | INTERPRETER_TRANSLATE(and), | ||
| 3345 | INTERPRETER_TRANSLATE(bic), | ||
| 3346 | INTERPRETER_TRANSLATE(ldm), | ||
| 3347 | INTERPRETER_TRANSLATE(eor), | ||
| 3348 | INTERPRETER_TRANSLATE(add), | ||
| 3349 | INTERPRETER_TRANSLATE(rsb), | ||
| 3350 | INTERPRETER_TRANSLATE(rsc), | ||
| 3351 | INTERPRETER_TRANSLATE(sbc), | ||
| 3352 | INTERPRETER_TRANSLATE(adc), | ||
| 3353 | INTERPRETER_TRANSLATE(sub), | ||
| 3354 | INTERPRETER_TRANSLATE(orr), | ||
| 3355 | INTERPRETER_TRANSLATE(mvn), | ||
| 3356 | INTERPRETER_TRANSLATE(mov), | ||
| 3357 | INTERPRETER_TRANSLATE(stm), | ||
| 3358 | INTERPRETER_TRANSLATE(ldm), | ||
| 3359 | INTERPRETER_TRANSLATE(ldrsh), | ||
| 3360 | INTERPRETER_TRANSLATE(stm), | ||
| 3361 | INTERPRETER_TRANSLATE(ldm), | ||
| 3362 | INTERPRETER_TRANSLATE(ldrsb), | ||
| 3363 | INTERPRETER_TRANSLATE(strd), | ||
| 3364 | INTERPRETER_TRANSLATE(ldrh), | ||
| 3365 | INTERPRETER_TRANSLATE(strh), | ||
| 3366 | INTERPRETER_TRANSLATE(ldrd), | ||
| 3367 | INTERPRETER_TRANSLATE(strt), | ||
| 3368 | INTERPRETER_TRANSLATE(strbt), | ||
| 3369 | INTERPRETER_TRANSLATE(ldrbt), | ||
| 3370 | INTERPRETER_TRANSLATE(ldrt), | ||
| 3371 | INTERPRETER_TRANSLATE(mrc), | ||
| 3372 | INTERPRETER_TRANSLATE(mcr), | ||
| 3373 | INTERPRETER_TRANSLATE(msr), | ||
| 3374 | INTERPRETER_TRANSLATE(msr), | ||
| 3375 | INTERPRETER_TRANSLATE(msr), | ||
| 3376 | INTERPRETER_TRANSLATE(msr), | ||
| 3377 | INTERPRETER_TRANSLATE(msr), | ||
| 3378 | INTERPRETER_TRANSLATE(ldrb), | ||
| 3379 | INTERPRETER_TRANSLATE(strb), | ||
| 3380 | INTERPRETER_TRANSLATE(ldr), | ||
| 3381 | INTERPRETER_TRANSLATE(ldrcond), | ||
| 3382 | INTERPRETER_TRANSLATE(str), | ||
| 3383 | INTERPRETER_TRANSLATE(cdp), | ||
| 3384 | INTERPRETER_TRANSLATE(stc), | ||
| 3385 | INTERPRETER_TRANSLATE(ldc), | ||
| 3386 | INTERPRETER_TRANSLATE(ldrexd), | ||
| 3387 | INTERPRETER_TRANSLATE(strexd), | ||
| 3388 | INTERPRETER_TRANSLATE(ldrexh), | ||
| 3389 | INTERPRETER_TRANSLATE(strexh), | ||
| 3390 | INTERPRETER_TRANSLATE(nop), | ||
| 3391 | INTERPRETER_TRANSLATE(yield), | ||
| 3392 | INTERPRETER_TRANSLATE(wfe), | ||
| 3393 | INTERPRETER_TRANSLATE(wfi), | ||
| 3394 | INTERPRETER_TRANSLATE(sev), | ||
| 3395 | INTERPRETER_TRANSLATE(swi), | ||
| 3396 | INTERPRETER_TRANSLATE(bbl), | ||
| 3397 | |||
| 3398 | // All the thumb instructions should be placed the end of table | ||
| 3399 | INTERPRETER_TRANSLATE(b_2_thumb), | ||
| 3400 | INTERPRETER_TRANSLATE(b_cond_thumb), | ||
| 3401 | INTERPRETER_TRANSLATE(bl_1_thumb), | ||
| 3402 | INTERPRETER_TRANSLATE(bl_2_thumb), | ||
| 3403 | INTERPRETER_TRANSLATE(blx_1_thumb) | ||
| 3404 | }; | ||
| 3405 | |||
| 3406 | enum { | 735 | enum { |
| 3407 | FETCH_SUCCESS, | 736 | FETCH_SUCCESS, |
| 3408 | FETCH_FAILURE | 737 | FETCH_FAILURE |
| @@ -3413,7 +742,7 @@ static ThumbDecodeStatus DecodeThumbInstruction(u32 inst, u32 addr, u32* arm_ins | |||
| 3413 | ThumbDecodeStatus ret = TranslateThumbInstruction (addr, inst, arm_inst, inst_size); | 742 | ThumbDecodeStatus ret = TranslateThumbInstruction (addr, inst, arm_inst, inst_size); |
| 3414 | if (ret == ThumbDecodeStatus::BRANCH) { | 743 | if (ret == ThumbDecodeStatus::BRANCH) { |
| 3415 | int inst_index; | 744 | int inst_index; |
| 3416 | int table_length = sizeof(arm_instruction_trans) / sizeof(transop_fp_t); | 745 | int table_length = arm_instruction_trans_len; |
| 3417 | u32 tinstr = GetThumbInstruction(inst, addr); | 746 | u32 tinstr = GetThumbInstruction(inst, addr); |
| 3418 | 747 | ||
| 3419 | switch ((tinstr & 0xF800) >> 11) { | 748 | switch ((tinstr & 0xF800) >> 11) { |
| @@ -3499,14 +828,14 @@ static int InterpreterTranslateBlock(ARMul_State* cpu, int& bb_start, u32 addr) | |||
| 3499 | // Go on next, until terminal instruction | 828 | // Go on next, until terminal instruction |
| 3500 | // Save start addr of basicblock in CreamCache | 829 | // Save start addr of basicblock in CreamCache |
| 3501 | ARM_INST_PTR inst_base = nullptr; | 830 | ARM_INST_PTR inst_base = nullptr; |
| 3502 | int ret = NON_BRANCH; | 831 | TransExtData ret = TransExtData::NON_BRANCH; |
| 3503 | int size = 0; // instruction size of basic block | 832 | int size = 0; // instruction size of basic block |
| 3504 | bb_start = top; | 833 | bb_start = trans_cache_buf_top; |
| 3505 | 834 | ||
| 3506 | u32 phys_addr = addr; | 835 | u32 phys_addr = addr; |
| 3507 | u32 pc_start = cpu->Reg[15]; | 836 | u32 pc_start = cpu->Reg[15]; |
| 3508 | 837 | ||
| 3509 | while (ret == NON_BRANCH) { | 838 | while (ret == TransExtData::NON_BRANCH) { |
| 3510 | unsigned int inst_size = InterpreterTranslateInstruction(cpu, phys_addr, inst_base); | 839 | unsigned int inst_size = InterpreterTranslateInstruction(cpu, phys_addr, inst_base); |
| 3511 | 840 | ||
| 3512 | size++; | 841 | size++; |
| @@ -3514,7 +843,7 @@ static int InterpreterTranslateBlock(ARMul_State* cpu, int& bb_start, u32 addr) | |||
| 3514 | phys_addr += inst_size; | 843 | phys_addr += inst_size; |
| 3515 | 844 | ||
| 3516 | if ((phys_addr & 0xfff) == 0) { | 845 | if ((phys_addr & 0xfff) == 0) { |
| 3517 | inst_base->br = END_OF_PAGE; | 846 | inst_base->br = TransExtData::END_OF_PAGE; |
| 3518 | } | 847 | } |
| 3519 | ret = inst_base->br; | 848 | ret = inst_base->br; |
| 3520 | }; | 849 | }; |
| @@ -3528,15 +857,15 @@ static int InterpreterTranslateSingle(ARMul_State* cpu, int& bb_start, u32 addr) | |||
| 3528 | MICROPROFILE_SCOPE(DynCom_Decode); | 857 | MICROPROFILE_SCOPE(DynCom_Decode); |
| 3529 | 858 | ||
| 3530 | ARM_INST_PTR inst_base = nullptr; | 859 | ARM_INST_PTR inst_base = nullptr; |
| 3531 | bb_start = top; | 860 | bb_start = trans_cache_buf_top; |
| 3532 | 861 | ||
| 3533 | u32 phys_addr = addr; | 862 | u32 phys_addr = addr; |
| 3534 | u32 pc_start = cpu->Reg[15]; | 863 | u32 pc_start = cpu->Reg[15]; |
| 3535 | 864 | ||
| 3536 | InterpreterTranslateInstruction(cpu, phys_addr, inst_base); | 865 | InterpreterTranslateInstruction(cpu, phys_addr, inst_base); |
| 3537 | 866 | ||
| 3538 | if (inst_base->br == NON_BRANCH) { | 867 | if (inst_base->br == TransExtData::NON_BRANCH) { |
| 3539 | inst_base->br = SINGLE_STEP; | 868 | inst_base->br = TransExtData::SINGLE_STEP; |
| 3540 | } | 869 | } |
| 3541 | 870 | ||
| 3542 | cpu->instruction_cache[pc_start] = bb_start; | 871 | cpu->instruction_cache[pc_start] = bb_start; |
| @@ -3581,8 +910,8 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) { | |||
| 3581 | #define SET_PC (cpu->Reg[15] = cpu->Reg[15] + 8 + inst_cream->signed_immed_24) | 910 | #define SET_PC (cpu->Reg[15] = cpu->Reg[15] + 8 + inst_cream->signed_immed_24) |
| 3582 | #define SHIFTER_OPERAND inst_cream->shtop_func(cpu, inst_cream->shifter_operand) | 911 | #define SHIFTER_OPERAND inst_cream->shtop_func(cpu, inst_cream->shifter_operand) |
| 3583 | 912 | ||
| 3584 | #define FETCH_INST if (inst_base->br != NON_BRANCH) goto DISPATCH; \ | 913 | #define FETCH_INST if (inst_base->br != TransExtData::NON_BRANCH) goto DISPATCH; \ |
| 3585 | inst_base = (arm_inst *)&inst_buf[ptr] | 914 | inst_base = (arm_inst *)&trans_cache_buf[ptr] |
| 3586 | 915 | ||
| 3587 | #define INC_PC(l) ptr += sizeof(arm_inst) + l | 916 | #define INC_PC(l) ptr += sizeof(arm_inst) + l |
| 3588 | #define INC_PC_STUB ptr += sizeof(arm_inst) | 917 | #define INC_PC_STUB ptr += sizeof(arm_inst) |
| @@ -3905,7 +1234,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) { | |||
| 3905 | breakpoint_data = GDBStub::GetNextBreakpointFromAddress(cpu->Reg[15], GDBStub::BreakpointType::Execute); | 1234 | breakpoint_data = GDBStub::GetNextBreakpointFromAddress(cpu->Reg[15], GDBStub::BreakpointType::Execute); |
| 3906 | } | 1235 | } |
| 3907 | 1236 | ||
| 3908 | inst_base = (arm_inst *)&inst_buf[ptr]; | 1237 | inst_base = (arm_inst *)&trans_cache_buf[ptr]; |
| 3909 | GOTO_NEXT_INST; | 1238 | GOTO_NEXT_INST; |
| 3910 | } | 1239 | } |
| 3911 | ADC_INST: | 1240 | ADC_INST: |
diff --git a/src/core/arm/dyncom/arm_dyncom_trans.cpp b/src/core/arm/dyncom/arm_dyncom_trans.cpp new file mode 100644 index 000000000..00b42c246 --- /dev/null +++ b/src/core/arm/dyncom/arm_dyncom_trans.cpp | |||
| @@ -0,0 +1,2178 @@ | |||
| 1 | #include <cstdlib> | ||
| 2 | |||
| 3 | #include "common/assert.h" | ||
| 4 | #include "common/common_types.h" | ||
| 5 | |||
| 6 | #include "core/arm/dyncom/arm_dyncom_interpreter.h" | ||
| 7 | #include "core/arm/dyncom/arm_dyncom_trans.h" | ||
| 8 | #include "core/arm/skyeye_common/armstate.h" | ||
| 9 | #include "core/arm/skyeye_common/armsupp.h" | ||
| 10 | #include "core/arm/skyeye_common/vfp/vfp.h" | ||
| 11 | |||
| 12 | char trans_cache_buf[TRANS_CACHE_SIZE]; | ||
| 13 | size_t trans_cache_buf_top = 0; | ||
| 14 | |||
| 15 | static void* AllocBuffer(size_t size) { | ||
| 16 | size_t start = trans_cache_buf_top; | ||
| 17 | trans_cache_buf_top += size; | ||
| 18 | ASSERT_MSG(trans_cache_buf_top <= TRANS_CACHE_SIZE, "Translation cache is full!"); | ||
| 19 | return static_cast<void*>(&trans_cache_buf[start]); | ||
| 20 | } | ||
| 21 | |||
| 22 | #define glue(x, y) x ## y | ||
| 23 | #define INTERPRETER_TRANSLATE(s) glue(InterpreterTranslate_, s) | ||
| 24 | |||
| 25 | shtop_fp_t GetShifterOp(unsigned int inst); | ||
| 26 | get_addr_fp_t GetAddressingOp(unsigned int inst); | ||
| 27 | get_addr_fp_t GetAddressingOpLoadStoreT(unsigned int inst); | ||
| 28 | |||
| 29 | static ARM_INST_PTR INTERPRETER_TRANSLATE(adc)(unsigned int inst, int index) | ||
| 30 | { | ||
| 31 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(adc_inst)); | ||
| 32 | adc_inst *inst_cream = (adc_inst *)inst_base->component; | ||
| 33 | |||
| 34 | inst_base->cond = BITS(inst, 28, 31); | ||
| 35 | inst_base->idx = index; | ||
| 36 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 37 | |||
| 38 | inst_cream->I = BIT(inst, 25); | ||
| 39 | inst_cream->S = BIT(inst, 20); | ||
| 40 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 41 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 42 | inst_cream->shifter_operand = BITS(inst, 0, 11); | ||
| 43 | inst_cream->shtop_func = GetShifterOp(inst); | ||
| 44 | |||
| 45 | if (inst_cream->Rd == 15) | ||
| 46 | inst_base->br = TransExtData::INDIRECT_BRANCH; | ||
| 47 | |||
| 48 | return inst_base; | ||
| 49 | } | ||
| 50 | static ARM_INST_PTR INTERPRETER_TRANSLATE(add)(unsigned int inst, int index) | ||
| 51 | { | ||
| 52 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(add_inst)); | ||
| 53 | add_inst *inst_cream = (add_inst *)inst_base->component; | ||
| 54 | |||
| 55 | inst_base->cond = BITS(inst, 28, 31); | ||
| 56 | inst_base->idx = index; | ||
| 57 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 58 | |||
| 59 | inst_cream->I = BIT(inst, 25); | ||
| 60 | inst_cream->S = BIT(inst, 20); | ||
| 61 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 62 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 63 | inst_cream->shifter_operand = BITS(inst, 0, 11); | ||
| 64 | inst_cream->shtop_func = GetShifterOp(inst); | ||
| 65 | |||
| 66 | if (inst_cream->Rd == 15) | ||
| 67 | inst_base->br = TransExtData::INDIRECT_BRANCH; | ||
| 68 | |||
| 69 | return inst_base; | ||
| 70 | } | ||
| 71 | static ARM_INST_PTR INTERPRETER_TRANSLATE(and)(unsigned int inst, int index) | ||
| 72 | { | ||
| 73 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(and_inst)); | ||
| 74 | and_inst *inst_cream = (and_inst *)inst_base->component; | ||
| 75 | |||
| 76 | inst_base->cond = BITS(inst, 28, 31); | ||
| 77 | inst_base->idx = index; | ||
| 78 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 79 | |||
| 80 | inst_cream->I = BIT(inst, 25); | ||
| 81 | inst_cream->S = BIT(inst, 20); | ||
| 82 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 83 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 84 | inst_cream->shifter_operand = BITS(inst, 0, 11); | ||
| 85 | inst_cream->shtop_func = GetShifterOp(inst); | ||
| 86 | |||
| 87 | if (inst_cream->Rd == 15) | ||
| 88 | inst_base->br = TransExtData::INDIRECT_BRANCH; | ||
| 89 | |||
| 90 | return inst_base; | ||
| 91 | } | ||
| 92 | static ARM_INST_PTR INTERPRETER_TRANSLATE(bbl)(unsigned int inst, int index) | ||
| 93 | { | ||
| 94 | #define POSBRANCH ((inst & 0x7fffff) << 2) | ||
| 95 | #define NEGBRANCH ((0xff000000 |(inst & 0xffffff)) << 2) | ||
| 96 | |||
| 97 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(bbl_inst)); | ||
| 98 | bbl_inst *inst_cream = (bbl_inst *)inst_base->component; | ||
| 99 | |||
| 100 | inst_base->cond = BITS(inst, 28, 31); | ||
| 101 | inst_base->idx = index; | ||
| 102 | inst_base->br = TransExtData::DIRECT_BRANCH; | ||
| 103 | |||
| 104 | if (BIT(inst, 24)) | ||
| 105 | inst_base->br = TransExtData::CALL; | ||
| 106 | |||
| 107 | inst_cream->L = BIT(inst, 24); | ||
| 108 | inst_cream->signed_immed_24 = BIT(inst, 23) ? NEGBRANCH : POSBRANCH; | ||
| 109 | |||
| 110 | return inst_base; | ||
| 111 | } | ||
| 112 | static ARM_INST_PTR INTERPRETER_TRANSLATE(bic)(unsigned int inst, int index) | ||
| 113 | { | ||
| 114 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(bic_inst)); | ||
| 115 | bic_inst *inst_cream = (bic_inst *)inst_base->component; | ||
| 116 | |||
| 117 | inst_base->cond = BITS(inst, 28, 31); | ||
| 118 | inst_base->idx = index; | ||
| 119 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 120 | |||
| 121 | inst_cream->I = BIT(inst, 25); | ||
| 122 | inst_cream->S = BIT(inst, 20); | ||
| 123 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 124 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 125 | inst_cream->shifter_operand = BITS(inst, 0, 11); | ||
| 126 | inst_cream->shtop_func = GetShifterOp(inst); | ||
| 127 | |||
| 128 | if (inst_cream->Rd == 15) | ||
| 129 | inst_base->br = TransExtData::INDIRECT_BRANCH; | ||
| 130 | return inst_base; | ||
| 131 | } | ||
| 132 | |||
| 133 | static ARM_INST_PTR INTERPRETER_TRANSLATE(bkpt)(unsigned int inst, int index) | ||
| 134 | { | ||
| 135 | arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(bkpt_inst)); | ||
| 136 | bkpt_inst* const inst_cream = (bkpt_inst*)inst_base->component; | ||
| 137 | |||
| 138 | inst_base->cond = BITS(inst, 28, 31); | ||
| 139 | inst_base->idx = index; | ||
| 140 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 141 | |||
| 142 | inst_cream->imm = (BITS(inst, 8, 19) << 4) | BITS(inst, 0, 3); | ||
| 143 | |||
| 144 | return inst_base; | ||
| 145 | } | ||
| 146 | |||
| 147 | static ARM_INST_PTR INTERPRETER_TRANSLATE(blx)(unsigned int inst, int index) | ||
| 148 | { | ||
| 149 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(blx_inst)); | ||
| 150 | blx_inst *inst_cream = (blx_inst *)inst_base->component; | ||
| 151 | |||
| 152 | inst_base->cond = BITS(inst, 28, 31); | ||
| 153 | inst_base->idx = index; | ||
| 154 | inst_base->br = TransExtData::INDIRECT_BRANCH; | ||
| 155 | |||
| 156 | inst_cream->inst = inst; | ||
| 157 | if (BITS(inst, 20, 27) == 0x12 && BITS(inst, 4, 7) == 0x3) { | ||
| 158 | inst_cream->val.Rm = BITS(inst, 0, 3); | ||
| 159 | } else { | ||
| 160 | inst_cream->val.signed_immed_24 = BITS(inst, 0, 23); | ||
| 161 | } | ||
| 162 | |||
| 163 | return inst_base; | ||
| 164 | } | ||
| 165 | static ARM_INST_PTR INTERPRETER_TRANSLATE(bx)(unsigned int inst, int index) | ||
| 166 | { | ||
| 167 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(bx_inst)); | ||
| 168 | bx_inst *inst_cream = (bx_inst *)inst_base->component; | ||
| 169 | |||
| 170 | inst_base->cond = BITS(inst, 28, 31); | ||
| 171 | inst_base->idx = index; | ||
| 172 | inst_base->br = TransExtData::INDIRECT_BRANCH; | ||
| 173 | |||
| 174 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 175 | |||
| 176 | return inst_base; | ||
| 177 | } | ||
| 178 | static ARM_INST_PTR INTERPRETER_TRANSLATE(bxj)(unsigned int inst, int index) | ||
| 179 | { | ||
| 180 | return INTERPRETER_TRANSLATE(bx)(inst, index); | ||
| 181 | } | ||
| 182 | |||
| 183 | static ARM_INST_PTR INTERPRETER_TRANSLATE(cdp)(unsigned int inst, int index) { | ||
| 184 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(cdp_inst)); | ||
| 185 | cdp_inst *inst_cream = (cdp_inst *)inst_base->component; | ||
| 186 | |||
| 187 | inst_base->cond = BITS(inst, 28, 31); | ||
| 188 | inst_base->idx = index; | ||
| 189 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 190 | |||
| 191 | inst_cream->CRm = BITS(inst, 0, 3); | ||
| 192 | inst_cream->CRd = BITS(inst, 12, 15); | ||
| 193 | inst_cream->CRn = BITS(inst, 16, 19); | ||
| 194 | inst_cream->cp_num = BITS(inst, 8, 11); | ||
| 195 | inst_cream->opcode_2 = BITS(inst, 5, 7); | ||
| 196 | inst_cream->opcode_1 = BITS(inst, 20, 23); | ||
| 197 | inst_cream->inst = inst; | ||
| 198 | |||
| 199 | LOG_TRACE(Core_ARM11, "inst %x index %x", inst, index); | ||
| 200 | return inst_base; | ||
| 201 | } | ||
| 202 | static ARM_INST_PTR INTERPRETER_TRANSLATE(clrex)(unsigned int inst, int index) | ||
| 203 | { | ||
| 204 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(clrex_inst)); | ||
| 205 | inst_base->cond = BITS(inst, 28, 31); | ||
| 206 | inst_base->idx = index; | ||
| 207 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 208 | |||
| 209 | return inst_base; | ||
| 210 | } | ||
| 211 | static ARM_INST_PTR INTERPRETER_TRANSLATE(clz)(unsigned int inst, int index) | ||
| 212 | { | ||
| 213 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(clz_inst)); | ||
| 214 | clz_inst *inst_cream = (clz_inst *)inst_base->component; | ||
| 215 | |||
| 216 | inst_base->cond = BITS(inst, 28, 31); | ||
| 217 | inst_base->idx = index; | ||
| 218 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 219 | |||
| 220 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 221 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 222 | |||
| 223 | return inst_base; | ||
| 224 | } | ||
| 225 | static ARM_INST_PTR INTERPRETER_TRANSLATE(cmn)(unsigned int inst, int index) | ||
| 226 | { | ||
| 227 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(cmn_inst)); | ||
| 228 | cmn_inst *inst_cream = (cmn_inst *)inst_base->component; | ||
| 229 | |||
| 230 | inst_base->cond = BITS(inst, 28, 31); | ||
| 231 | inst_base->idx = index; | ||
| 232 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 233 | |||
| 234 | inst_cream->I = BIT(inst, 25); | ||
| 235 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 236 | inst_cream->shifter_operand = BITS(inst, 0, 11); | ||
| 237 | inst_cream->shtop_func = GetShifterOp(inst); | ||
| 238 | |||
| 239 | return inst_base; | ||
| 240 | } | ||
| 241 | static ARM_INST_PTR INTERPRETER_TRANSLATE(cmp)(unsigned int inst, int index) | ||
| 242 | { | ||
| 243 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(cmp_inst)); | ||
| 244 | cmp_inst *inst_cream = (cmp_inst *)inst_base->component; | ||
| 245 | |||
| 246 | inst_base->cond = BITS(inst, 28, 31); | ||
| 247 | inst_base->idx = index; | ||
| 248 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 249 | |||
| 250 | inst_cream->I = BIT(inst, 25); | ||
| 251 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 252 | inst_cream->shifter_operand = BITS(inst, 0, 11); | ||
| 253 | inst_cream->shtop_func = GetShifterOp(inst); | ||
| 254 | |||
| 255 | return inst_base; | ||
| 256 | } | ||
| 257 | static ARM_INST_PTR INTERPRETER_TRANSLATE(cps)(unsigned int inst, int index) | ||
| 258 | { | ||
| 259 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(cps_inst)); | ||
| 260 | cps_inst *inst_cream = (cps_inst *)inst_base->component; | ||
| 261 | |||
| 262 | inst_base->cond = BITS(inst, 28, 31); | ||
| 263 | inst_base->idx = index; | ||
| 264 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 265 | |||
| 266 | inst_cream->imod0 = BIT(inst, 18); | ||
| 267 | inst_cream->imod1 = BIT(inst, 19); | ||
| 268 | inst_cream->mmod = BIT(inst, 17); | ||
| 269 | inst_cream->A = BIT(inst, 8); | ||
| 270 | inst_cream->I = BIT(inst, 7); | ||
| 271 | inst_cream->F = BIT(inst, 6); | ||
| 272 | inst_cream->mode = BITS(inst, 0, 4); | ||
| 273 | |||
| 274 | return inst_base; | ||
| 275 | } | ||
| 276 | static ARM_INST_PTR INTERPRETER_TRANSLATE(cpy)(unsigned int inst, int index) | ||
| 277 | { | ||
| 278 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(mov_inst)); | ||
| 279 | mov_inst *inst_cream = (mov_inst *)inst_base->component; | ||
| 280 | |||
| 281 | inst_base->cond = BITS(inst, 28, 31); | ||
| 282 | inst_base->idx = index; | ||
| 283 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 284 | |||
| 285 | inst_cream->I = BIT(inst, 25); | ||
| 286 | inst_cream->S = BIT(inst, 20); | ||
| 287 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 288 | inst_cream->shifter_operand = BITS(inst, 0, 11); | ||
| 289 | inst_cream->shtop_func = GetShifterOp(inst); | ||
| 290 | |||
| 291 | if (inst_cream->Rd == 15) { | ||
| 292 | inst_base->br = TransExtData::INDIRECT_BRANCH; | ||
| 293 | } | ||
| 294 | return inst_base; | ||
| 295 | } | ||
| 296 | static ARM_INST_PTR INTERPRETER_TRANSLATE(eor)(unsigned int inst, int index) | ||
| 297 | { | ||
| 298 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(eor_inst)); | ||
| 299 | eor_inst *inst_cream = (eor_inst *)inst_base->component; | ||
| 300 | |||
| 301 | inst_base->cond = BITS(inst, 28, 31); | ||
| 302 | inst_base->idx = index; | ||
| 303 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 304 | |||
| 305 | inst_cream->I = BIT(inst, 25); | ||
| 306 | inst_cream->S = BIT(inst, 20); | ||
| 307 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 308 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 309 | inst_cream->shifter_operand = BITS(inst, 0, 11); | ||
| 310 | inst_cream->shtop_func = GetShifterOp(inst); | ||
| 311 | |||
| 312 | if (inst_cream->Rd == 15) | ||
| 313 | inst_base->br = TransExtData::INDIRECT_BRANCH; | ||
| 314 | |||
| 315 | return inst_base; | ||
| 316 | } | ||
| 317 | static ARM_INST_PTR INTERPRETER_TRANSLATE(ldc)(unsigned int inst, int index) | ||
| 318 | { | ||
| 319 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldc_inst)); | ||
| 320 | inst_base->cond = BITS(inst, 28, 31); | ||
| 321 | inst_base->idx = index; | ||
| 322 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 323 | |||
| 324 | return inst_base; | ||
| 325 | } | ||
| 326 | static ARM_INST_PTR INTERPRETER_TRANSLATE(ldm)(unsigned int inst, int index) | ||
| 327 | { | ||
| 328 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); | ||
| 329 | ldst_inst *inst_cream = (ldst_inst *)inst_base->component; | ||
| 330 | |||
| 331 | inst_base->cond = BITS(inst, 28, 31); | ||
| 332 | inst_base->idx = index; | ||
| 333 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 334 | |||
| 335 | inst_cream->inst = inst; | ||
| 336 | inst_cream->get_addr = GetAddressingOp(inst); | ||
| 337 | |||
| 338 | if (BIT(inst, 15)) { | ||
| 339 | inst_base->br = TransExtData::INDIRECT_BRANCH; | ||
| 340 | } | ||
| 341 | return inst_base; | ||
| 342 | } | ||
| 343 | static ARM_INST_PTR INTERPRETER_TRANSLATE(sxth)(unsigned int inst, int index) | ||
| 344 | { | ||
| 345 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(sxtb_inst)); | ||
| 346 | sxtb_inst *inst_cream = (sxtb_inst *)inst_base->component; | ||
| 347 | |||
| 348 | inst_base->cond = BITS(inst, 28, 31); | ||
| 349 | inst_base->idx = index; | ||
| 350 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 351 | |||
| 352 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 353 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 354 | inst_cream->rotate = BITS(inst, 10, 11); | ||
| 355 | |||
| 356 | return inst_base; | ||
| 357 | } | ||
| 358 | static ARM_INST_PTR INTERPRETER_TRANSLATE(ldr)(unsigned int inst, int index) | ||
| 359 | { | ||
| 360 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); | ||
| 361 | ldst_inst *inst_cream = (ldst_inst *)inst_base->component; | ||
| 362 | |||
| 363 | inst_base->cond = BITS(inst, 28, 31); | ||
| 364 | inst_base->idx = index; | ||
| 365 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 366 | |||
| 367 | inst_cream->inst = inst; | ||
| 368 | inst_cream->get_addr = GetAddressingOp(inst); | ||
| 369 | |||
| 370 | if (BITS(inst, 12, 15) == 15) | ||
| 371 | inst_base->br = TransExtData::INDIRECT_BRANCH; | ||
| 372 | |||
| 373 | return inst_base; | ||
| 374 | } | ||
| 375 | |||
| 376 | static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrcond)(unsigned int inst, int index) | ||
| 377 | { | ||
| 378 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); | ||
| 379 | ldst_inst *inst_cream = (ldst_inst *)inst_base->component; | ||
| 380 | |||
| 381 | inst_base->cond = BITS(inst, 28, 31); | ||
| 382 | inst_base->idx = index; | ||
| 383 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 384 | |||
| 385 | inst_cream->inst = inst; | ||
| 386 | inst_cream->get_addr = GetAddressingOp(inst); | ||
| 387 | |||
| 388 | if (BITS(inst, 12, 15) == 15) | ||
| 389 | inst_base->br = TransExtData::INDIRECT_BRANCH; | ||
| 390 | |||
| 391 | return inst_base; | ||
| 392 | } | ||
| 393 | |||
| 394 | static ARM_INST_PTR INTERPRETER_TRANSLATE(uxth)(unsigned int inst, int index) | ||
| 395 | { | ||
| 396 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(uxth_inst)); | ||
| 397 | uxth_inst *inst_cream = (uxth_inst *)inst_base->component; | ||
| 398 | |||
| 399 | inst_base->cond = BITS(inst, 28, 31); | ||
| 400 | inst_base->idx = index; | ||
| 401 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 402 | |||
| 403 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 404 | inst_cream->rotate = BITS(inst, 10, 11); | ||
| 405 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 406 | |||
| 407 | return inst_base; | ||
| 408 | } | ||
| 409 | static ARM_INST_PTR INTERPRETER_TRANSLATE(uxtah)(unsigned int inst, int index) | ||
| 410 | { | ||
| 411 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(uxtah_inst)); | ||
| 412 | uxtah_inst *inst_cream = (uxtah_inst *)inst_base->component; | ||
| 413 | |||
| 414 | inst_base->cond = BITS(inst, 28, 31); | ||
| 415 | inst_base->idx = index; | ||
| 416 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 417 | |||
| 418 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 419 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 420 | inst_cream->rotate = BITS(inst, 10, 11); | ||
| 421 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 422 | |||
| 423 | return inst_base; | ||
| 424 | } | ||
| 425 | static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrb)(unsigned int inst, int index) | ||
| 426 | { | ||
| 427 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); | ||
| 428 | ldst_inst *inst_cream = (ldst_inst *)inst_base->component; | ||
| 429 | |||
| 430 | inst_base->cond = BITS(inst, 28, 31); | ||
| 431 | inst_base->idx = index; | ||
| 432 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 433 | |||
| 434 | inst_cream->inst = inst; | ||
| 435 | inst_cream->get_addr = GetAddressingOp(inst); | ||
| 436 | |||
| 437 | return inst_base; | ||
| 438 | } | ||
| 439 | static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrbt)(unsigned int inst, int index) | ||
| 440 | { | ||
| 441 | arm_inst* inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); | ||
| 442 | ldst_inst* inst_cream = (ldst_inst*)inst_base->component; | ||
| 443 | |||
| 444 | inst_base->cond = BITS(inst, 28, 31); | ||
| 445 | inst_base->idx = index; | ||
| 446 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 447 | |||
| 448 | inst_cream->inst = inst; | ||
| 449 | inst_cream->get_addr = GetAddressingOpLoadStoreT(inst); | ||
| 450 | |||
| 451 | return inst_base; | ||
| 452 | } | ||
| 453 | static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrd)(unsigned int inst, int index) | ||
| 454 | { | ||
| 455 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); | ||
| 456 | ldst_inst *inst_cream = (ldst_inst *)inst_base->component; | ||
| 457 | |||
| 458 | inst_base->cond = BITS(inst, 28, 31); | ||
| 459 | inst_base->idx = index; | ||
| 460 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 461 | |||
| 462 | inst_cream->inst = inst; | ||
| 463 | inst_cream->get_addr = GetAddressingOp(inst); | ||
| 464 | |||
| 465 | return inst_base; | ||
| 466 | } | ||
| 467 | static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrex)(unsigned int inst, int index) | ||
| 468 | { | ||
| 469 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst)); | ||
| 470 | generic_arm_inst *inst_cream = (generic_arm_inst *)inst_base->component; | ||
| 471 | |||
| 472 | inst_base->cond = BITS(inst, 28, 31); | ||
| 473 | inst_base->idx = index; | ||
| 474 | inst_base->br = (BITS(inst, 12, 15) == 15) ? TransExtData::INDIRECT_BRANCH : TransExtData::NON_BRANCH; // Branch if dest is R15 | ||
| 475 | |||
| 476 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 477 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 478 | |||
| 479 | return inst_base; | ||
| 480 | } | ||
| 481 | static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrexb)(unsigned int inst, int index) | ||
| 482 | { | ||
| 483 | return INTERPRETER_TRANSLATE(ldrex)(inst, index); | ||
| 484 | } | ||
| 485 | static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrexh)(unsigned int inst, int index) | ||
| 486 | { | ||
| 487 | return INTERPRETER_TRANSLATE(ldrex)(inst, index); | ||
| 488 | } | ||
| 489 | static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrexd)(unsigned int inst, int index) | ||
| 490 | { | ||
| 491 | return INTERPRETER_TRANSLATE(ldrex)(inst, index); | ||
| 492 | } | ||
| 493 | static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrh)(unsigned int inst, int index) | ||
| 494 | { | ||
| 495 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); | ||
| 496 | ldst_inst *inst_cream = (ldst_inst *)inst_base->component; | ||
| 497 | |||
| 498 | inst_base->cond = BITS(inst, 28, 31); | ||
| 499 | inst_base->idx = index; | ||
| 500 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 501 | |||
| 502 | inst_cream->inst = inst; | ||
| 503 | inst_cream->get_addr = GetAddressingOp(inst); | ||
| 504 | |||
| 505 | return inst_base; | ||
| 506 | } | ||
| 507 | static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrsb)(unsigned int inst, int index) | ||
| 508 | { | ||
| 509 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); | ||
| 510 | ldst_inst *inst_cream = (ldst_inst *)inst_base->component; | ||
| 511 | |||
| 512 | inst_base->cond = BITS(inst, 28, 31); | ||
| 513 | inst_base->idx = index; | ||
| 514 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 515 | |||
| 516 | inst_cream->inst = inst; | ||
| 517 | inst_cream->get_addr = GetAddressingOp(inst); | ||
| 518 | |||
| 519 | return inst_base; | ||
| 520 | } | ||
| 521 | static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrsh)(unsigned int inst, int index) | ||
| 522 | { | ||
| 523 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); | ||
| 524 | ldst_inst *inst_cream = (ldst_inst *)inst_base->component; | ||
| 525 | |||
| 526 | inst_base->cond = BITS(inst, 28, 31); | ||
| 527 | inst_base->idx = index; | ||
| 528 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 529 | |||
| 530 | inst_cream->inst = inst; | ||
| 531 | inst_cream->get_addr = GetAddressingOp(inst); | ||
| 532 | |||
| 533 | return inst_base; | ||
| 534 | } | ||
| 535 | static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrt)(unsigned int inst, int index) | ||
| 536 | { | ||
| 537 | arm_inst* inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); | ||
| 538 | ldst_inst* inst_cream = (ldst_inst*)inst_base->component; | ||
| 539 | |||
| 540 | inst_base->cond = BITS(inst, 28, 31); | ||
| 541 | inst_base->idx = index; | ||
| 542 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 543 | |||
| 544 | inst_cream->inst = inst; | ||
| 545 | inst_cream->get_addr = GetAddressingOpLoadStoreT(inst); | ||
| 546 | |||
| 547 | if (BITS(inst, 12, 15) == 15) { | ||
| 548 | inst_base->br = TransExtData::INDIRECT_BRANCH; | ||
| 549 | } | ||
| 550 | return inst_base; | ||
| 551 | } | ||
| 552 | static ARM_INST_PTR INTERPRETER_TRANSLATE(mcr)(unsigned int inst, int index) | ||
| 553 | { | ||
| 554 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(mcr_inst)); | ||
| 555 | mcr_inst *inst_cream = (mcr_inst *)inst_base->component; | ||
| 556 | inst_base->cond = BITS(inst, 28, 31); | ||
| 557 | inst_base->idx = index; | ||
| 558 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 559 | |||
| 560 | inst_cream->crn = BITS(inst, 16, 19); | ||
| 561 | inst_cream->crm = BITS(inst, 0, 3); | ||
| 562 | inst_cream->opcode_1 = BITS(inst, 21, 23); | ||
| 563 | inst_cream->opcode_2 = BITS(inst, 5, 7); | ||
| 564 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 565 | inst_cream->cp_num = BITS(inst, 8, 11); | ||
| 566 | inst_cream->inst = inst; | ||
| 567 | return inst_base; | ||
| 568 | } | ||
| 569 | |||
| 570 | static ARM_INST_PTR INTERPRETER_TRANSLATE(mcrr)(unsigned int inst, int index) | ||
| 571 | { | ||
| 572 | arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(mcrr_inst)); | ||
| 573 | mcrr_inst* const inst_cream = (mcrr_inst*)inst_base->component; | ||
| 574 | |||
| 575 | inst_base->cond = BITS(inst, 28, 31); | ||
| 576 | inst_base->idx = index; | ||
| 577 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 578 | |||
| 579 | inst_cream->crm = BITS(inst, 0, 3); | ||
| 580 | inst_cream->opcode_1 = BITS(inst, 4, 7); | ||
| 581 | inst_cream->cp_num = BITS(inst, 8, 11); | ||
| 582 | inst_cream->rt = BITS(inst, 12, 15); | ||
| 583 | inst_cream->rt2 = BITS(inst, 16, 19); | ||
| 584 | |||
| 585 | return inst_base; | ||
| 586 | } | ||
| 587 | |||
| 588 | static ARM_INST_PTR INTERPRETER_TRANSLATE(mla)(unsigned int inst, int index) | ||
| 589 | { | ||
| 590 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(mla_inst)); | ||
| 591 | mla_inst *inst_cream = (mla_inst *)inst_base->component; | ||
| 592 | |||
| 593 | inst_base->cond = BITS(inst, 28, 31); | ||
| 594 | inst_base->idx = index; | ||
| 595 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 596 | |||
| 597 | inst_cream->S = BIT(inst, 20); | ||
| 598 | inst_cream->Rn = BITS(inst, 12, 15); | ||
| 599 | inst_cream->Rd = BITS(inst, 16, 19); | ||
| 600 | inst_cream->Rs = BITS(inst, 8, 11); | ||
| 601 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 602 | |||
| 603 | return inst_base; | ||
| 604 | } | ||
| 605 | static ARM_INST_PTR INTERPRETER_TRANSLATE(mov)(unsigned int inst, int index) | ||
| 606 | { | ||
| 607 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(mov_inst)); | ||
| 608 | mov_inst *inst_cream = (mov_inst *)inst_base->component; | ||
| 609 | |||
| 610 | inst_base->cond = BITS(inst, 28, 31); | ||
| 611 | inst_base->idx = index; | ||
| 612 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 613 | |||
| 614 | inst_cream->I = BIT(inst, 25); | ||
| 615 | inst_cream->S = BIT(inst, 20); | ||
| 616 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 617 | inst_cream->shifter_operand = BITS(inst, 0, 11); | ||
| 618 | inst_cream->shtop_func = GetShifterOp(inst); | ||
| 619 | |||
| 620 | if (inst_cream->Rd == 15) { | ||
| 621 | inst_base->br = TransExtData::INDIRECT_BRANCH; | ||
| 622 | } | ||
| 623 | return inst_base; | ||
| 624 | } | ||
| 625 | static ARM_INST_PTR INTERPRETER_TRANSLATE(mrc)(unsigned int inst, int index) | ||
| 626 | { | ||
| 627 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(mrc_inst)); | ||
| 628 | mrc_inst *inst_cream = (mrc_inst *)inst_base->component; | ||
| 629 | inst_base->cond = BITS(inst, 28, 31); | ||
| 630 | inst_base->idx = index; | ||
| 631 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 632 | |||
| 633 | inst_cream->crn = BITS(inst, 16, 19); | ||
| 634 | inst_cream->crm = BITS(inst, 0, 3); | ||
| 635 | inst_cream->opcode_1 = BITS(inst, 21, 23); | ||
| 636 | inst_cream->opcode_2 = BITS(inst, 5, 7); | ||
| 637 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 638 | inst_cream->cp_num = BITS(inst, 8, 11); | ||
| 639 | inst_cream->inst = inst; | ||
| 640 | return inst_base; | ||
| 641 | } | ||
| 642 | |||
| 643 | static ARM_INST_PTR INTERPRETER_TRANSLATE(mrrc)(unsigned int inst, int index) | ||
| 644 | { | ||
| 645 | return INTERPRETER_TRANSLATE(mcrr)(inst, index); | ||
| 646 | } | ||
| 647 | |||
| 648 | static ARM_INST_PTR INTERPRETER_TRANSLATE(mrs)(unsigned int inst, int index) | ||
| 649 | { | ||
| 650 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(mrs_inst)); | ||
| 651 | mrs_inst *inst_cream = (mrs_inst *)inst_base->component; | ||
| 652 | |||
| 653 | inst_base->cond = BITS(inst, 28, 31); | ||
| 654 | inst_base->idx = index; | ||
| 655 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 656 | |||
| 657 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 658 | inst_cream->R = BIT(inst, 22); | ||
| 659 | |||
| 660 | return inst_base; | ||
| 661 | } | ||
| 662 | static ARM_INST_PTR INTERPRETER_TRANSLATE(msr)(unsigned int inst, int index) | ||
| 663 | { | ||
| 664 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(msr_inst)); | ||
| 665 | msr_inst *inst_cream = (msr_inst *)inst_base->component; | ||
| 666 | |||
| 667 | inst_base->cond = BITS(inst, 28, 31); | ||
| 668 | inst_base->idx = index; | ||
| 669 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 670 | |||
| 671 | inst_cream->field_mask = BITS(inst, 16, 19); | ||
| 672 | inst_cream->R = BIT(inst, 22); | ||
| 673 | inst_cream->inst = inst; | ||
| 674 | |||
| 675 | return inst_base; | ||
| 676 | } | ||
| 677 | static ARM_INST_PTR INTERPRETER_TRANSLATE(mul)(unsigned int inst, int index) | ||
| 678 | { | ||
| 679 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(mul_inst)); | ||
| 680 | mul_inst *inst_cream = (mul_inst *)inst_base->component; | ||
| 681 | |||
| 682 | inst_base->cond = BITS(inst, 28, 31); | ||
| 683 | inst_base->idx = index; | ||
| 684 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 685 | |||
| 686 | inst_cream->S = BIT(inst, 20); | ||
| 687 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 688 | inst_cream->Rs = BITS(inst, 8, 11); | ||
| 689 | inst_cream->Rd = BITS(inst, 16, 19); | ||
| 690 | |||
| 691 | return inst_base; | ||
| 692 | } | ||
| 693 | static ARM_INST_PTR INTERPRETER_TRANSLATE(mvn)(unsigned int inst, int index) | ||
| 694 | { | ||
| 695 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(mvn_inst)); | ||
| 696 | mvn_inst *inst_cream = (mvn_inst *)inst_base->component; | ||
| 697 | |||
| 698 | inst_base->cond = BITS(inst, 28, 31); | ||
| 699 | inst_base->idx = index; | ||
| 700 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 701 | |||
| 702 | inst_cream->I = BIT(inst, 25); | ||
| 703 | inst_cream->S = BIT(inst, 20); | ||
| 704 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 705 | inst_cream->shifter_operand = BITS(inst, 0, 11); | ||
| 706 | inst_cream->shtop_func = GetShifterOp(inst); | ||
| 707 | |||
| 708 | if (inst_cream->Rd == 15) { | ||
| 709 | inst_base->br = TransExtData::INDIRECT_BRANCH; | ||
| 710 | } | ||
| 711 | return inst_base; | ||
| 712 | |||
| 713 | } | ||
| 714 | static ARM_INST_PTR INTERPRETER_TRANSLATE(orr)(unsigned int inst, int index) | ||
| 715 | { | ||
| 716 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(orr_inst)); | ||
| 717 | orr_inst *inst_cream = (orr_inst *)inst_base->component; | ||
| 718 | |||
| 719 | inst_base->cond = BITS(inst, 28, 31); | ||
| 720 | inst_base->idx = index; | ||
| 721 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 722 | |||
| 723 | inst_cream->I = BIT(inst, 25); | ||
| 724 | inst_cream->S = BIT(inst, 20); | ||
| 725 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 726 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 727 | inst_cream->shifter_operand = BITS(inst, 0, 11); | ||
| 728 | inst_cream->shtop_func = GetShifterOp(inst); | ||
| 729 | |||
| 730 | if (inst_cream->Rd == 15) | ||
| 731 | inst_base->br = TransExtData::INDIRECT_BRANCH; | ||
| 732 | |||
| 733 | return inst_base; | ||
| 734 | } | ||
| 735 | |||
| 736 | // NOP introduced in ARMv6K. | ||
| 737 | static ARM_INST_PTR INTERPRETER_TRANSLATE(nop)(unsigned int inst, int index) | ||
| 738 | { | ||
| 739 | arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst)); | ||
| 740 | |||
| 741 | inst_base->cond = BITS(inst, 28, 31); | ||
| 742 | inst_base->idx = index; | ||
| 743 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 744 | |||
| 745 | return inst_base; | ||
| 746 | } | ||
| 747 | |||
| 748 | static ARM_INST_PTR INTERPRETER_TRANSLATE(pkhbt)(unsigned int inst, int index) | ||
| 749 | { | ||
| 750 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(pkh_inst)); | ||
| 751 | pkh_inst *inst_cream = (pkh_inst *)inst_base->component; | ||
| 752 | |||
| 753 | inst_base->cond = BITS(inst, 28, 31); | ||
| 754 | inst_base->idx = index; | ||
| 755 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 756 | |||
| 757 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 758 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 759 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 760 | inst_cream->imm = BITS(inst, 7, 11); | ||
| 761 | |||
| 762 | return inst_base; | ||
| 763 | } | ||
| 764 | |||
| 765 | static ARM_INST_PTR INTERPRETER_TRANSLATE(pkhtb)(unsigned int inst, int index) | ||
| 766 | { | ||
| 767 | return INTERPRETER_TRANSLATE(pkhbt)(inst, index); | ||
| 768 | } | ||
| 769 | |||
| 770 | static ARM_INST_PTR INTERPRETER_TRANSLATE(pld)(unsigned int inst, int index) | ||
| 771 | { | ||
| 772 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(pld_inst)); | ||
| 773 | |||
| 774 | inst_base->cond = BITS(inst, 28, 31); | ||
| 775 | inst_base->idx = index; | ||
| 776 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 777 | |||
| 778 | return inst_base; | ||
| 779 | } | ||
| 780 | |||
| 781 | static ARM_INST_PTR INTERPRETER_TRANSLATE(qadd)(unsigned int inst, int index) | ||
| 782 | { | ||
| 783 | arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst)); | ||
| 784 | generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component; | ||
| 785 | |||
| 786 | inst_base->cond = BITS(inst, 28, 31); | ||
| 787 | inst_base->idx = index; | ||
| 788 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 789 | |||
| 790 | inst_cream->op1 = BITS(inst, 21, 22); | ||
| 791 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 792 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 793 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 794 | |||
| 795 | return inst_base; | ||
| 796 | } | ||
| 797 | static ARM_INST_PTR INTERPRETER_TRANSLATE(qdadd)(unsigned int inst, int index) | ||
| 798 | { | ||
| 799 | return INTERPRETER_TRANSLATE(qadd)(inst, index); | ||
| 800 | } | ||
| 801 | static ARM_INST_PTR INTERPRETER_TRANSLATE(qdsub)(unsigned int inst, int index) | ||
| 802 | { | ||
| 803 | return INTERPRETER_TRANSLATE(qadd)(inst, index); | ||
| 804 | } | ||
| 805 | static ARM_INST_PTR INTERPRETER_TRANSLATE(qsub)(unsigned int inst, int index) | ||
| 806 | { | ||
| 807 | return INTERPRETER_TRANSLATE(qadd)(inst, index); | ||
| 808 | } | ||
| 809 | |||
| 810 | static ARM_INST_PTR INTERPRETER_TRANSLATE(qadd8)(unsigned int inst, int index) | ||
| 811 | { | ||
| 812 | arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst)); | ||
| 813 | generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component; | ||
| 814 | |||
| 815 | inst_base->cond = BITS(inst, 28, 31); | ||
| 816 | inst_base->idx = index; | ||
| 817 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 818 | |||
| 819 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 820 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 821 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 822 | inst_cream->op1 = BITS(inst, 20, 21); | ||
| 823 | inst_cream->op2 = BITS(inst, 5, 7); | ||
| 824 | |||
| 825 | return inst_base; | ||
| 826 | } | ||
| 827 | static ARM_INST_PTR INTERPRETER_TRANSLATE(qadd16)(unsigned int inst, int index) | ||
| 828 | { | ||
| 829 | return INTERPRETER_TRANSLATE(qadd8)(inst, index); | ||
| 830 | } | ||
| 831 | static ARM_INST_PTR INTERPRETER_TRANSLATE(qaddsubx)(unsigned int inst, int index) | ||
| 832 | { | ||
| 833 | return INTERPRETER_TRANSLATE(qadd8)(inst, index); | ||
| 834 | } | ||
| 835 | static ARM_INST_PTR INTERPRETER_TRANSLATE(qsub8)(unsigned int inst, int index) | ||
| 836 | { | ||
| 837 | return INTERPRETER_TRANSLATE(qadd8)(inst, index); | ||
| 838 | } | ||
| 839 | static ARM_INST_PTR INTERPRETER_TRANSLATE(qsub16)(unsigned int inst, int index) | ||
| 840 | { | ||
| 841 | return INTERPRETER_TRANSLATE(qadd8)(inst, index); | ||
| 842 | } | ||
| 843 | static ARM_INST_PTR INTERPRETER_TRANSLATE(qsubaddx)(unsigned int inst, int index) | ||
| 844 | { | ||
| 845 | return INTERPRETER_TRANSLATE(qadd8)(inst, index); | ||
| 846 | } | ||
| 847 | |||
| 848 | static ARM_INST_PTR INTERPRETER_TRANSLATE(rev)(unsigned int inst, int index) | ||
| 849 | { | ||
| 850 | arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(rev_inst)); | ||
| 851 | rev_inst* const inst_cream = (rev_inst*)inst_base->component; | ||
| 852 | |||
| 853 | inst_base->cond = BITS(inst, 28, 31); | ||
| 854 | inst_base->idx = index; | ||
| 855 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 856 | |||
| 857 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 858 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 859 | inst_cream->op1 = BITS(inst, 20, 22); | ||
| 860 | inst_cream->op2 = BITS(inst, 5, 7); | ||
| 861 | |||
| 862 | return inst_base; | ||
| 863 | } | ||
| 864 | static ARM_INST_PTR INTERPRETER_TRANSLATE(rev16)(unsigned int inst, int index) | ||
| 865 | { | ||
| 866 | return INTERPRETER_TRANSLATE(rev)(inst, index); | ||
| 867 | } | ||
| 868 | static ARM_INST_PTR INTERPRETER_TRANSLATE(revsh)(unsigned int inst, int index) | ||
| 869 | { | ||
| 870 | return INTERPRETER_TRANSLATE(rev)(inst, index); | ||
| 871 | } | ||
| 872 | |||
| 873 | static ARM_INST_PTR INTERPRETER_TRANSLATE(rfe)(unsigned int inst, int index) | ||
| 874 | { | ||
| 875 | arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); | ||
| 876 | ldst_inst* const inst_cream = (ldst_inst*)inst_base->component; | ||
| 877 | |||
| 878 | inst_base->cond = AL; | ||
| 879 | inst_base->idx = index; | ||
| 880 | inst_base->br = TransExtData::INDIRECT_BRANCH; | ||
| 881 | |||
| 882 | inst_cream->inst = inst; | ||
| 883 | inst_cream->get_addr = GetAddressingOp(inst); | ||
| 884 | |||
| 885 | return inst_base; | ||
| 886 | } | ||
| 887 | |||
| 888 | static ARM_INST_PTR INTERPRETER_TRANSLATE(rsb)(unsigned int inst, int index) | ||
| 889 | { | ||
| 890 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(rsb_inst)); | ||
| 891 | rsb_inst *inst_cream = (rsb_inst *)inst_base->component; | ||
| 892 | |||
| 893 | inst_base->cond = BITS(inst, 28, 31); | ||
| 894 | inst_base->idx = index; | ||
| 895 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 896 | |||
| 897 | inst_cream->I = BIT(inst, 25); | ||
| 898 | inst_cream->S = BIT(inst, 20); | ||
| 899 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 900 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 901 | inst_cream->shifter_operand = BITS(inst, 0, 11); | ||
| 902 | inst_cream->shtop_func = GetShifterOp(inst); | ||
| 903 | |||
| 904 | if (inst_cream->Rd == 15) | ||
| 905 | inst_base->br = TransExtData::INDIRECT_BRANCH; | ||
| 906 | |||
| 907 | return inst_base; | ||
| 908 | } | ||
| 909 | static ARM_INST_PTR INTERPRETER_TRANSLATE(rsc)(unsigned int inst, int index) | ||
| 910 | { | ||
| 911 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(rsc_inst)); | ||
| 912 | rsc_inst *inst_cream = (rsc_inst *)inst_base->component; | ||
| 913 | |||
| 914 | inst_base->cond = BITS(inst, 28, 31); | ||
| 915 | inst_base->idx = index; | ||
| 916 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 917 | |||
| 918 | inst_cream->I = BIT(inst, 25); | ||
| 919 | inst_cream->S = BIT(inst, 20); | ||
| 920 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 921 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 922 | inst_cream->shifter_operand = BITS(inst, 0, 11); | ||
| 923 | inst_cream->shtop_func = GetShifterOp(inst); | ||
| 924 | |||
| 925 | if (inst_cream->Rd == 15) | ||
| 926 | inst_base->br = TransExtData::INDIRECT_BRANCH; | ||
| 927 | |||
| 928 | return inst_base; | ||
| 929 | } | ||
| 930 | static ARM_INST_PTR INTERPRETER_TRANSLATE(sadd8)(unsigned int inst, int index) | ||
| 931 | { | ||
| 932 | arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst)); | ||
| 933 | generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component; | ||
| 934 | |||
| 935 | inst_base->cond = BITS(inst, 28, 31); | ||
| 936 | inst_base->idx = index; | ||
| 937 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 938 | |||
| 939 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 940 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 941 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 942 | inst_cream->op1 = BITS(inst, 20, 21); | ||
| 943 | inst_cream->op2 = BITS(inst, 5, 7); | ||
| 944 | |||
| 945 | return inst_base; | ||
| 946 | } | ||
| 947 | static ARM_INST_PTR INTERPRETER_TRANSLATE(sadd16)(unsigned int inst, int index) | ||
| 948 | { | ||
| 949 | return INTERPRETER_TRANSLATE(sadd8)(inst, index); | ||
| 950 | } | ||
| 951 | static ARM_INST_PTR INTERPRETER_TRANSLATE(saddsubx)(unsigned int inst, int index) | ||
| 952 | { | ||
| 953 | return INTERPRETER_TRANSLATE(sadd8)(inst, index); | ||
| 954 | } | ||
| 955 | static ARM_INST_PTR INTERPRETER_TRANSLATE(ssub8)(unsigned int inst, int index) | ||
| 956 | { | ||
| 957 | return INTERPRETER_TRANSLATE(sadd8)(inst, index); | ||
| 958 | } | ||
| 959 | static ARM_INST_PTR INTERPRETER_TRANSLATE(ssub16)(unsigned int inst, int index) | ||
| 960 | { | ||
| 961 | return INTERPRETER_TRANSLATE(sadd8)(inst, index); | ||
| 962 | } | ||
| 963 | static ARM_INST_PTR INTERPRETER_TRANSLATE(ssubaddx)(unsigned int inst, int index) | ||
| 964 | { | ||
| 965 | return INTERPRETER_TRANSLATE(sadd8)(inst, index); | ||
| 966 | } | ||
| 967 | |||
| 968 | static ARM_INST_PTR INTERPRETER_TRANSLATE(sbc)(unsigned int inst, int index) | ||
| 969 | { | ||
| 970 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(sbc_inst)); | ||
| 971 | sbc_inst *inst_cream = (sbc_inst *)inst_base->component; | ||
| 972 | |||
| 973 | inst_base->cond = BITS(inst, 28, 31); | ||
| 974 | inst_base->idx = index; | ||
| 975 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 976 | |||
| 977 | inst_cream->I = BIT(inst, 25); | ||
| 978 | inst_cream->S = BIT(inst, 20); | ||
| 979 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 980 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 981 | inst_cream->shifter_operand = BITS(inst, 0, 11); | ||
| 982 | inst_cream->shtop_func = GetShifterOp(inst); | ||
| 983 | |||
| 984 | if (inst_cream->Rd == 15) | ||
| 985 | inst_base->br = TransExtData::INDIRECT_BRANCH; | ||
| 986 | |||
| 987 | return inst_base; | ||
| 988 | } | ||
| 989 | static ARM_INST_PTR INTERPRETER_TRANSLATE(sel)(unsigned int inst, int index) | ||
| 990 | { | ||
| 991 | arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst)); | ||
| 992 | generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component; | ||
| 993 | |||
| 994 | inst_base->cond = BITS(inst, 28, 31); | ||
| 995 | inst_base->idx = index; | ||
| 996 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 997 | |||
| 998 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 999 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 1000 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 1001 | inst_cream->op1 = BITS(inst, 20, 22); | ||
| 1002 | inst_cream->op2 = BITS(inst, 5, 7); | ||
| 1003 | |||
| 1004 | return inst_base; | ||
| 1005 | } | ||
| 1006 | |||
| 1007 | static ARM_INST_PTR INTERPRETER_TRANSLATE(setend)(unsigned int inst, int index) | ||
| 1008 | { | ||
| 1009 | arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(setend_inst)); | ||
| 1010 | setend_inst* const inst_cream = (setend_inst*)inst_base->component; | ||
| 1011 | |||
| 1012 | inst_base->cond = AL; | ||
| 1013 | inst_base->idx = index; | ||
| 1014 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 1015 | |||
| 1016 | inst_cream->set_bigend = BIT(inst, 9); | ||
| 1017 | |||
| 1018 | return inst_base; | ||
| 1019 | } | ||
| 1020 | |||
| 1021 | static ARM_INST_PTR INTERPRETER_TRANSLATE(sev)(unsigned int inst, int index) | ||
| 1022 | { | ||
| 1023 | arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst)); | ||
| 1024 | |||
| 1025 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1026 | inst_base->idx = index; | ||
| 1027 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 1028 | |||
| 1029 | return inst_base; | ||
| 1030 | } | ||
| 1031 | |||
| 1032 | static ARM_INST_PTR INTERPRETER_TRANSLATE(shadd8)(unsigned int inst, int index) | ||
| 1033 | { | ||
| 1034 | arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst)); | ||
| 1035 | generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component; | ||
| 1036 | |||
| 1037 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1038 | inst_base->idx = index; | ||
| 1039 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 1040 | |||
| 1041 | inst_cream->op1 = BITS(inst, 20, 21); | ||
| 1042 | inst_cream->op2 = BITS(inst, 5, 7); | ||
| 1043 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 1044 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 1045 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 1046 | |||
| 1047 | return inst_base; | ||
| 1048 | } | ||
| 1049 | static ARM_INST_PTR INTERPRETER_TRANSLATE(shadd16)(unsigned int inst, int index) | ||
| 1050 | { | ||
| 1051 | return INTERPRETER_TRANSLATE(shadd8)(inst, index); | ||
| 1052 | } | ||
| 1053 | static ARM_INST_PTR INTERPRETER_TRANSLATE(shaddsubx)(unsigned int inst, int index) | ||
| 1054 | { | ||
| 1055 | return INTERPRETER_TRANSLATE(shadd8)(inst, index); | ||
| 1056 | } | ||
| 1057 | static ARM_INST_PTR INTERPRETER_TRANSLATE(shsub8)(unsigned int inst, int index) | ||
| 1058 | { | ||
| 1059 | return INTERPRETER_TRANSLATE(shadd8)(inst, index); | ||
| 1060 | } | ||
| 1061 | static ARM_INST_PTR INTERPRETER_TRANSLATE(shsub16)(unsigned int inst, int index) | ||
| 1062 | { | ||
| 1063 | return INTERPRETER_TRANSLATE(shadd8)(inst, index); | ||
| 1064 | } | ||
| 1065 | static ARM_INST_PTR INTERPRETER_TRANSLATE(shsubaddx)(unsigned int inst, int index) | ||
| 1066 | { | ||
| 1067 | return INTERPRETER_TRANSLATE(shadd8)(inst, index); | ||
| 1068 | } | ||
| 1069 | |||
| 1070 | static ARM_INST_PTR INTERPRETER_TRANSLATE(smla)(unsigned int inst, int index) | ||
| 1071 | { | ||
| 1072 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(smla_inst)); | ||
| 1073 | smla_inst *inst_cream = (smla_inst *)inst_base->component; | ||
| 1074 | |||
| 1075 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1076 | inst_base->idx = index; | ||
| 1077 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 1078 | |||
| 1079 | inst_cream->x = BIT(inst, 5); | ||
| 1080 | inst_cream->y = BIT(inst, 6); | ||
| 1081 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 1082 | inst_cream->Rs = BITS(inst, 8, 11); | ||
| 1083 | inst_cream->Rd = BITS(inst, 16, 19); | ||
| 1084 | inst_cream->Rn = BITS(inst, 12, 15); | ||
| 1085 | |||
| 1086 | return inst_base; | ||
| 1087 | } | ||
| 1088 | |||
| 1089 | static ARM_INST_PTR INTERPRETER_TRANSLATE(smlad)(unsigned int inst, int index) | ||
| 1090 | { | ||
| 1091 | arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(smlad_inst)); | ||
| 1092 | smlad_inst* const inst_cream = (smlad_inst*)inst_base->component; | ||
| 1093 | |||
| 1094 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1095 | inst_base->idx = index; | ||
| 1096 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 1097 | |||
| 1098 | inst_cream->m = BIT(inst, 5); | ||
| 1099 | inst_cream->Rn = BITS(inst, 0, 3); | ||
| 1100 | inst_cream->Rm = BITS(inst, 8, 11); | ||
| 1101 | inst_cream->Rd = BITS(inst, 16, 19); | ||
| 1102 | inst_cream->Ra = BITS(inst, 12, 15); | ||
| 1103 | inst_cream->op1 = BITS(inst, 20, 22); | ||
| 1104 | inst_cream->op2 = BITS(inst, 5, 7); | ||
| 1105 | |||
| 1106 | return inst_base; | ||
| 1107 | } | ||
| 1108 | static ARM_INST_PTR INTERPRETER_TRANSLATE(smuad)(unsigned int inst, int index) | ||
| 1109 | { | ||
| 1110 | return INTERPRETER_TRANSLATE(smlad)(inst, index); | ||
| 1111 | } | ||
| 1112 | static ARM_INST_PTR INTERPRETER_TRANSLATE(smusd)(unsigned int inst, int index) | ||
| 1113 | { | ||
| 1114 | return INTERPRETER_TRANSLATE(smlad)(inst, index); | ||
| 1115 | } | ||
| 1116 | static ARM_INST_PTR INTERPRETER_TRANSLATE(smlsd)(unsigned int inst, int index) | ||
| 1117 | { | ||
| 1118 | return INTERPRETER_TRANSLATE(smlad)(inst, index); | ||
| 1119 | } | ||
| 1120 | |||
| 1121 | static ARM_INST_PTR INTERPRETER_TRANSLATE(smlal)(unsigned int inst, int index) | ||
| 1122 | { | ||
| 1123 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(umlal_inst)); | ||
| 1124 | umlal_inst *inst_cream = (umlal_inst *)inst_base->component; | ||
| 1125 | |||
| 1126 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1127 | inst_base->idx = index; | ||
| 1128 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 1129 | |||
| 1130 | inst_cream->S = BIT(inst, 20); | ||
| 1131 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 1132 | inst_cream->Rs = BITS(inst, 8, 11); | ||
| 1133 | inst_cream->RdHi = BITS(inst, 16, 19); | ||
| 1134 | inst_cream->RdLo = BITS(inst, 12, 15); | ||
| 1135 | |||
| 1136 | return inst_base; | ||
| 1137 | } | ||
| 1138 | |||
| 1139 | static ARM_INST_PTR INTERPRETER_TRANSLATE(smlalxy)(unsigned int inst, int index) | ||
| 1140 | { | ||
| 1141 | arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(smlalxy_inst)); | ||
| 1142 | smlalxy_inst* const inst_cream = (smlalxy_inst*)inst_base->component; | ||
| 1143 | |||
| 1144 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1145 | inst_base->idx = index; | ||
| 1146 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 1147 | |||
| 1148 | inst_cream->x = BIT(inst, 5); | ||
| 1149 | inst_cream->y = BIT(inst, 6); | ||
| 1150 | inst_cream->RdLo = BITS(inst, 12, 15); | ||
| 1151 | inst_cream->RdHi = BITS(inst, 16, 19); | ||
| 1152 | inst_cream->Rn = BITS(inst, 0, 4); | ||
| 1153 | inst_cream->Rm = BITS(inst, 8, 11); | ||
| 1154 | |||
| 1155 | return inst_base; | ||
| 1156 | } | ||
| 1157 | |||
| 1158 | static ARM_INST_PTR INTERPRETER_TRANSLATE(smlaw)(unsigned int inst, int index) | ||
| 1159 | { | ||
| 1160 | arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(smlad_inst)); | ||
| 1161 | smlad_inst* const inst_cream = (smlad_inst*)inst_base->component; | ||
| 1162 | |||
| 1163 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1164 | inst_base->idx = index; | ||
| 1165 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 1166 | |||
| 1167 | inst_cream->Ra = BITS(inst, 12, 15); | ||
| 1168 | inst_cream->Rm = BITS(inst, 8, 11); | ||
| 1169 | inst_cream->Rn = BITS(inst, 0, 3); | ||
| 1170 | inst_cream->Rd = BITS(inst, 16, 19); | ||
| 1171 | inst_cream->m = BIT(inst, 6); | ||
| 1172 | |||
| 1173 | return inst_base; | ||
| 1174 | } | ||
| 1175 | |||
| 1176 | static ARM_INST_PTR INTERPRETER_TRANSLATE(smlald)(unsigned int inst, int index) | ||
| 1177 | { | ||
| 1178 | arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(smlald_inst)); | ||
| 1179 | smlald_inst* const inst_cream = (smlald_inst*)inst_base->component; | ||
| 1180 | |||
| 1181 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1182 | inst_base->idx = index; | ||
| 1183 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 1184 | |||
| 1185 | inst_cream->Rm = BITS(inst, 8, 11); | ||
| 1186 | inst_cream->Rn = BITS(inst, 0, 3); | ||
| 1187 | inst_cream->RdLo = BITS(inst, 12, 15); | ||
| 1188 | inst_cream->RdHi = BITS(inst, 16, 19); | ||
| 1189 | inst_cream->swap = BIT(inst, 5); | ||
| 1190 | inst_cream->op1 = BITS(inst, 20, 22); | ||
| 1191 | inst_cream->op2 = BITS(inst, 5, 7); | ||
| 1192 | |||
| 1193 | return inst_base; | ||
| 1194 | } | ||
| 1195 | static ARM_INST_PTR INTERPRETER_TRANSLATE(smlsld)(unsigned int inst, int index) | ||
| 1196 | { | ||
| 1197 | return INTERPRETER_TRANSLATE(smlald)(inst, index); | ||
| 1198 | } | ||
| 1199 | |||
| 1200 | static ARM_INST_PTR INTERPRETER_TRANSLATE(smmla)(unsigned int inst, int index) | ||
| 1201 | { | ||
| 1202 | arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(smlad_inst)); | ||
| 1203 | smlad_inst* const inst_cream = (smlad_inst*)inst_base->component; | ||
| 1204 | |||
| 1205 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1206 | inst_base->idx = index; | ||
| 1207 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 1208 | |||
| 1209 | inst_cream->m = BIT(inst, 5); | ||
| 1210 | inst_cream->Ra = BITS(inst, 12, 15); | ||
| 1211 | inst_cream->Rm = BITS(inst, 8, 11); | ||
| 1212 | inst_cream->Rn = BITS(inst, 0, 3); | ||
| 1213 | inst_cream->Rd = BITS(inst, 16, 19); | ||
| 1214 | inst_cream->op1 = BITS(inst, 20, 22); | ||
| 1215 | inst_cream->op2 = BITS(inst, 5, 7); | ||
| 1216 | |||
| 1217 | return inst_base; | ||
| 1218 | } | ||
| 1219 | static ARM_INST_PTR INTERPRETER_TRANSLATE(smmls)(unsigned int inst, int index) | ||
| 1220 | { | ||
| 1221 | return INTERPRETER_TRANSLATE(smmla)(inst, index); | ||
| 1222 | } | ||
| 1223 | static ARM_INST_PTR INTERPRETER_TRANSLATE(smmul)(unsigned int inst, int index) | ||
| 1224 | { | ||
| 1225 | return INTERPRETER_TRANSLATE(smmla)(inst, index); | ||
| 1226 | } | ||
| 1227 | |||
| 1228 | static ARM_INST_PTR INTERPRETER_TRANSLATE(smul)(unsigned int inst, int index) | ||
| 1229 | { | ||
| 1230 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(smul_inst)); | ||
| 1231 | smul_inst *inst_cream = (smul_inst *)inst_base->component; | ||
| 1232 | |||
| 1233 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1234 | inst_base->idx = index; | ||
| 1235 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 1236 | |||
| 1237 | inst_cream->Rd = BITS(inst, 16, 19); | ||
| 1238 | inst_cream->Rs = BITS(inst, 8, 11); | ||
| 1239 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 1240 | |||
| 1241 | inst_cream->x = BIT(inst, 5); | ||
| 1242 | inst_cream->y = BIT(inst, 6); | ||
| 1243 | |||
| 1244 | return inst_base; | ||
| 1245 | |||
| 1246 | } | ||
| 1247 | static ARM_INST_PTR INTERPRETER_TRANSLATE(smull)(unsigned int inst, int index) | ||
| 1248 | { | ||
| 1249 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(umull_inst)); | ||
| 1250 | umull_inst *inst_cream = (umull_inst *)inst_base->component; | ||
| 1251 | |||
| 1252 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1253 | inst_base->idx = index; | ||
| 1254 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 1255 | |||
| 1256 | inst_cream->S = BIT(inst, 20); | ||
| 1257 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 1258 | inst_cream->Rs = BITS(inst, 8, 11); | ||
| 1259 | inst_cream->RdHi = BITS(inst, 16, 19); | ||
| 1260 | inst_cream->RdLo = BITS(inst, 12, 15); | ||
| 1261 | |||
| 1262 | return inst_base; | ||
| 1263 | } | ||
| 1264 | |||
| 1265 | static ARM_INST_PTR INTERPRETER_TRANSLATE(smulw)(unsigned int inst, int index) | ||
| 1266 | { | ||
| 1267 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(smlad_inst)); | ||
| 1268 | smlad_inst *inst_cream = (smlad_inst *)inst_base->component; | ||
| 1269 | |||
| 1270 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1271 | inst_base->idx = index; | ||
| 1272 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 1273 | |||
| 1274 | inst_cream->m = BIT(inst, 6); | ||
| 1275 | inst_cream->Rm = BITS(inst, 8, 11); | ||
| 1276 | inst_cream->Rn = BITS(inst, 0, 3); | ||
| 1277 | inst_cream->Rd = BITS(inst, 16, 19); | ||
| 1278 | |||
| 1279 | return inst_base; | ||
| 1280 | } | ||
| 1281 | |||
| 1282 | static ARM_INST_PTR INTERPRETER_TRANSLATE(srs)(unsigned int inst, int index) | ||
| 1283 | { | ||
| 1284 | arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); | ||
| 1285 | ldst_inst* const inst_cream = (ldst_inst*)inst_base->component; | ||
| 1286 | |||
| 1287 | inst_base->cond = AL; | ||
| 1288 | inst_base->idx = index; | ||
| 1289 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 1290 | |||
| 1291 | inst_cream->inst = inst; | ||
| 1292 | inst_cream->get_addr = GetAddressingOp(inst); | ||
| 1293 | |||
| 1294 | return inst_base; | ||
| 1295 | } | ||
| 1296 | |||
| 1297 | static ARM_INST_PTR INTERPRETER_TRANSLATE(ssat)(unsigned int inst, int index) | ||
| 1298 | { | ||
| 1299 | arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(ssat_inst)); | ||
| 1300 | ssat_inst* const inst_cream = (ssat_inst*)inst_base->component; | ||
| 1301 | |||
| 1302 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1303 | inst_base->idx = index; | ||
| 1304 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 1305 | |||
| 1306 | inst_cream->Rn = BITS(inst, 0, 3); | ||
| 1307 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 1308 | inst_cream->imm5 = BITS(inst, 7, 11); | ||
| 1309 | inst_cream->sat_imm = BITS(inst, 16, 20); | ||
| 1310 | inst_cream->shift_type = BIT(inst, 6); | ||
| 1311 | |||
| 1312 | return inst_base; | ||
| 1313 | } | ||
| 1314 | static ARM_INST_PTR INTERPRETER_TRANSLATE(ssat16)(unsigned int inst, int index) | ||
| 1315 | { | ||
| 1316 | arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(ssat_inst)); | ||
| 1317 | ssat_inst* const inst_cream = (ssat_inst*)inst_base->component; | ||
| 1318 | |||
| 1319 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1320 | inst_base->idx = index; | ||
| 1321 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 1322 | |||
| 1323 | inst_cream->Rn = BITS(inst, 0, 3); | ||
| 1324 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 1325 | inst_cream->sat_imm = BITS(inst, 16, 19); | ||
| 1326 | |||
| 1327 | return inst_base; | ||
| 1328 | } | ||
| 1329 | |||
| 1330 | static ARM_INST_PTR INTERPRETER_TRANSLATE(stc)(unsigned int inst, int index) | ||
| 1331 | { | ||
| 1332 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(stc_inst)); | ||
| 1333 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1334 | inst_base->idx = index; | ||
| 1335 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 1336 | |||
| 1337 | return inst_base; | ||
| 1338 | } | ||
| 1339 | static ARM_INST_PTR INTERPRETER_TRANSLATE(stm)(unsigned int inst, int index) | ||
| 1340 | { | ||
| 1341 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); | ||
| 1342 | ldst_inst *inst_cream = (ldst_inst *)inst_base->component; | ||
| 1343 | |||
| 1344 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1345 | inst_base->idx = index; | ||
| 1346 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 1347 | |||
| 1348 | inst_cream->inst = inst; | ||
| 1349 | inst_cream->get_addr = GetAddressingOp(inst); | ||
| 1350 | return inst_base; | ||
| 1351 | } | ||
| 1352 | static ARM_INST_PTR INTERPRETER_TRANSLATE(sxtb)(unsigned int inst, int index) | ||
| 1353 | { | ||
| 1354 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(sxtb_inst)); | ||
| 1355 | sxtb_inst *inst_cream = (sxtb_inst *)inst_base->component; | ||
| 1356 | |||
| 1357 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1358 | inst_base->idx = index; | ||
| 1359 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 1360 | |||
| 1361 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 1362 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 1363 | inst_cream->rotate = BITS(inst, 10, 11); | ||
| 1364 | |||
| 1365 | return inst_base; | ||
| 1366 | } | ||
| 1367 | static ARM_INST_PTR INTERPRETER_TRANSLATE(str)(unsigned int inst, int index) | ||
| 1368 | { | ||
| 1369 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); | ||
| 1370 | ldst_inst *inst_cream = (ldst_inst *)inst_base->component; | ||
| 1371 | |||
| 1372 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1373 | inst_base->idx = index; | ||
| 1374 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 1375 | |||
| 1376 | inst_cream->inst = inst; | ||
| 1377 | inst_cream->get_addr = GetAddressingOp(inst); | ||
| 1378 | |||
| 1379 | return inst_base; | ||
| 1380 | } | ||
| 1381 | static ARM_INST_PTR INTERPRETER_TRANSLATE(uxtb)(unsigned int inst, int index) | ||
| 1382 | { | ||
| 1383 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(uxth_inst)); | ||
| 1384 | uxth_inst *inst_cream = (uxth_inst *)inst_base->component; | ||
| 1385 | |||
| 1386 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1387 | inst_base->idx = index; | ||
| 1388 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 1389 | |||
| 1390 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 1391 | inst_cream->rotate = BITS(inst, 10, 11); | ||
| 1392 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 1393 | |||
| 1394 | return inst_base; | ||
| 1395 | } | ||
| 1396 | static ARM_INST_PTR INTERPRETER_TRANSLATE(uxtab)(unsigned int inst, int index) | ||
| 1397 | { | ||
| 1398 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(uxtab_inst)); | ||
| 1399 | uxtab_inst *inst_cream = (uxtab_inst *)inst_base->component; | ||
| 1400 | |||
| 1401 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1402 | inst_base->idx = index; | ||
| 1403 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 1404 | |||
| 1405 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 1406 | inst_cream->rotate = BITS(inst, 10, 11); | ||
| 1407 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 1408 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 1409 | |||
| 1410 | return inst_base; | ||
| 1411 | } | ||
| 1412 | static ARM_INST_PTR INTERPRETER_TRANSLATE(strb)(unsigned int inst, int index) | ||
| 1413 | { | ||
| 1414 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); | ||
| 1415 | ldst_inst *inst_cream = (ldst_inst *)inst_base->component; | ||
| 1416 | |||
| 1417 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1418 | inst_base->idx = index; | ||
| 1419 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 1420 | |||
| 1421 | inst_cream->inst = inst; | ||
| 1422 | inst_cream->get_addr = GetAddressingOp(inst); | ||
| 1423 | |||
| 1424 | return inst_base; | ||
| 1425 | } | ||
| 1426 | static ARM_INST_PTR INTERPRETER_TRANSLATE(strbt)(unsigned int inst, int index) | ||
| 1427 | { | ||
| 1428 | arm_inst* inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); | ||
| 1429 | ldst_inst* inst_cream = (ldst_inst*)inst_base->component; | ||
| 1430 | |||
| 1431 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1432 | inst_base->idx = index; | ||
| 1433 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 1434 | |||
| 1435 | inst_cream->inst = inst; | ||
| 1436 | inst_cream->get_addr = GetAddressingOpLoadStoreT(inst); | ||
| 1437 | |||
| 1438 | return inst_base; | ||
| 1439 | } | ||
| 1440 | static ARM_INST_PTR INTERPRETER_TRANSLATE(strd)(unsigned int inst, int index){ | ||
| 1441 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); | ||
| 1442 | ldst_inst *inst_cream = (ldst_inst *)inst_base->component; | ||
| 1443 | |||
| 1444 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1445 | inst_base->idx = index; | ||
| 1446 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 1447 | |||
| 1448 | inst_cream->inst = inst; | ||
| 1449 | inst_cream->get_addr = GetAddressingOp(inst); | ||
| 1450 | |||
| 1451 | return inst_base; | ||
| 1452 | } | ||
| 1453 | static ARM_INST_PTR INTERPRETER_TRANSLATE(strex)(unsigned int inst, int index) | ||
| 1454 | { | ||
| 1455 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst)); | ||
| 1456 | generic_arm_inst *inst_cream = (generic_arm_inst *)inst_base->component; | ||
| 1457 | |||
| 1458 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1459 | inst_base->idx = index; | ||
| 1460 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 1461 | |||
| 1462 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 1463 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 1464 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 1465 | |||
| 1466 | return inst_base; | ||
| 1467 | } | ||
| 1468 | static ARM_INST_PTR INTERPRETER_TRANSLATE(strexb)(unsigned int inst, int index) | ||
| 1469 | { | ||
| 1470 | return INTERPRETER_TRANSLATE(strex)(inst, index); | ||
| 1471 | } | ||
| 1472 | static ARM_INST_PTR INTERPRETER_TRANSLATE(strexh)(unsigned int inst, int index) | ||
| 1473 | { | ||
| 1474 | return INTERPRETER_TRANSLATE(strex)(inst, index); | ||
| 1475 | } | ||
| 1476 | static ARM_INST_PTR INTERPRETER_TRANSLATE(strexd)(unsigned int inst, int index) | ||
| 1477 | { | ||
| 1478 | return INTERPRETER_TRANSLATE(strex)(inst, index); | ||
| 1479 | } | ||
| 1480 | static ARM_INST_PTR INTERPRETER_TRANSLATE(strh)(unsigned int inst, int index) | ||
| 1481 | { | ||
| 1482 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); | ||
| 1483 | ldst_inst *inst_cream = (ldst_inst *)inst_base->component; | ||
| 1484 | |||
| 1485 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1486 | inst_base->idx = index; | ||
| 1487 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 1488 | |||
| 1489 | inst_cream->inst = inst; | ||
| 1490 | inst_cream->get_addr = GetAddressingOp(inst); | ||
| 1491 | |||
| 1492 | return inst_base; | ||
| 1493 | } | ||
| 1494 | static ARM_INST_PTR INTERPRETER_TRANSLATE(strt)(unsigned int inst, int index) | ||
| 1495 | { | ||
| 1496 | arm_inst* inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); | ||
| 1497 | ldst_inst* inst_cream = (ldst_inst*)inst_base->component; | ||
| 1498 | |||
| 1499 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1500 | inst_base->idx = index; | ||
| 1501 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 1502 | |||
| 1503 | inst_cream->inst = inst; | ||
| 1504 | inst_cream->get_addr = GetAddressingOpLoadStoreT(inst); | ||
| 1505 | |||
| 1506 | return inst_base; | ||
| 1507 | } | ||
| 1508 | static ARM_INST_PTR INTERPRETER_TRANSLATE(sub)(unsigned int inst, int index) | ||
| 1509 | { | ||
| 1510 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(sub_inst)); | ||
| 1511 | sub_inst *inst_cream = (sub_inst *)inst_base->component; | ||
| 1512 | |||
| 1513 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1514 | inst_base->idx = index; | ||
| 1515 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 1516 | |||
| 1517 | inst_cream->I = BIT(inst, 25); | ||
| 1518 | inst_cream->S = BIT(inst, 20); | ||
| 1519 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 1520 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 1521 | inst_cream->shifter_operand = BITS(inst, 0, 11); | ||
| 1522 | inst_cream->shtop_func = GetShifterOp(inst); | ||
| 1523 | |||
| 1524 | if (inst_cream->Rd == 15) | ||
| 1525 | inst_base->br = TransExtData::INDIRECT_BRANCH; | ||
| 1526 | |||
| 1527 | return inst_base; | ||
| 1528 | } | ||
| 1529 | static ARM_INST_PTR INTERPRETER_TRANSLATE(swi)(unsigned int inst, int index) | ||
| 1530 | { | ||
| 1531 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(swi_inst)); | ||
| 1532 | swi_inst *inst_cream = (swi_inst *)inst_base->component; | ||
| 1533 | |||
| 1534 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1535 | inst_base->idx = index; | ||
| 1536 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 1537 | |||
| 1538 | inst_cream->num = BITS(inst, 0, 23); | ||
| 1539 | return inst_base; | ||
| 1540 | } | ||
| 1541 | static ARM_INST_PTR INTERPRETER_TRANSLATE(swp)(unsigned int inst, int index) | ||
| 1542 | { | ||
| 1543 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(swp_inst)); | ||
| 1544 | swp_inst *inst_cream = (swp_inst *)inst_base->component; | ||
| 1545 | |||
| 1546 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1547 | inst_base->idx = index; | ||
| 1548 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 1549 | |||
| 1550 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 1551 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 1552 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 1553 | |||
| 1554 | return inst_base; | ||
| 1555 | } | ||
| 1556 | static ARM_INST_PTR INTERPRETER_TRANSLATE(swpb)(unsigned int inst, int index){ | ||
| 1557 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(swp_inst)); | ||
| 1558 | swp_inst *inst_cream = (swp_inst *)inst_base->component; | ||
| 1559 | |||
| 1560 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1561 | inst_base->idx = index; | ||
| 1562 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 1563 | |||
| 1564 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 1565 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 1566 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 1567 | |||
| 1568 | return inst_base; | ||
| 1569 | } | ||
| 1570 | static ARM_INST_PTR INTERPRETER_TRANSLATE(sxtab)(unsigned int inst, int index){ | ||
| 1571 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(sxtab_inst)); | ||
| 1572 | sxtab_inst *inst_cream = (sxtab_inst *)inst_base->component; | ||
| 1573 | |||
| 1574 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1575 | inst_base->idx = index; | ||
| 1576 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 1577 | |||
| 1578 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 1579 | inst_cream->rotate = BITS(inst, 10, 11); | ||
| 1580 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 1581 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 1582 | |||
| 1583 | return inst_base; | ||
| 1584 | } | ||
| 1585 | |||
| 1586 | static ARM_INST_PTR INTERPRETER_TRANSLATE(sxtab16)(unsigned int inst, int index) | ||
| 1587 | { | ||
| 1588 | arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(sxtab_inst)); | ||
| 1589 | sxtab_inst* const inst_cream = (sxtab_inst*)inst_base->component; | ||
| 1590 | |||
| 1591 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1592 | inst_base->idx = index; | ||
| 1593 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 1594 | |||
| 1595 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 1596 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 1597 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 1598 | inst_cream->rotate = BITS(inst, 10, 11); | ||
| 1599 | |||
| 1600 | return inst_base; | ||
| 1601 | } | ||
| 1602 | static ARM_INST_PTR INTERPRETER_TRANSLATE(sxtb16)(unsigned int inst, int index) | ||
| 1603 | { | ||
| 1604 | return INTERPRETER_TRANSLATE(sxtab16)(inst, index); | ||
| 1605 | } | ||
| 1606 | |||
| 1607 | static ARM_INST_PTR INTERPRETER_TRANSLATE(sxtah)(unsigned int inst, int index) { | ||
| 1608 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(sxtah_inst)); | ||
| 1609 | sxtah_inst *inst_cream = (sxtah_inst *)inst_base->component; | ||
| 1610 | |||
| 1611 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1612 | inst_base->idx = index; | ||
| 1613 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 1614 | |||
| 1615 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 1616 | inst_cream->rotate = BITS(inst, 10, 11); | ||
| 1617 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 1618 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 1619 | |||
| 1620 | return inst_base; | ||
| 1621 | } | ||
| 1622 | |||
| 1623 | static ARM_INST_PTR INTERPRETER_TRANSLATE(teq)(unsigned int inst, int index) | ||
| 1624 | { | ||
| 1625 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(teq_inst)); | ||
| 1626 | teq_inst *inst_cream = (teq_inst *)inst_base->component; | ||
| 1627 | |||
| 1628 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1629 | inst_base->idx = index; | ||
| 1630 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 1631 | |||
| 1632 | inst_cream->I = BIT(inst, 25); | ||
| 1633 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 1634 | inst_cream->shifter_operand = BITS(inst, 0, 11); | ||
| 1635 | inst_cream->shtop_func = GetShifterOp(inst); | ||
| 1636 | |||
| 1637 | return inst_base; | ||
| 1638 | } | ||
| 1639 | static ARM_INST_PTR INTERPRETER_TRANSLATE(tst)(unsigned int inst, int index) | ||
| 1640 | { | ||
| 1641 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(tst_inst)); | ||
| 1642 | tst_inst *inst_cream = (tst_inst *)inst_base->component; | ||
| 1643 | |||
| 1644 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1645 | inst_base->idx = index; | ||
| 1646 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 1647 | |||
| 1648 | inst_cream->I = BIT(inst, 25); | ||
| 1649 | inst_cream->S = BIT(inst, 20); | ||
| 1650 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 1651 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 1652 | inst_cream->shifter_operand = BITS(inst, 0, 11); | ||
| 1653 | inst_cream->shtop_func = GetShifterOp(inst); | ||
| 1654 | |||
| 1655 | return inst_base; | ||
| 1656 | } | ||
| 1657 | |||
| 1658 | static ARM_INST_PTR INTERPRETER_TRANSLATE(uadd8)(unsigned int inst, int index) | ||
| 1659 | { | ||
| 1660 | arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst)); | ||
| 1661 | generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component; | ||
| 1662 | |||
| 1663 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1664 | inst_base->idx = index; | ||
| 1665 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 1666 | |||
| 1667 | inst_cream->op1 = BITS(inst, 20, 21); | ||
| 1668 | inst_cream->op2 = BITS(inst, 5, 7); | ||
| 1669 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 1670 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 1671 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 1672 | |||
| 1673 | return inst_base; | ||
| 1674 | } | ||
| 1675 | static ARM_INST_PTR INTERPRETER_TRANSLATE(uadd16)(unsigned int inst, int index) | ||
| 1676 | { | ||
| 1677 | return INTERPRETER_TRANSLATE(uadd8)(inst, index); | ||
| 1678 | } | ||
| 1679 | static ARM_INST_PTR INTERPRETER_TRANSLATE(uaddsubx)(unsigned int inst, int index) | ||
| 1680 | { | ||
| 1681 | return INTERPRETER_TRANSLATE(uadd8)(inst, index); | ||
| 1682 | } | ||
| 1683 | static ARM_INST_PTR INTERPRETER_TRANSLATE(usub8)(unsigned int inst, int index) | ||
| 1684 | { | ||
| 1685 | return INTERPRETER_TRANSLATE(uadd8)(inst, index); | ||
| 1686 | } | ||
| 1687 | static ARM_INST_PTR INTERPRETER_TRANSLATE(usub16)(unsigned int inst, int index) | ||
| 1688 | { | ||
| 1689 | return INTERPRETER_TRANSLATE(uadd8)(inst, index); | ||
| 1690 | } | ||
| 1691 | static ARM_INST_PTR INTERPRETER_TRANSLATE(usubaddx)(unsigned int inst, int index) | ||
| 1692 | { | ||
| 1693 | return INTERPRETER_TRANSLATE(uadd8)(inst, index); | ||
| 1694 | } | ||
| 1695 | |||
| 1696 | static ARM_INST_PTR INTERPRETER_TRANSLATE(uhadd8)(unsigned int inst, int index) | ||
| 1697 | { | ||
| 1698 | arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst)); | ||
| 1699 | generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component; | ||
| 1700 | |||
| 1701 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1702 | inst_base->idx = index; | ||
| 1703 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 1704 | |||
| 1705 | inst_cream->op1 = BITS(inst, 20, 21); | ||
| 1706 | inst_cream->op2 = BITS(inst, 5, 7); | ||
| 1707 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 1708 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 1709 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 1710 | |||
| 1711 | return inst_base; | ||
| 1712 | } | ||
| 1713 | static ARM_INST_PTR INTERPRETER_TRANSLATE(uhadd16)(unsigned int inst, int index) | ||
| 1714 | { | ||
| 1715 | return INTERPRETER_TRANSLATE(uhadd8)(inst, index); | ||
| 1716 | } | ||
| 1717 | static ARM_INST_PTR INTERPRETER_TRANSLATE(uhaddsubx)(unsigned int inst, int index) | ||
| 1718 | { | ||
| 1719 | return INTERPRETER_TRANSLATE(uhadd8)(inst, index); | ||
| 1720 | } | ||
| 1721 | static ARM_INST_PTR INTERPRETER_TRANSLATE(uhsub8)(unsigned int inst, int index) | ||
| 1722 | { | ||
| 1723 | return INTERPRETER_TRANSLATE(uhadd8)(inst, index); | ||
| 1724 | } | ||
| 1725 | static ARM_INST_PTR INTERPRETER_TRANSLATE(uhsub16)(unsigned int inst, int index) | ||
| 1726 | { | ||
| 1727 | return INTERPRETER_TRANSLATE(uhadd8)(inst, index); | ||
| 1728 | } | ||
| 1729 | static ARM_INST_PTR INTERPRETER_TRANSLATE(uhsubaddx)(unsigned int inst, int index) | ||
| 1730 | { | ||
| 1731 | return INTERPRETER_TRANSLATE(uhadd8)(inst, index); | ||
| 1732 | } | ||
| 1733 | static ARM_INST_PTR INTERPRETER_TRANSLATE(umaal)(unsigned int inst, int index) | ||
| 1734 | { | ||
| 1735 | arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(umaal_inst)); | ||
| 1736 | umaal_inst* const inst_cream = (umaal_inst*)inst_base->component; | ||
| 1737 | |||
| 1738 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1739 | inst_base->idx = index; | ||
| 1740 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 1741 | |||
| 1742 | inst_cream->Rm = BITS(inst, 8, 11); | ||
| 1743 | inst_cream->Rn = BITS(inst, 0, 3); | ||
| 1744 | inst_cream->RdLo = BITS(inst, 12, 15); | ||
| 1745 | inst_cream->RdHi = BITS(inst, 16, 19); | ||
| 1746 | |||
| 1747 | return inst_base; | ||
| 1748 | } | ||
| 1749 | static ARM_INST_PTR INTERPRETER_TRANSLATE(umlal)(unsigned int inst, int index) | ||
| 1750 | { | ||
| 1751 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(umlal_inst)); | ||
| 1752 | umlal_inst *inst_cream = (umlal_inst *)inst_base->component; | ||
| 1753 | |||
| 1754 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1755 | inst_base->idx = index; | ||
| 1756 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 1757 | |||
| 1758 | inst_cream->S = BIT(inst, 20); | ||
| 1759 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 1760 | inst_cream->Rs = BITS(inst, 8, 11); | ||
| 1761 | inst_cream->RdHi = BITS(inst, 16, 19); | ||
| 1762 | inst_cream->RdLo = BITS(inst, 12, 15); | ||
| 1763 | |||
| 1764 | return inst_base; | ||
| 1765 | } | ||
| 1766 | static ARM_INST_PTR INTERPRETER_TRANSLATE(umull)(unsigned int inst, int index) | ||
| 1767 | { | ||
| 1768 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(umull_inst)); | ||
| 1769 | umull_inst *inst_cream = (umull_inst *)inst_base->component; | ||
| 1770 | |||
| 1771 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1772 | inst_base->idx = index; | ||
| 1773 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 1774 | |||
| 1775 | inst_cream->S = BIT(inst, 20); | ||
| 1776 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 1777 | inst_cream->Rs = BITS(inst, 8, 11); | ||
| 1778 | inst_cream->RdHi = BITS(inst, 16, 19); | ||
| 1779 | inst_cream->RdLo = BITS(inst, 12, 15); | ||
| 1780 | |||
| 1781 | return inst_base; | ||
| 1782 | } | ||
| 1783 | |||
| 1784 | static ARM_INST_PTR INTERPRETER_TRANSLATE(b_2_thumb)(unsigned int tinst, int index) | ||
| 1785 | { | ||
| 1786 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(b_2_thumb)); | ||
| 1787 | b_2_thumb *inst_cream = (b_2_thumb *)inst_base->component; | ||
| 1788 | |||
| 1789 | inst_cream->imm = ((tinst & 0x3FF) << 1) | ((tinst & (1 << 10)) ? 0xFFFFF800 : 0); | ||
| 1790 | |||
| 1791 | inst_base->idx = index; | ||
| 1792 | inst_base->br = TransExtData::DIRECT_BRANCH; | ||
| 1793 | |||
| 1794 | return inst_base; | ||
| 1795 | } | ||
| 1796 | |||
| 1797 | static ARM_INST_PTR INTERPRETER_TRANSLATE(b_cond_thumb)(unsigned int tinst, int index) | ||
| 1798 | { | ||
| 1799 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(b_cond_thumb)); | ||
| 1800 | b_cond_thumb *inst_cream = (b_cond_thumb *)inst_base->component; | ||
| 1801 | |||
| 1802 | inst_cream->imm = (((tinst & 0x7F) << 1) | ((tinst & (1 << 7)) ? 0xFFFFFF00 : 0)); | ||
| 1803 | inst_cream->cond = ((tinst >> 8) & 0xf); | ||
| 1804 | inst_base->idx = index; | ||
| 1805 | inst_base->br = TransExtData::DIRECT_BRANCH; | ||
| 1806 | |||
| 1807 | return inst_base; | ||
| 1808 | } | ||
| 1809 | |||
| 1810 | static ARM_INST_PTR INTERPRETER_TRANSLATE(bl_1_thumb)(unsigned int tinst, int index) | ||
| 1811 | { | ||
| 1812 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(bl_1_thumb)); | ||
| 1813 | bl_1_thumb *inst_cream = (bl_1_thumb *)inst_base->component; | ||
| 1814 | |||
| 1815 | inst_cream->imm = (((tinst & 0x07FF) << 12) | ((tinst & (1 << 10)) ? 0xFF800000 : 0)); | ||
| 1816 | |||
| 1817 | inst_base->idx = index; | ||
| 1818 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 1819 | return inst_base; | ||
| 1820 | } | ||
| 1821 | static ARM_INST_PTR INTERPRETER_TRANSLATE(bl_2_thumb)(unsigned int tinst, int index) | ||
| 1822 | { | ||
| 1823 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(bl_2_thumb)); | ||
| 1824 | bl_2_thumb *inst_cream = (bl_2_thumb *)inst_base->component; | ||
| 1825 | |||
| 1826 | inst_cream->imm = (tinst & 0x07FF) << 1; | ||
| 1827 | |||
| 1828 | inst_base->idx = index; | ||
| 1829 | inst_base->br = TransExtData::DIRECT_BRANCH; | ||
| 1830 | return inst_base; | ||
| 1831 | } | ||
| 1832 | static ARM_INST_PTR INTERPRETER_TRANSLATE(blx_1_thumb)(unsigned int tinst, int index) | ||
| 1833 | { | ||
| 1834 | arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(blx_1_thumb)); | ||
| 1835 | blx_1_thumb *inst_cream = (blx_1_thumb *)inst_base->component; | ||
| 1836 | |||
| 1837 | inst_cream->imm = (tinst & 0x07FF) << 1; | ||
| 1838 | inst_cream->instr = tinst; | ||
| 1839 | |||
| 1840 | inst_base->idx = index; | ||
| 1841 | inst_base->br = TransExtData::DIRECT_BRANCH; | ||
| 1842 | return inst_base; | ||
| 1843 | } | ||
| 1844 | |||
| 1845 | static ARM_INST_PTR INTERPRETER_TRANSLATE(uqadd8)(unsigned int inst, int index) | ||
| 1846 | { | ||
| 1847 | arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst)); | ||
| 1848 | generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component; | ||
| 1849 | |||
| 1850 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1851 | inst_base->idx = index; | ||
| 1852 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 1853 | |||
| 1854 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 1855 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 1856 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 1857 | inst_cream->op1 = BITS(inst, 20, 21); | ||
| 1858 | inst_cream->op2 = BITS(inst, 5, 7); | ||
| 1859 | |||
| 1860 | return inst_base; | ||
| 1861 | } | ||
| 1862 | static ARM_INST_PTR INTERPRETER_TRANSLATE(uqadd16)(unsigned int inst, int index) | ||
| 1863 | { | ||
| 1864 | return INTERPRETER_TRANSLATE(uqadd8)(inst, index); | ||
| 1865 | } | ||
| 1866 | static ARM_INST_PTR INTERPRETER_TRANSLATE(uqaddsubx)(unsigned int inst, int index) | ||
| 1867 | { | ||
| 1868 | return INTERPRETER_TRANSLATE(uqadd8)(inst, index); | ||
| 1869 | } | ||
| 1870 | static ARM_INST_PTR INTERPRETER_TRANSLATE(uqsub8)(unsigned int inst, int index) | ||
| 1871 | { | ||
| 1872 | return INTERPRETER_TRANSLATE(uqadd8)(inst, index); | ||
| 1873 | } | ||
| 1874 | static ARM_INST_PTR INTERPRETER_TRANSLATE(uqsub16)(unsigned int inst, int index) | ||
| 1875 | { | ||
| 1876 | return INTERPRETER_TRANSLATE(uqadd8)(inst, index); | ||
| 1877 | } | ||
| 1878 | static ARM_INST_PTR INTERPRETER_TRANSLATE(uqsubaddx)(unsigned int inst, int index) | ||
| 1879 | { | ||
| 1880 | return INTERPRETER_TRANSLATE(uqadd8)(inst, index); | ||
| 1881 | } | ||
| 1882 | static ARM_INST_PTR INTERPRETER_TRANSLATE(usada8)(unsigned int inst, int index) | ||
| 1883 | { | ||
| 1884 | arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst)); | ||
| 1885 | generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component; | ||
| 1886 | |||
| 1887 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1888 | inst_base->idx = index; | ||
| 1889 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 1890 | |||
| 1891 | inst_cream->op1 = BITS(inst, 20, 24); | ||
| 1892 | inst_cream->op2 = BITS(inst, 5, 7); | ||
| 1893 | inst_cream->Rd = BITS(inst, 16, 19); | ||
| 1894 | inst_cream->Rm = BITS(inst, 8, 11); | ||
| 1895 | inst_cream->Rn = BITS(inst, 0, 3); | ||
| 1896 | inst_cream->Ra = BITS(inst, 12, 15); | ||
| 1897 | |||
| 1898 | return inst_base; | ||
| 1899 | } | ||
| 1900 | static ARM_INST_PTR INTERPRETER_TRANSLATE(usad8)(unsigned int inst, int index) | ||
| 1901 | { | ||
| 1902 | return INTERPRETER_TRANSLATE(usada8)(inst, index); | ||
| 1903 | } | ||
| 1904 | static ARM_INST_PTR INTERPRETER_TRANSLATE(usat)(unsigned int inst, int index) | ||
| 1905 | { | ||
| 1906 | return INTERPRETER_TRANSLATE(ssat)(inst, index); | ||
| 1907 | } | ||
| 1908 | static ARM_INST_PTR INTERPRETER_TRANSLATE(usat16)(unsigned int inst, int index) | ||
| 1909 | { | ||
| 1910 | return INTERPRETER_TRANSLATE(ssat16)(inst, index); | ||
| 1911 | } | ||
| 1912 | |||
| 1913 | static ARM_INST_PTR INTERPRETER_TRANSLATE(uxtab16)(unsigned int inst, int index) | ||
| 1914 | { | ||
| 1915 | arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(uxtab_inst)); | ||
| 1916 | uxtab_inst* const inst_cream = (uxtab_inst*)inst_base->component; | ||
| 1917 | |||
| 1918 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1919 | inst_base->idx = index; | ||
| 1920 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 1921 | |||
| 1922 | inst_cream->Rm = BITS(inst, 0, 3); | ||
| 1923 | inst_cream->Rn = BITS(inst, 16, 19); | ||
| 1924 | inst_cream->Rd = BITS(inst, 12, 15); | ||
| 1925 | inst_cream->rotate = BITS(inst, 10, 11); | ||
| 1926 | |||
| 1927 | return inst_base; | ||
| 1928 | } | ||
| 1929 | static ARM_INST_PTR INTERPRETER_TRANSLATE(uxtb16)(unsigned int inst, int index) | ||
| 1930 | { | ||
| 1931 | return INTERPRETER_TRANSLATE(uxtab16)(inst, index); | ||
| 1932 | } | ||
| 1933 | |||
| 1934 | static ARM_INST_PTR INTERPRETER_TRANSLATE(wfe)(unsigned int inst, int index) | ||
| 1935 | { | ||
| 1936 | arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst)); | ||
| 1937 | |||
| 1938 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1939 | inst_base->idx = index; | ||
| 1940 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 1941 | |||
| 1942 | return inst_base; | ||
| 1943 | } | ||
| 1944 | static ARM_INST_PTR INTERPRETER_TRANSLATE(wfi)(unsigned int inst, int index) | ||
| 1945 | { | ||
| 1946 | arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst)); | ||
| 1947 | |||
| 1948 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1949 | inst_base->idx = index; | ||
| 1950 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 1951 | |||
| 1952 | return inst_base; | ||
| 1953 | } | ||
| 1954 | static ARM_INST_PTR INTERPRETER_TRANSLATE(yield)(unsigned int inst, int index) | ||
| 1955 | { | ||
| 1956 | arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst)); | ||
| 1957 | |||
| 1958 | inst_base->cond = BITS(inst, 28, 31); | ||
| 1959 | inst_base->idx = index; | ||
| 1960 | inst_base->br = TransExtData::NON_BRANCH; | ||
| 1961 | |||
| 1962 | return inst_base; | ||
| 1963 | } | ||
| 1964 | |||
| 1965 | // Floating point VFPv3 instructions | ||
| 1966 | #define VFP_INTERPRETER_TRANS | ||
| 1967 | #include "core/arm/skyeye_common/vfp/vfpinstr.cpp" | ||
| 1968 | #undef VFP_INTERPRETER_TRANS | ||
| 1969 | |||
| 1970 | const transop_fp_t arm_instruction_trans[] = { | ||
| 1971 | INTERPRETER_TRANSLATE(vmla), | ||
| 1972 | INTERPRETER_TRANSLATE(vmls), | ||
| 1973 | INTERPRETER_TRANSLATE(vnmla), | ||
| 1974 | INTERPRETER_TRANSLATE(vnmls), | ||
| 1975 | INTERPRETER_TRANSLATE(vnmul), | ||
| 1976 | INTERPRETER_TRANSLATE(vmul), | ||
| 1977 | INTERPRETER_TRANSLATE(vadd), | ||
| 1978 | INTERPRETER_TRANSLATE(vsub), | ||
| 1979 | INTERPRETER_TRANSLATE(vdiv), | ||
| 1980 | INTERPRETER_TRANSLATE(vmovi), | ||
| 1981 | INTERPRETER_TRANSLATE(vmovr), | ||
| 1982 | INTERPRETER_TRANSLATE(vabs), | ||
| 1983 | INTERPRETER_TRANSLATE(vneg), | ||
| 1984 | INTERPRETER_TRANSLATE(vsqrt), | ||
| 1985 | INTERPRETER_TRANSLATE(vcmp), | ||
| 1986 | INTERPRETER_TRANSLATE(vcmp2), | ||
| 1987 | INTERPRETER_TRANSLATE(vcvtbds), | ||
| 1988 | INTERPRETER_TRANSLATE(vcvtbff), | ||
| 1989 | INTERPRETER_TRANSLATE(vcvtbfi), | ||
| 1990 | INTERPRETER_TRANSLATE(vmovbrs), | ||
| 1991 | INTERPRETER_TRANSLATE(vmsr), | ||
| 1992 | INTERPRETER_TRANSLATE(vmovbrc), | ||
| 1993 | INTERPRETER_TRANSLATE(vmrs), | ||
| 1994 | INTERPRETER_TRANSLATE(vmovbcr), | ||
| 1995 | INTERPRETER_TRANSLATE(vmovbrrss), | ||
| 1996 | INTERPRETER_TRANSLATE(vmovbrrd), | ||
| 1997 | INTERPRETER_TRANSLATE(vstr), | ||
| 1998 | INTERPRETER_TRANSLATE(vpush), | ||
| 1999 | INTERPRETER_TRANSLATE(vstm), | ||
| 2000 | INTERPRETER_TRANSLATE(vpop), | ||
| 2001 | INTERPRETER_TRANSLATE(vldr), | ||
| 2002 | INTERPRETER_TRANSLATE(vldm), | ||
| 2003 | |||
| 2004 | INTERPRETER_TRANSLATE(srs), | ||
| 2005 | INTERPRETER_TRANSLATE(rfe), | ||
| 2006 | INTERPRETER_TRANSLATE(bkpt), | ||
| 2007 | INTERPRETER_TRANSLATE(blx), | ||
| 2008 | INTERPRETER_TRANSLATE(cps), | ||
| 2009 | INTERPRETER_TRANSLATE(pld), | ||
| 2010 | INTERPRETER_TRANSLATE(setend), | ||
| 2011 | INTERPRETER_TRANSLATE(clrex), | ||
| 2012 | INTERPRETER_TRANSLATE(rev16), | ||
| 2013 | INTERPRETER_TRANSLATE(usad8), | ||
| 2014 | INTERPRETER_TRANSLATE(sxtb), | ||
| 2015 | INTERPRETER_TRANSLATE(uxtb), | ||
| 2016 | INTERPRETER_TRANSLATE(sxth), | ||
| 2017 | INTERPRETER_TRANSLATE(sxtb16), | ||
| 2018 | INTERPRETER_TRANSLATE(uxth), | ||
| 2019 | INTERPRETER_TRANSLATE(uxtb16), | ||
| 2020 | INTERPRETER_TRANSLATE(cpy), | ||
| 2021 | INTERPRETER_TRANSLATE(uxtab), | ||
| 2022 | INTERPRETER_TRANSLATE(ssub8), | ||
| 2023 | INTERPRETER_TRANSLATE(shsub8), | ||
| 2024 | INTERPRETER_TRANSLATE(ssubaddx), | ||
| 2025 | INTERPRETER_TRANSLATE(strex), | ||
| 2026 | INTERPRETER_TRANSLATE(strexb), | ||
| 2027 | INTERPRETER_TRANSLATE(swp), | ||
| 2028 | INTERPRETER_TRANSLATE(swpb), | ||
| 2029 | INTERPRETER_TRANSLATE(ssub16), | ||
| 2030 | INTERPRETER_TRANSLATE(ssat16), | ||
| 2031 | INTERPRETER_TRANSLATE(shsubaddx), | ||
| 2032 | INTERPRETER_TRANSLATE(qsubaddx), | ||
| 2033 | INTERPRETER_TRANSLATE(shaddsubx), | ||
| 2034 | INTERPRETER_TRANSLATE(shadd8), | ||
| 2035 | INTERPRETER_TRANSLATE(shadd16), | ||
| 2036 | INTERPRETER_TRANSLATE(sel), | ||
| 2037 | INTERPRETER_TRANSLATE(saddsubx), | ||
| 2038 | INTERPRETER_TRANSLATE(sadd8), | ||
| 2039 | INTERPRETER_TRANSLATE(sadd16), | ||
| 2040 | INTERPRETER_TRANSLATE(shsub16), | ||
| 2041 | INTERPRETER_TRANSLATE(umaal), | ||
| 2042 | INTERPRETER_TRANSLATE(uxtab16), | ||
| 2043 | INTERPRETER_TRANSLATE(usubaddx), | ||
| 2044 | INTERPRETER_TRANSLATE(usub8), | ||
| 2045 | INTERPRETER_TRANSLATE(usub16), | ||
| 2046 | INTERPRETER_TRANSLATE(usat16), | ||
| 2047 | INTERPRETER_TRANSLATE(usada8), | ||
| 2048 | INTERPRETER_TRANSLATE(uqsubaddx), | ||
| 2049 | INTERPRETER_TRANSLATE(uqsub8), | ||
| 2050 | INTERPRETER_TRANSLATE(uqsub16), | ||
| 2051 | INTERPRETER_TRANSLATE(uqaddsubx), | ||
| 2052 | INTERPRETER_TRANSLATE(uqadd8), | ||
| 2053 | INTERPRETER_TRANSLATE(uqadd16), | ||
| 2054 | INTERPRETER_TRANSLATE(sxtab), | ||
| 2055 | INTERPRETER_TRANSLATE(uhsubaddx), | ||
| 2056 | INTERPRETER_TRANSLATE(uhsub8), | ||
| 2057 | INTERPRETER_TRANSLATE(uhsub16), | ||
| 2058 | INTERPRETER_TRANSLATE(uhaddsubx), | ||
| 2059 | INTERPRETER_TRANSLATE(uhadd8), | ||
| 2060 | INTERPRETER_TRANSLATE(uhadd16), | ||
| 2061 | INTERPRETER_TRANSLATE(uaddsubx), | ||
| 2062 | INTERPRETER_TRANSLATE(uadd8), | ||
| 2063 | INTERPRETER_TRANSLATE(uadd16), | ||
| 2064 | INTERPRETER_TRANSLATE(sxtah), | ||
| 2065 | INTERPRETER_TRANSLATE(sxtab16), | ||
| 2066 | INTERPRETER_TRANSLATE(qadd8), | ||
| 2067 | INTERPRETER_TRANSLATE(bxj), | ||
| 2068 | INTERPRETER_TRANSLATE(clz), | ||
| 2069 | INTERPRETER_TRANSLATE(uxtah), | ||
| 2070 | INTERPRETER_TRANSLATE(bx), | ||
| 2071 | INTERPRETER_TRANSLATE(rev), | ||
| 2072 | INTERPRETER_TRANSLATE(blx), | ||
| 2073 | INTERPRETER_TRANSLATE(revsh), | ||
| 2074 | INTERPRETER_TRANSLATE(qadd), | ||
| 2075 | INTERPRETER_TRANSLATE(qadd16), | ||
| 2076 | INTERPRETER_TRANSLATE(qaddsubx), | ||
| 2077 | INTERPRETER_TRANSLATE(ldrex), | ||
| 2078 | INTERPRETER_TRANSLATE(qdadd), | ||
| 2079 | INTERPRETER_TRANSLATE(qdsub), | ||
| 2080 | INTERPRETER_TRANSLATE(qsub), | ||
| 2081 | INTERPRETER_TRANSLATE(ldrexb), | ||
| 2082 | INTERPRETER_TRANSLATE(qsub8), | ||
| 2083 | INTERPRETER_TRANSLATE(qsub16), | ||
| 2084 | INTERPRETER_TRANSLATE(smuad), | ||
| 2085 | INTERPRETER_TRANSLATE(smmul), | ||
| 2086 | INTERPRETER_TRANSLATE(smusd), | ||
| 2087 | INTERPRETER_TRANSLATE(smlsd), | ||
| 2088 | INTERPRETER_TRANSLATE(smlsld), | ||
| 2089 | INTERPRETER_TRANSLATE(smmla), | ||
| 2090 | INTERPRETER_TRANSLATE(smmls), | ||
| 2091 | INTERPRETER_TRANSLATE(smlald), | ||
| 2092 | INTERPRETER_TRANSLATE(smlad), | ||
| 2093 | INTERPRETER_TRANSLATE(smlaw), | ||
| 2094 | INTERPRETER_TRANSLATE(smulw), | ||
| 2095 | INTERPRETER_TRANSLATE(pkhtb), | ||
| 2096 | INTERPRETER_TRANSLATE(pkhbt), | ||
| 2097 | INTERPRETER_TRANSLATE(smul), | ||
| 2098 | INTERPRETER_TRANSLATE(smlalxy), | ||
| 2099 | INTERPRETER_TRANSLATE(smla), | ||
| 2100 | INTERPRETER_TRANSLATE(mcrr), | ||
| 2101 | INTERPRETER_TRANSLATE(mrrc), | ||
| 2102 | INTERPRETER_TRANSLATE(cmp), | ||
| 2103 | INTERPRETER_TRANSLATE(tst), | ||
| 2104 | INTERPRETER_TRANSLATE(teq), | ||
| 2105 | INTERPRETER_TRANSLATE(cmn), | ||
| 2106 | INTERPRETER_TRANSLATE(smull), | ||
| 2107 | INTERPRETER_TRANSLATE(umull), | ||
| 2108 | INTERPRETER_TRANSLATE(umlal), | ||
| 2109 | INTERPRETER_TRANSLATE(smlal), | ||
| 2110 | INTERPRETER_TRANSLATE(mul), | ||
| 2111 | INTERPRETER_TRANSLATE(mla), | ||
| 2112 | INTERPRETER_TRANSLATE(ssat), | ||
| 2113 | INTERPRETER_TRANSLATE(usat), | ||
| 2114 | INTERPRETER_TRANSLATE(mrs), | ||
| 2115 | INTERPRETER_TRANSLATE(msr), | ||
| 2116 | INTERPRETER_TRANSLATE(and), | ||
| 2117 | INTERPRETER_TRANSLATE(bic), | ||
| 2118 | INTERPRETER_TRANSLATE(ldm), | ||
| 2119 | INTERPRETER_TRANSLATE(eor), | ||
| 2120 | INTERPRETER_TRANSLATE(add), | ||
| 2121 | INTERPRETER_TRANSLATE(rsb), | ||
| 2122 | INTERPRETER_TRANSLATE(rsc), | ||
| 2123 | INTERPRETER_TRANSLATE(sbc), | ||
| 2124 | INTERPRETER_TRANSLATE(adc), | ||
| 2125 | INTERPRETER_TRANSLATE(sub), | ||
| 2126 | INTERPRETER_TRANSLATE(orr), | ||
| 2127 | INTERPRETER_TRANSLATE(mvn), | ||
| 2128 | INTERPRETER_TRANSLATE(mov), | ||
| 2129 | INTERPRETER_TRANSLATE(stm), | ||
| 2130 | INTERPRETER_TRANSLATE(ldm), | ||
| 2131 | INTERPRETER_TRANSLATE(ldrsh), | ||
| 2132 | INTERPRETER_TRANSLATE(stm), | ||
| 2133 | INTERPRETER_TRANSLATE(ldm), | ||
| 2134 | INTERPRETER_TRANSLATE(ldrsb), | ||
| 2135 | INTERPRETER_TRANSLATE(strd), | ||
| 2136 | INTERPRETER_TRANSLATE(ldrh), | ||
| 2137 | INTERPRETER_TRANSLATE(strh), | ||
| 2138 | INTERPRETER_TRANSLATE(ldrd), | ||
| 2139 | INTERPRETER_TRANSLATE(strt), | ||
| 2140 | INTERPRETER_TRANSLATE(strbt), | ||
| 2141 | INTERPRETER_TRANSLATE(ldrbt), | ||
| 2142 | INTERPRETER_TRANSLATE(ldrt), | ||
| 2143 | INTERPRETER_TRANSLATE(mrc), | ||
| 2144 | INTERPRETER_TRANSLATE(mcr), | ||
| 2145 | INTERPRETER_TRANSLATE(msr), | ||
| 2146 | INTERPRETER_TRANSLATE(msr), | ||
| 2147 | INTERPRETER_TRANSLATE(msr), | ||
| 2148 | INTERPRETER_TRANSLATE(msr), | ||
| 2149 | INTERPRETER_TRANSLATE(msr), | ||
| 2150 | INTERPRETER_TRANSLATE(ldrb), | ||
| 2151 | INTERPRETER_TRANSLATE(strb), | ||
| 2152 | INTERPRETER_TRANSLATE(ldr), | ||
| 2153 | INTERPRETER_TRANSLATE(ldrcond), | ||
| 2154 | INTERPRETER_TRANSLATE(str), | ||
| 2155 | INTERPRETER_TRANSLATE(cdp), | ||
| 2156 | INTERPRETER_TRANSLATE(stc), | ||
| 2157 | INTERPRETER_TRANSLATE(ldc), | ||
| 2158 | INTERPRETER_TRANSLATE(ldrexd), | ||
| 2159 | INTERPRETER_TRANSLATE(strexd), | ||
| 2160 | INTERPRETER_TRANSLATE(ldrexh), | ||
| 2161 | INTERPRETER_TRANSLATE(strexh), | ||
| 2162 | INTERPRETER_TRANSLATE(nop), | ||
| 2163 | INTERPRETER_TRANSLATE(yield), | ||
| 2164 | INTERPRETER_TRANSLATE(wfe), | ||
| 2165 | INTERPRETER_TRANSLATE(wfi), | ||
| 2166 | INTERPRETER_TRANSLATE(sev), | ||
| 2167 | INTERPRETER_TRANSLATE(swi), | ||
| 2168 | INTERPRETER_TRANSLATE(bbl), | ||
| 2169 | |||
| 2170 | // All the thumb instructions should be placed the end of table | ||
| 2171 | INTERPRETER_TRANSLATE(b_2_thumb), | ||
| 2172 | INTERPRETER_TRANSLATE(b_cond_thumb), | ||
| 2173 | INTERPRETER_TRANSLATE(bl_1_thumb), | ||
| 2174 | INTERPRETER_TRANSLATE(bl_2_thumb), | ||
| 2175 | INTERPRETER_TRANSLATE(blx_1_thumb) | ||
| 2176 | }; | ||
| 2177 | |||
| 2178 | const size_t arm_instruction_trans_len = sizeof(arm_instruction_trans) / sizeof(transop_fp_t); | ||
diff --git a/src/core/arm/dyncom/arm_dyncom_trans.h b/src/core/arm/dyncom/arm_dyncom_trans.h new file mode 100644 index 000000000..7af71f4e3 --- /dev/null +++ b/src/core/arm/dyncom/arm_dyncom_trans.h | |||
| @@ -0,0 +1,493 @@ | |||
| 1 | struct ARMul_State; | ||
| 2 | typedef unsigned int (*shtop_fp_t)(ARMul_State* cpu, unsigned int sht_oper); | ||
| 3 | |||
| 4 | enum class TransExtData { | ||
| 5 | COND = (1 << 0), | ||
| 6 | NON_BRANCH = (1 << 1), | ||
| 7 | DIRECT_BRANCH = (1 << 2), | ||
| 8 | INDIRECT_BRANCH = (1 << 3), | ||
| 9 | CALL = (1 << 4), | ||
| 10 | RET = (1 << 5), | ||
| 11 | END_OF_PAGE = (1 << 6), | ||
| 12 | THUMB = (1 << 7), | ||
| 13 | SINGLE_STEP = (1 << 8) | ||
| 14 | }; | ||
| 15 | |||
| 16 | struct arm_inst { | ||
| 17 | unsigned int idx; | ||
| 18 | unsigned int cond; | ||
| 19 | TransExtData br; | ||
| 20 | char component[0]; | ||
| 21 | }; | ||
| 22 | |||
| 23 | struct generic_arm_inst { | ||
| 24 | u32 Ra; | ||
| 25 | u32 Rm; | ||
| 26 | u32 Rn; | ||
| 27 | u32 Rd; | ||
| 28 | u8 op1; | ||
| 29 | u8 op2; | ||
| 30 | }; | ||
| 31 | |||
| 32 | struct adc_inst { | ||
| 33 | unsigned int I; | ||
| 34 | unsigned int S; | ||
| 35 | unsigned int Rn; | ||
| 36 | unsigned int Rd; | ||
| 37 | unsigned int shifter_operand; | ||
| 38 | shtop_fp_t shtop_func; | ||
| 39 | }; | ||
| 40 | |||
| 41 | struct add_inst { | ||
| 42 | unsigned int I; | ||
| 43 | unsigned int S; | ||
| 44 | unsigned int Rn; | ||
| 45 | unsigned int Rd; | ||
| 46 | unsigned int shifter_operand; | ||
| 47 | shtop_fp_t shtop_func; | ||
| 48 | }; | ||
| 49 | |||
| 50 | struct orr_inst { | ||
| 51 | unsigned int I; | ||
| 52 | unsigned int S; | ||
| 53 | unsigned int Rn; | ||
| 54 | unsigned int Rd; | ||
| 55 | unsigned int shifter_operand; | ||
| 56 | shtop_fp_t shtop_func; | ||
| 57 | }; | ||
| 58 | |||
| 59 | struct and_inst { | ||
| 60 | unsigned int I; | ||
| 61 | unsigned int S; | ||
| 62 | unsigned int Rn; | ||
| 63 | unsigned int Rd; | ||
| 64 | unsigned int shifter_operand; | ||
| 65 | shtop_fp_t shtop_func; | ||
| 66 | }; | ||
| 67 | |||
| 68 | struct eor_inst { | ||
| 69 | unsigned int I; | ||
| 70 | unsigned int S; | ||
| 71 | unsigned int Rn; | ||
| 72 | unsigned int Rd; | ||
| 73 | unsigned int shifter_operand; | ||
| 74 | shtop_fp_t shtop_func; | ||
| 75 | }; | ||
| 76 | |||
| 77 | struct bbl_inst { | ||
| 78 | unsigned int L; | ||
| 79 | int signed_immed_24; | ||
| 80 | unsigned int next_addr; | ||
| 81 | unsigned int jmp_addr; | ||
| 82 | }; | ||
| 83 | |||
| 84 | struct bx_inst { | ||
| 85 | unsigned int Rm; | ||
| 86 | }; | ||
| 87 | |||
| 88 | struct blx_inst { | ||
| 89 | union { | ||
| 90 | s32 signed_immed_24; | ||
| 91 | u32 Rm; | ||
| 92 | } val; | ||
| 93 | unsigned int inst; | ||
| 94 | }; | ||
| 95 | |||
| 96 | struct clz_inst { | ||
| 97 | unsigned int Rm; | ||
| 98 | unsigned int Rd; | ||
| 99 | }; | ||
| 100 | |||
| 101 | struct cps_inst { | ||
| 102 | unsigned int imod0; | ||
| 103 | unsigned int imod1; | ||
| 104 | unsigned int mmod; | ||
| 105 | unsigned int A, I, F; | ||
| 106 | unsigned int mode; | ||
| 107 | }; | ||
| 108 | |||
| 109 | struct clrex_inst { | ||
| 110 | }; | ||
| 111 | |||
| 112 | struct cpy_inst { | ||
| 113 | unsigned int Rm; | ||
| 114 | unsigned int Rd; | ||
| 115 | }; | ||
| 116 | |||
| 117 | struct bic_inst { | ||
| 118 | unsigned int I; | ||
| 119 | unsigned int S; | ||
| 120 | unsigned int Rn; | ||
| 121 | unsigned int Rd; | ||
| 122 | unsigned int shifter_operand; | ||
| 123 | shtop_fp_t shtop_func; | ||
| 124 | }; | ||
| 125 | |||
| 126 | struct sub_inst { | ||
| 127 | unsigned int I; | ||
| 128 | unsigned int S; | ||
| 129 | unsigned int Rn; | ||
| 130 | unsigned int Rd; | ||
| 131 | unsigned int shifter_operand; | ||
| 132 | shtop_fp_t shtop_func; | ||
| 133 | }; | ||
| 134 | |||
| 135 | struct tst_inst { | ||
| 136 | unsigned int I; | ||
| 137 | unsigned int S; | ||
| 138 | unsigned int Rn; | ||
| 139 | unsigned int Rd; | ||
| 140 | unsigned int shifter_operand; | ||
| 141 | shtop_fp_t shtop_func; | ||
| 142 | }; | ||
| 143 | |||
| 144 | struct cmn_inst { | ||
| 145 | unsigned int I; | ||
| 146 | unsigned int Rn; | ||
| 147 | unsigned int shifter_operand; | ||
| 148 | shtop_fp_t shtop_func; | ||
| 149 | }; | ||
| 150 | |||
| 151 | struct teq_inst { | ||
| 152 | unsigned int I; | ||
| 153 | unsigned int Rn; | ||
| 154 | unsigned int shifter_operand; | ||
| 155 | shtop_fp_t shtop_func; | ||
| 156 | }; | ||
| 157 | |||
| 158 | struct stm_inst { | ||
| 159 | unsigned int inst; | ||
| 160 | }; | ||
| 161 | |||
| 162 | struct bkpt_inst { | ||
| 163 | u32 imm; | ||
| 164 | }; | ||
| 165 | |||
| 166 | struct stc_inst { | ||
| 167 | }; | ||
| 168 | |||
| 169 | struct ldc_inst { | ||
| 170 | }; | ||
| 171 | |||
| 172 | struct swi_inst { | ||
| 173 | unsigned int num; | ||
| 174 | }; | ||
| 175 | |||
| 176 | struct cmp_inst { | ||
| 177 | unsigned int I; | ||
| 178 | unsigned int Rn; | ||
| 179 | unsigned int shifter_operand; | ||
| 180 | shtop_fp_t shtop_func; | ||
| 181 | }; | ||
| 182 | |||
| 183 | struct mov_inst { | ||
| 184 | unsigned int I; | ||
| 185 | unsigned int S; | ||
| 186 | unsigned int Rd; | ||
| 187 | unsigned int shifter_operand; | ||
| 188 | shtop_fp_t shtop_func; | ||
| 189 | }; | ||
| 190 | |||
| 191 | struct mvn_inst { | ||
| 192 | unsigned int I; | ||
| 193 | unsigned int S; | ||
| 194 | unsigned int Rd; | ||
| 195 | unsigned int shifter_operand; | ||
| 196 | shtop_fp_t shtop_func; | ||
| 197 | }; | ||
| 198 | |||
| 199 | struct rev_inst { | ||
| 200 | unsigned int Rd; | ||
| 201 | unsigned int Rm; | ||
| 202 | unsigned int op1; | ||
| 203 | unsigned int op2; | ||
| 204 | }; | ||
| 205 | |||
| 206 | struct rsb_inst { | ||
| 207 | unsigned int I; | ||
| 208 | unsigned int S; | ||
| 209 | unsigned int Rn; | ||
| 210 | unsigned int Rd; | ||
| 211 | unsigned int shifter_operand; | ||
| 212 | shtop_fp_t shtop_func; | ||
| 213 | }; | ||
| 214 | |||
| 215 | struct rsc_inst { | ||
| 216 | unsigned int I; | ||
| 217 | unsigned int S; | ||
| 218 | unsigned int Rn; | ||
| 219 | unsigned int Rd; | ||
| 220 | unsigned int shifter_operand; | ||
| 221 | shtop_fp_t shtop_func; | ||
| 222 | }; | ||
| 223 | |||
| 224 | struct sbc_inst { | ||
| 225 | unsigned int I; | ||
| 226 | unsigned int S; | ||
| 227 | unsigned int Rn; | ||
| 228 | unsigned int Rd; | ||
| 229 | unsigned int shifter_operand; | ||
| 230 | shtop_fp_t shtop_func; | ||
| 231 | }; | ||
| 232 | |||
| 233 | struct mul_inst { | ||
| 234 | unsigned int S; | ||
| 235 | unsigned int Rd; | ||
| 236 | unsigned int Rs; | ||
| 237 | unsigned int Rm; | ||
| 238 | }; | ||
| 239 | |||
| 240 | struct smul_inst { | ||
| 241 | unsigned int Rd; | ||
| 242 | unsigned int Rs; | ||
| 243 | unsigned int Rm; | ||
| 244 | unsigned int x; | ||
| 245 | unsigned int y; | ||
| 246 | }; | ||
| 247 | |||
| 248 | struct umull_inst { | ||
| 249 | unsigned int S; | ||
| 250 | unsigned int RdHi; | ||
| 251 | unsigned int RdLo; | ||
| 252 | unsigned int Rs; | ||
| 253 | unsigned int Rm; | ||
| 254 | }; | ||
| 255 | |||
| 256 | struct smlad_inst { | ||
| 257 | unsigned int m; | ||
| 258 | unsigned int Rm; | ||
| 259 | unsigned int Rd; | ||
| 260 | unsigned int Ra; | ||
| 261 | unsigned int Rn; | ||
| 262 | unsigned int op1; | ||
| 263 | unsigned int op2; | ||
| 264 | }; | ||
| 265 | |||
| 266 | struct smla_inst { | ||
| 267 | unsigned int x; | ||
| 268 | unsigned int y; | ||
| 269 | unsigned int Rm; | ||
| 270 | unsigned int Rd; | ||
| 271 | unsigned int Rs; | ||
| 272 | unsigned int Rn; | ||
| 273 | }; | ||
| 274 | |||
| 275 | struct smlalxy_inst { | ||
| 276 | unsigned int x; | ||
| 277 | unsigned int y; | ||
| 278 | unsigned int RdLo; | ||
| 279 | unsigned int RdHi; | ||
| 280 | unsigned int Rm; | ||
| 281 | unsigned int Rn; | ||
| 282 | }; | ||
| 283 | |||
| 284 | struct ssat_inst { | ||
| 285 | unsigned int Rn; | ||
| 286 | unsigned int Rd; | ||
| 287 | unsigned int imm5; | ||
| 288 | unsigned int sat_imm; | ||
| 289 | unsigned int shift_type; | ||
| 290 | }; | ||
| 291 | |||
| 292 | struct umaal_inst { | ||
| 293 | unsigned int Rn; | ||
| 294 | unsigned int Rm; | ||
| 295 | unsigned int RdHi; | ||
| 296 | unsigned int RdLo; | ||
| 297 | }; | ||
| 298 | |||
| 299 | struct umlal_inst { | ||
| 300 | unsigned int S; | ||
| 301 | unsigned int Rm; | ||
| 302 | unsigned int Rs; | ||
| 303 | unsigned int RdHi; | ||
| 304 | unsigned int RdLo; | ||
| 305 | }; | ||
| 306 | |||
| 307 | struct smlal_inst { | ||
| 308 | unsigned int S; | ||
| 309 | unsigned int Rm; | ||
| 310 | unsigned int Rs; | ||
| 311 | unsigned int RdHi; | ||
| 312 | unsigned int RdLo; | ||
| 313 | }; | ||
| 314 | |||
| 315 | struct smlald_inst { | ||
| 316 | unsigned int RdLo; | ||
| 317 | unsigned int RdHi; | ||
| 318 | unsigned int Rm; | ||
| 319 | unsigned int Rn; | ||
| 320 | unsigned int swap; | ||
| 321 | unsigned int op1; | ||
| 322 | unsigned int op2; | ||
| 323 | }; | ||
| 324 | |||
| 325 | struct mla_inst { | ||
| 326 | unsigned int S; | ||
| 327 | unsigned int Rn; | ||
| 328 | unsigned int Rd; | ||
| 329 | unsigned int Rs; | ||
| 330 | unsigned int Rm; | ||
| 331 | }; | ||
| 332 | |||
| 333 | struct mrc_inst { | ||
| 334 | unsigned int opcode_1; | ||
| 335 | unsigned int opcode_2; | ||
| 336 | unsigned int cp_num; | ||
| 337 | unsigned int crn; | ||
| 338 | unsigned int crm; | ||
| 339 | unsigned int Rd; | ||
| 340 | unsigned int inst; | ||
| 341 | }; | ||
| 342 | |||
| 343 | struct mcr_inst { | ||
| 344 | unsigned int opcode_1; | ||
| 345 | unsigned int opcode_2; | ||
| 346 | unsigned int cp_num; | ||
| 347 | unsigned int crn; | ||
| 348 | unsigned int crm; | ||
| 349 | unsigned int Rd; | ||
| 350 | unsigned int inst; | ||
| 351 | }; | ||
| 352 | |||
| 353 | struct mcrr_inst { | ||
| 354 | unsigned int opcode_1; | ||
| 355 | unsigned int cp_num; | ||
| 356 | unsigned int crm; | ||
| 357 | unsigned int rt; | ||
| 358 | unsigned int rt2; | ||
| 359 | }; | ||
| 360 | |||
| 361 | struct mrs_inst { | ||
| 362 | unsigned int R; | ||
| 363 | unsigned int Rd; | ||
| 364 | }; | ||
| 365 | |||
| 366 | struct msr_inst { | ||
| 367 | unsigned int field_mask; | ||
| 368 | unsigned int R; | ||
| 369 | unsigned int inst; | ||
| 370 | }; | ||
| 371 | |||
| 372 | struct pld_inst { | ||
| 373 | }; | ||
| 374 | |||
| 375 | struct sxtb_inst { | ||
| 376 | unsigned int Rd; | ||
| 377 | unsigned int Rm; | ||
| 378 | unsigned int rotate; | ||
| 379 | }; | ||
| 380 | |||
| 381 | struct sxtab_inst { | ||
| 382 | unsigned int Rd; | ||
| 383 | unsigned int Rn; | ||
| 384 | unsigned int Rm; | ||
| 385 | unsigned rotate; | ||
| 386 | }; | ||
| 387 | |||
| 388 | struct sxtah_inst { | ||
| 389 | unsigned int Rd; | ||
| 390 | unsigned int Rn; | ||
| 391 | unsigned int Rm; | ||
| 392 | unsigned int rotate; | ||
| 393 | }; | ||
| 394 | |||
| 395 | struct sxth_inst { | ||
| 396 | unsigned int Rd; | ||
| 397 | unsigned int Rm; | ||
| 398 | unsigned int rotate; | ||
| 399 | }; | ||
| 400 | |||
| 401 | struct uxtab_inst { | ||
| 402 | unsigned int Rn; | ||
| 403 | unsigned int Rd; | ||
| 404 | unsigned int rotate; | ||
| 405 | unsigned int Rm; | ||
| 406 | }; | ||
| 407 | |||
| 408 | struct uxtah_inst { | ||
| 409 | unsigned int Rn; | ||
| 410 | unsigned int Rd; | ||
| 411 | unsigned int rotate; | ||
| 412 | unsigned int Rm; | ||
| 413 | }; | ||
| 414 | |||
| 415 | struct uxth_inst { | ||
| 416 | unsigned int Rd; | ||
| 417 | unsigned int Rm; | ||
| 418 | unsigned int rotate; | ||
| 419 | }; | ||
| 420 | |||
| 421 | struct cdp_inst { | ||
| 422 | unsigned int opcode_1; | ||
| 423 | unsigned int CRn; | ||
| 424 | unsigned int CRd; | ||
| 425 | unsigned int cp_num; | ||
| 426 | unsigned int opcode_2; | ||
| 427 | unsigned int CRm; | ||
| 428 | unsigned int inst; | ||
| 429 | }; | ||
| 430 | |||
| 431 | struct uxtb_inst { | ||
| 432 | unsigned int Rd; | ||
| 433 | unsigned int Rm; | ||
| 434 | unsigned int rotate; | ||
| 435 | }; | ||
| 436 | |||
| 437 | struct swp_inst { | ||
| 438 | unsigned int Rn; | ||
| 439 | unsigned int Rd; | ||
| 440 | unsigned int Rm; | ||
| 441 | }; | ||
| 442 | |||
| 443 | struct setend_inst { | ||
| 444 | unsigned int set_bigend; | ||
| 445 | }; | ||
| 446 | |||
| 447 | struct b_2_thumb { | ||
| 448 | unsigned int imm; | ||
| 449 | }; | ||
| 450 | struct b_cond_thumb { | ||
| 451 | unsigned int imm; | ||
| 452 | unsigned int cond; | ||
| 453 | }; | ||
| 454 | |||
| 455 | struct bl_1_thumb { | ||
| 456 | unsigned int imm; | ||
| 457 | }; | ||
| 458 | struct bl_2_thumb { | ||
| 459 | unsigned int imm; | ||
| 460 | }; | ||
| 461 | struct blx_1_thumb { | ||
| 462 | unsigned int imm; | ||
| 463 | unsigned int instr; | ||
| 464 | }; | ||
| 465 | |||
| 466 | struct pkh_inst { | ||
| 467 | unsigned int Rm; | ||
| 468 | unsigned int Rn; | ||
| 469 | unsigned int Rd; | ||
| 470 | unsigned char imm; | ||
| 471 | }; | ||
| 472 | |||
| 473 | // Floating point VFPv3 structures | ||
| 474 | #define VFP_INTERPRETER_STRUCT | ||
| 475 | #include "core/arm/skyeye_common/vfp/vfpinstr.cpp" | ||
| 476 | #undef VFP_INTERPRETER_STRUCT | ||
| 477 | |||
| 478 | typedef void (*get_addr_fp_t)(ARMul_State *cpu, unsigned int inst, unsigned int &virt_addr); | ||
| 479 | |||
| 480 | struct ldst_inst { | ||
| 481 | unsigned int inst; | ||
| 482 | get_addr_fp_t get_addr; | ||
| 483 | }; | ||
| 484 | |||
| 485 | typedef arm_inst* ARM_INST_PTR; | ||
| 486 | typedef ARM_INST_PTR (*transop_fp_t)(unsigned int, int); | ||
| 487 | |||
| 488 | extern const transop_fp_t arm_instruction_trans[]; | ||
| 489 | extern const size_t arm_instruction_trans_len; | ||
| 490 | |||
| 491 | #define TRANS_CACHE_SIZE (64 * 1024 * 2000) | ||
| 492 | extern char trans_cache_buf[TRANS_CACHE_SIZE]; | ||
| 493 | extern size_t trans_cache_buf_top; | ||
diff --git a/src/core/arm/skyeye_common/vfp/vfpinstr.cpp b/src/core/arm/skyeye_common/vfp/vfpinstr.cpp index 4f9083515..1a98d0114 100644 --- a/src/core/arm/skyeye_common/vfp/vfpinstr.cpp +++ b/src/core/arm/skyeye_common/vfp/vfpinstr.cpp | |||
| @@ -26,7 +26,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmla)(unsigned int inst, int index) | |||
| 26 | 26 | ||
| 27 | inst_base->cond = BITS(inst, 28, 31); | 27 | inst_base->cond = BITS(inst, 28, 31); |
| 28 | inst_base->idx = index; | 28 | inst_base->idx = index; |
| 29 | inst_base->br = NON_BRANCH; | 29 | inst_base->br = TransExtData::NON_BRANCH; |
| 30 | 30 | ||
| 31 | inst_cream->dp_operation = BIT(inst, 8); | 31 | inst_cream->dp_operation = BIT(inst, 8); |
| 32 | inst_cream->instr = inst; | 32 | inst_cream->instr = inst; |
| @@ -75,7 +75,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmls)(unsigned int inst, int index) | |||
| 75 | 75 | ||
| 76 | inst_base->cond = BITS(inst, 28, 31); | 76 | inst_base->cond = BITS(inst, 28, 31); |
| 77 | inst_base->idx = index; | 77 | inst_base->idx = index; |
| 78 | inst_base->br = NON_BRANCH; | 78 | inst_base->br = TransExtData::NON_BRANCH; |
| 79 | 79 | ||
| 80 | inst_cream->dp_operation = BIT(inst, 8); | 80 | inst_cream->dp_operation = BIT(inst, 8); |
| 81 | inst_cream->instr = inst; | 81 | inst_cream->instr = inst; |
| @@ -124,7 +124,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vnmla)(unsigned int inst, int index) | |||
| 124 | 124 | ||
| 125 | inst_base->cond = BITS(inst, 28, 31); | 125 | inst_base->cond = BITS(inst, 28, 31); |
| 126 | inst_base->idx = index; | 126 | inst_base->idx = index; |
| 127 | inst_base->br = NON_BRANCH; | 127 | inst_base->br = TransExtData::NON_BRANCH; |
| 128 | 128 | ||
| 129 | inst_cream->dp_operation = BIT(inst, 8); | 129 | inst_cream->dp_operation = BIT(inst, 8); |
| 130 | inst_cream->instr = inst; | 130 | inst_cream->instr = inst; |
| @@ -174,7 +174,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vnmls)(unsigned int inst, int index) | |||
| 174 | 174 | ||
| 175 | inst_base->cond = BITS(inst, 28, 31); | 175 | inst_base->cond = BITS(inst, 28, 31); |
| 176 | inst_base->idx = index; | 176 | inst_base->idx = index; |
| 177 | inst_base->br = NON_BRANCH; | 177 | inst_base->br = TransExtData::NON_BRANCH; |
| 178 | 178 | ||
| 179 | inst_cream->dp_operation = BIT(inst, 8); | 179 | inst_cream->dp_operation = BIT(inst, 8); |
| 180 | inst_cream->instr = inst; | 180 | inst_cream->instr = inst; |
| @@ -223,7 +223,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vnmul)(unsigned int inst, int index) | |||
| 223 | 223 | ||
| 224 | inst_base->cond = BITS(inst, 28, 31); | 224 | inst_base->cond = BITS(inst, 28, 31); |
| 225 | inst_base->idx = index; | 225 | inst_base->idx = index; |
| 226 | inst_base->br = NON_BRANCH; | 226 | inst_base->br = TransExtData::NON_BRANCH; |
| 227 | 227 | ||
| 228 | inst_cream->dp_operation = BIT(inst, 8); | 228 | inst_cream->dp_operation = BIT(inst, 8); |
| 229 | inst_cream->instr = inst; | 229 | inst_cream->instr = inst; |
| @@ -272,7 +272,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmul)(unsigned int inst, int index) | |||
| 272 | 272 | ||
| 273 | inst_base->cond = BITS(inst, 28, 31); | 273 | inst_base->cond = BITS(inst, 28, 31); |
| 274 | inst_base->idx = index; | 274 | inst_base->idx = index; |
| 275 | inst_base->br = NON_BRANCH; | 275 | inst_base->br = TransExtData::NON_BRANCH; |
| 276 | 276 | ||
| 277 | inst_cream->dp_operation = BIT(inst, 8); | 277 | inst_cream->dp_operation = BIT(inst, 8); |
| 278 | inst_cream->instr = inst; | 278 | inst_cream->instr = inst; |
| @@ -321,7 +321,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vadd)(unsigned int inst, int index) | |||
| 321 | 321 | ||
| 322 | inst_base->cond = BITS(inst, 28, 31); | 322 | inst_base->cond = BITS(inst, 28, 31); |
| 323 | inst_base->idx = index; | 323 | inst_base->idx = index; |
| 324 | inst_base->br = NON_BRANCH; | 324 | inst_base->br = TransExtData::NON_BRANCH; |
| 325 | 325 | ||
| 326 | inst_cream->dp_operation = BIT(inst, 8); | 326 | inst_cream->dp_operation = BIT(inst, 8); |
| 327 | inst_cream->instr = inst; | 327 | inst_cream->instr = inst; |
| @@ -370,7 +370,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vsub)(unsigned int inst, int index) | |||
| 370 | 370 | ||
| 371 | inst_base->cond = BITS(inst, 28, 31); | 371 | inst_base->cond = BITS(inst, 28, 31); |
| 372 | inst_base->idx = index; | 372 | inst_base->idx = index; |
| 373 | inst_base->br = NON_BRANCH; | 373 | inst_base->br = TransExtData::NON_BRANCH; |
| 374 | 374 | ||
| 375 | inst_cream->dp_operation = BIT(inst, 8); | 375 | inst_cream->dp_operation = BIT(inst, 8); |
| 376 | inst_cream->instr = inst; | 376 | inst_cream->instr = inst; |
| @@ -419,7 +419,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vdiv)(unsigned int inst, int index) | |||
| 419 | 419 | ||
| 420 | inst_base->cond = BITS(inst, 28, 31); | 420 | inst_base->cond = BITS(inst, 28, 31); |
| 421 | inst_base->idx = index; | 421 | inst_base->idx = index; |
| 422 | inst_base->br = NON_BRANCH; | 422 | inst_base->br = TransExtData::NON_BRANCH; |
| 423 | 423 | ||
| 424 | inst_cream->dp_operation = BIT(inst, 8); | 424 | inst_cream->dp_operation = BIT(inst, 8); |
| 425 | inst_cream->instr = inst; | 425 | inst_cream->instr = inst; |
| @@ -470,7 +470,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmovi)(unsigned int inst, int index) | |||
| 470 | 470 | ||
| 471 | inst_base->cond = BITS(inst, 28, 31); | 471 | inst_base->cond = BITS(inst, 28, 31); |
| 472 | inst_base->idx = index; | 472 | inst_base->idx = index; |
| 473 | inst_base->br = NON_BRANCH; | 473 | inst_base->br = TransExtData::NON_BRANCH; |
| 474 | 474 | ||
| 475 | inst_cream->single = BIT(inst, 8) == 0; | 475 | inst_cream->single = BIT(inst, 8) == 0; |
| 476 | inst_cream->d = (inst_cream->single ? BITS(inst,12,15)<<1 | BIT(inst,22) : BITS(inst,12,15) | BIT(inst,22)<<4); | 476 | inst_cream->d = (inst_cream->single ? BITS(inst,12,15)<<1 | BIT(inst,22) : BITS(inst,12,15) | BIT(inst,22)<<4); |
| @@ -518,7 +518,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmovr)(unsigned int inst, int index) | |||
| 518 | 518 | ||
| 519 | inst_base->cond = BITS(inst, 28, 31); | 519 | inst_base->cond = BITS(inst, 28, 31); |
| 520 | inst_base->idx = index; | 520 | inst_base->idx = index; |
| 521 | inst_base->br = NON_BRANCH; | 521 | inst_base->br = TransExtData::NON_BRANCH; |
| 522 | 522 | ||
| 523 | inst_cream->single = BIT(inst, 8) == 0; | 523 | inst_cream->single = BIT(inst, 8) == 0; |
| 524 | inst_cream->d = (inst_cream->single ? BITS(inst,12,15)<<1 | BIT(inst,22) : BITS(inst,12,15) | BIT(inst,22)<<4); | 524 | inst_cream->d = (inst_cream->single ? BITS(inst,12,15)<<1 | BIT(inst,22) : BITS(inst,12,15) | BIT(inst,22)<<4); |
| @@ -560,7 +560,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vabs)(unsigned int inst, int index) | |||
| 560 | 560 | ||
| 561 | inst_base->cond = BITS(inst, 28, 31); | 561 | inst_base->cond = BITS(inst, 28, 31); |
| 562 | inst_base->idx = index; | 562 | inst_base->idx = index; |
| 563 | inst_base->br = NON_BRANCH; | 563 | inst_base->br = TransExtData::NON_BRANCH; |
| 564 | 564 | ||
| 565 | inst_cream->dp_operation = BIT(inst, 8); | 565 | inst_cream->dp_operation = BIT(inst, 8); |
| 566 | inst_cream->instr = inst; | 566 | inst_cream->instr = inst; |
| @@ -610,7 +610,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vneg)(unsigned int inst, int index) | |||
| 610 | 610 | ||
| 611 | inst_base->cond = BITS(inst, 28, 31); | 611 | inst_base->cond = BITS(inst, 28, 31); |
| 612 | inst_base->idx = index; | 612 | inst_base->idx = index; |
| 613 | inst_base->br = NON_BRANCH; | 613 | inst_base->br = TransExtData::NON_BRANCH; |
| 614 | 614 | ||
| 615 | inst_cream->dp_operation = BIT(inst, 8); | 615 | inst_cream->dp_operation = BIT(inst, 8); |
| 616 | inst_cream->instr = inst; | 616 | inst_cream->instr = inst; |
| @@ -659,7 +659,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vsqrt)(unsigned int inst, int index) | |||
| 659 | 659 | ||
| 660 | inst_base->cond = BITS(inst, 28, 31); | 660 | inst_base->cond = BITS(inst, 28, 31); |
| 661 | inst_base->idx = index; | 661 | inst_base->idx = index; |
| 662 | inst_base->br = NON_BRANCH; | 662 | inst_base->br = TransExtData::NON_BRANCH; |
| 663 | 663 | ||
| 664 | inst_cream->dp_operation = BIT(inst, 8); | 664 | inst_cream->dp_operation = BIT(inst, 8); |
| 665 | inst_cream->instr = inst; | 665 | inst_cream->instr = inst; |
| @@ -708,7 +708,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vcmp)(unsigned int inst, int index) | |||
| 708 | 708 | ||
| 709 | inst_base->cond = BITS(inst, 28, 31); | 709 | inst_base->cond = BITS(inst, 28, 31); |
| 710 | inst_base->idx = index; | 710 | inst_base->idx = index; |
| 711 | inst_base->br = NON_BRANCH; | 711 | inst_base->br = TransExtData::NON_BRANCH; |
| 712 | 712 | ||
| 713 | inst_cream->dp_operation = BIT(inst, 8); | 713 | inst_cream->dp_operation = BIT(inst, 8); |
| 714 | inst_cream->instr = inst; | 714 | inst_cream->instr = inst; |
| @@ -757,7 +757,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vcmp2)(unsigned int inst, int index) | |||
| 757 | 757 | ||
| 758 | inst_base->cond = BITS(inst, 28, 31); | 758 | inst_base->cond = BITS(inst, 28, 31); |
| 759 | inst_base->idx = index; | 759 | inst_base->idx = index; |
| 760 | inst_base->br = NON_BRANCH; | 760 | inst_base->br = TransExtData::NON_BRANCH; |
| 761 | 761 | ||
| 762 | inst_cream->dp_operation = BIT(inst, 8); | 762 | inst_cream->dp_operation = BIT(inst, 8); |
| 763 | inst_cream->instr = inst; | 763 | inst_cream->instr = inst; |
| @@ -806,7 +806,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vcvtbds)(unsigned int inst, int index) | |||
| 806 | 806 | ||
| 807 | inst_base->cond = BITS(inst, 28, 31); | 807 | inst_base->cond = BITS(inst, 28, 31); |
| 808 | inst_base->idx = index; | 808 | inst_base->idx = index; |
| 809 | inst_base->br = NON_BRANCH; | 809 | inst_base->br = TransExtData::NON_BRANCH; |
| 810 | 810 | ||
| 811 | inst_cream->dp_operation = BIT(inst, 8); | 811 | inst_cream->dp_operation = BIT(inst, 8); |
| 812 | inst_cream->instr = inst; | 812 | inst_cream->instr = inst; |
| @@ -857,7 +857,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vcvtbff)(unsigned int inst, int index) | |||
| 857 | 857 | ||
| 858 | inst_base->cond = BITS(inst, 28, 31); | 858 | inst_base->cond = BITS(inst, 28, 31); |
| 859 | inst_base->idx = index; | 859 | inst_base->idx = index; |
| 860 | inst_base->br = NON_BRANCH; | 860 | inst_base->br = TransExtData::NON_BRANCH; |
| 861 | 861 | ||
| 862 | inst_cream->dp_operation = BIT(inst, 8); | 862 | inst_cream->dp_operation = BIT(inst, 8); |
| 863 | inst_cream->instr = inst; | 863 | inst_cream->instr = inst; |
| @@ -906,7 +906,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vcvtbfi)(unsigned int inst, int index) | |||
| 906 | 906 | ||
| 907 | inst_base->cond = BITS(inst, 28, 31); | 907 | inst_base->cond = BITS(inst, 28, 31); |
| 908 | inst_base->idx = index; | 908 | inst_base->idx = index; |
| 909 | inst_base->br = NON_BRANCH; | 909 | inst_base->br = TransExtData::NON_BRANCH; |
| 910 | 910 | ||
| 911 | inst_cream->dp_operation = BIT(inst, 8); | 911 | inst_cream->dp_operation = BIT(inst, 8); |
| 912 | inst_cream->instr = inst; | 912 | inst_cream->instr = inst; |
| @@ -962,7 +962,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmovbrs)(unsigned int inst, int index) | |||
| 962 | 962 | ||
| 963 | inst_base->cond = BITS(inst, 28, 31); | 963 | inst_base->cond = BITS(inst, 28, 31); |
| 964 | inst_base->idx = index; | 964 | inst_base->idx = index; |
| 965 | inst_base->br = NON_BRANCH; | 965 | inst_base->br = TransExtData::NON_BRANCH; |
| 966 | 966 | ||
| 967 | inst_cream->to_arm = BIT(inst, 20) == 1; | 967 | inst_cream->to_arm = BIT(inst, 20) == 1; |
| 968 | inst_cream->t = BITS(inst, 12, 15); | 968 | inst_cream->t = BITS(inst, 12, 15); |
| @@ -1006,7 +1006,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmsr)(unsigned int inst, int index) | |||
| 1006 | 1006 | ||
| 1007 | inst_base->cond = BITS(inst, 28, 31); | 1007 | inst_base->cond = BITS(inst, 28, 31); |
| 1008 | inst_base->idx = index; | 1008 | inst_base->idx = index; |
| 1009 | inst_base->br = NON_BRANCH; | 1009 | inst_base->br = TransExtData::NON_BRANCH; |
| 1010 | 1010 | ||
| 1011 | inst_cream->reg = BITS(inst, 16, 19); | 1011 | inst_cream->reg = BITS(inst, 16, 19); |
| 1012 | inst_cream->Rt = BITS(inst, 12, 15); | 1012 | inst_cream->Rt = BITS(inst, 12, 15); |
| @@ -1069,7 +1069,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmovbrc)(unsigned int inst, int index) | |||
| 1069 | 1069 | ||
| 1070 | inst_base->cond = BITS(inst, 28, 31); | 1070 | inst_base->cond = BITS(inst, 28, 31); |
| 1071 | inst_base->idx = index; | 1071 | inst_base->idx = index; |
| 1072 | inst_base->br = NON_BRANCH; | 1072 | inst_base->br = TransExtData::NON_BRANCH; |
| 1073 | 1073 | ||
| 1074 | inst_cream->d = BITS(inst, 16, 19)|BIT(inst, 7)<<4; | 1074 | inst_cream->d = BITS(inst, 16, 19)|BIT(inst, 7)<<4; |
| 1075 | inst_cream->t = BITS(inst, 12, 15); | 1075 | inst_cream->t = BITS(inst, 12, 15); |
| @@ -1115,7 +1115,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmrs)(unsigned int inst, int index) | |||
| 1115 | 1115 | ||
| 1116 | inst_base->cond = BITS(inst, 28, 31); | 1116 | inst_base->cond = BITS(inst, 28, 31); |
| 1117 | inst_base->idx = index; | 1117 | inst_base->idx = index; |
| 1118 | inst_base->br = NON_BRANCH; | 1118 | inst_base->br = TransExtData::NON_BRANCH; |
| 1119 | 1119 | ||
| 1120 | inst_cream->reg = BITS(inst, 16, 19); | 1120 | inst_cream->reg = BITS(inst, 16, 19); |
| 1121 | inst_cream->Rt = BITS(inst, 12, 15); | 1121 | inst_cream->Rt = BITS(inst, 12, 15); |
| @@ -1200,7 +1200,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmovbcr)(unsigned int inst, int index) | |||
| 1200 | 1200 | ||
| 1201 | inst_base->cond = BITS(inst, 28, 31); | 1201 | inst_base->cond = BITS(inst, 28, 31); |
| 1202 | inst_base->idx = index; | 1202 | inst_base->idx = index; |
| 1203 | inst_base->br = NON_BRANCH; | 1203 | inst_base->br = TransExtData::NON_BRANCH; |
| 1204 | 1204 | ||
| 1205 | inst_cream->d = BITS(inst, 16, 19)|BIT(inst, 7)<<4; | 1205 | inst_cream->d = BITS(inst, 16, 19)|BIT(inst, 7)<<4; |
| 1206 | inst_cream->t = BITS(inst, 12, 15); | 1206 | inst_cream->t = BITS(inst, 12, 15); |
| @@ -1253,7 +1253,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmovbrrss)(unsigned int inst, int inde | |||
| 1253 | 1253 | ||
| 1254 | inst_base->cond = BITS(inst, 28, 31); | 1254 | inst_base->cond = BITS(inst, 28, 31); |
| 1255 | inst_base->idx = index; | 1255 | inst_base->idx = index; |
| 1256 | inst_base->br = NON_BRANCH; | 1256 | inst_base->br = TransExtData::NON_BRANCH; |
| 1257 | 1257 | ||
| 1258 | inst_cream->to_arm = BIT(inst, 20) == 1; | 1258 | inst_cream->to_arm = BIT(inst, 20) == 1; |
| 1259 | inst_cream->t = BITS(inst, 12, 15); | 1259 | inst_cream->t = BITS(inst, 12, 15); |
| @@ -1301,7 +1301,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmovbrrd)(unsigned int inst, int index | |||
| 1301 | 1301 | ||
| 1302 | inst_base->cond = BITS(inst, 28, 31); | 1302 | inst_base->cond = BITS(inst, 28, 31); |
| 1303 | inst_base->idx = index; | 1303 | inst_base->idx = index; |
| 1304 | inst_base->br = NON_BRANCH; | 1304 | inst_base->br = TransExtData::NON_BRANCH; |
| 1305 | 1305 | ||
| 1306 | inst_cream->to_arm = BIT(inst, 20) == 1; | 1306 | inst_cream->to_arm = BIT(inst, 20) == 1; |
| 1307 | inst_cream->t = BITS(inst, 12, 15); | 1307 | inst_cream->t = BITS(inst, 12, 15); |
| @@ -1354,7 +1354,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vstr)(unsigned int inst, int index) | |||
| 1354 | 1354 | ||
| 1355 | inst_base->cond = BITS(inst, 28, 31); | 1355 | inst_base->cond = BITS(inst, 28, 31); |
| 1356 | inst_base->idx = index; | 1356 | inst_base->idx = index; |
| 1357 | inst_base->br = NON_BRANCH; | 1357 | inst_base->br = TransExtData::NON_BRANCH; |
| 1358 | 1358 | ||
| 1359 | inst_cream->single = BIT(inst, 8) == 0; | 1359 | inst_cream->single = BIT(inst, 8) == 0; |
| 1360 | inst_cream->add = BIT(inst, 23); | 1360 | inst_cream->add = BIT(inst, 23); |
| @@ -1420,7 +1420,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vpush)(unsigned int inst, int index) | |||
| 1420 | 1420 | ||
| 1421 | inst_base->cond = BITS(inst, 28, 31); | 1421 | inst_base->cond = BITS(inst, 28, 31); |
| 1422 | inst_base->idx = index; | 1422 | inst_base->idx = index; |
| 1423 | inst_base->br = NON_BRANCH; | 1423 | inst_base->br = TransExtData::NON_BRANCH; |
| 1424 | 1424 | ||
| 1425 | inst_cream->single = BIT(inst, 8) == 0; | 1425 | inst_cream->single = BIT(inst, 8) == 0; |
| 1426 | inst_cream->d = (inst_cream->single ? BITS(inst, 12, 15)<<1|BIT(inst, 22) : BITS(inst, 12, 15)|BIT(inst, 22)<<4); | 1426 | inst_cream->d = (inst_cream->single ? BITS(inst, 12, 15)<<1|BIT(inst, 22) : BITS(inst, 12, 15)|BIT(inst, 22)<<4); |
| @@ -1495,7 +1495,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vstm)(unsigned int inst, int index) | |||
| 1495 | 1495 | ||
| 1496 | inst_base->cond = BITS(inst, 28, 31); | 1496 | inst_base->cond = BITS(inst, 28, 31); |
| 1497 | inst_base->idx = index; | 1497 | inst_base->idx = index; |
| 1498 | inst_base->br = NON_BRANCH; | 1498 | inst_base->br = TransExtData::NON_BRANCH; |
| 1499 | 1499 | ||
| 1500 | inst_cream->single = BIT(inst, 8) == 0; | 1500 | inst_cream->single = BIT(inst, 8) == 0; |
| 1501 | inst_cream->add = BIT(inst, 23); | 1501 | inst_cream->add = BIT(inst, 23); |
| @@ -1580,7 +1580,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vpop)(unsigned int inst, int index) | |||
| 1580 | 1580 | ||
| 1581 | inst_base->cond = BITS(inst, 28, 31); | 1581 | inst_base->cond = BITS(inst, 28, 31); |
| 1582 | inst_base->idx = index; | 1582 | inst_base->idx = index; |
| 1583 | inst_base->br = NON_BRANCH; | 1583 | inst_base->br = TransExtData::NON_BRANCH; |
| 1584 | 1584 | ||
| 1585 | inst_cream->single = BIT(inst, 8) == 0; | 1585 | inst_cream->single = BIT(inst, 8) == 0; |
| 1586 | inst_cream->d = (inst_cream->single ? (BITS(inst, 12, 15)<<1)|BIT(inst, 22) : BITS(inst, 12, 15)|(BIT(inst, 22)<<4)); | 1586 | inst_cream->d = (inst_cream->single ? (BITS(inst, 12, 15)<<1)|BIT(inst, 22) : BITS(inst, 12, 15)|(BIT(inst, 22)<<4)); |
| @@ -1653,7 +1653,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vldr)(unsigned int inst, int index) | |||
| 1653 | 1653 | ||
| 1654 | inst_base->cond = BITS(inst, 28, 31); | 1654 | inst_base->cond = BITS(inst, 28, 31); |
| 1655 | inst_base->idx = index; | 1655 | inst_base->idx = index; |
| 1656 | inst_base->br = NON_BRANCH; | 1656 | inst_base->br = TransExtData::NON_BRANCH; |
| 1657 | 1657 | ||
| 1658 | inst_cream->single = BIT(inst, 8) == 0; | 1658 | inst_cream->single = BIT(inst, 8) == 0; |
| 1659 | inst_cream->add = BIT(inst, 23); | 1659 | inst_cream->add = BIT(inst, 23); |
| @@ -1722,7 +1722,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vldm)(unsigned int inst, int index) | |||
| 1722 | 1722 | ||
| 1723 | inst_base->cond = BITS(inst, 28, 31); | 1723 | inst_base->cond = BITS(inst, 28, 31); |
| 1724 | inst_base->idx = index; | 1724 | inst_base->idx = index; |
| 1725 | inst_base->br = NON_BRANCH; | 1725 | inst_base->br = TransExtData::NON_BRANCH; |
| 1726 | 1726 | ||
| 1727 | inst_cream->single = BIT(inst, 8) == 0; | 1727 | inst_cream->single = BIT(inst, 8) == 0; |
| 1728 | inst_cream->add = BIT(inst, 23); | 1728 | inst_cream->add = BIT(inst, 23); |